JP-2026076106-A - Printed circuit board and method for manufacturing the same

Abstract

[Problem] To provide a printed circuit board and a method for manufacturing the same that improve die bonding reliability and underfill formation stability. [Solution] The present invention relates to a printed circuit board comprising an insulating layer, a conductive pad disposed on the insulating layer, a conductive bump disposed on the insulating layer and spaced apart from the insulating layer to cover at least a portion of the conductive pad, and a solder resist layer disposed on the insulating layer and covering at least a portion of the conductive pad and the conductive bump, wherein the conductive bump has a maximum width wider than the conductive pad, and a method for manufacturing the same. [Selection Diagram] Figure 3

Inventors

• 金 相 勳
• 高 燦 訓
• 趙 基 殷
• 尹 智 湖
• 成 ミン 宰

Assignees

• サムソン エレクトロ－メカニックス カンパニーリミテッド．

Dates

Publication Date

20260511

Application Date

20250722

Priority Date

20241023

Claims (20)

1. Insulating layer and, A conductive pad disposed on the insulating layer, A conductive bump is disposed on the insulating layer and covers at least a portion of the conductive pad, separated from the insulating layer. The solder resist layer is disposed on the insulating layer and covers at least a portion of the conductive pad and the conductive bump, The conductive bump is characterized in that it has a wider maximum width than the conductive pad.
2. At least a portion of the solder resist layer is disposed between the upper surface of the insulating layer and the lower surface of the conductive bump. The printed circuit board according to claim 1, characterized in that the lower surface of the conductive bump is in direct contact with the solder resist layer.
3. The solder resist layer covers a portion of the side surface of the conductive pad. The printed circuit board according to claim 1, characterized in that the conductive bump covers another portion of the side surface and the top surface of the conductive pad.
4. The solder resist layer covers a portion of the side surface of the conductive bump. The printed circuit board according to claim 1, characterized in that the other parts of the sides and the top surface of the conductive bump protrude above the top surface of the solder resist layer.
5. The conductive pad has first and second sides facing each other, The conductive bump has third and fourth sides facing each other, The printed circuit board according to claim 1, characterized in that the third and fourth sides of the conductive bump each protrude outward more than the first and second sides of the conductive pad each.
6. The printed circuit board according to claim 5, characterized in that the protruding length from the first side surface to the third side surface is different from the protruding length from the second side surface to the fourth side surface.
7. The conductive bump includes a seed layer and a metal layer disposed on the seed layer. The printed circuit board according to claim 1, characterized in that the seed layer is in direct contact with at least a portion of the conductive pad and the solder resist layer, respectively.
8. The printed circuit board according to claim 7, characterized in that at least a portion of the side surface of the seed layer is recessed inward from the side surface of the metal layer.
9. The aforementioned seed layer includes multiple seed layers, The printed circuit board according to claim 7, characterized in that one or more of the plurality of seed layers contain a metal different from the metal layer.
10. The aforementioned plurality of seed layers include sputtered titanium and sputtered copper. The printed circuit board according to claim 9, characterized in that the metal layer contains electrolytic copper.
11. The printed circuit board according to claim 1, characterized in that at least a portion of the upper surface of the solder resist layer has a surface roughness greater than one or more of the surfaces of the solder resist layer that contact the side surfaces of the conductive pads and the surfaces of the solder resist layer that contact the side surfaces of the conductive bumps.
12. The printed circuit board according to claim 1, characterized in that the surface of the solder resist layer that contacts the lower surface of the conductive bump has a greater surface roughness than one or more of the surfaces of the solder resist layer that contact the side surface of the conductive pad and the surfaces of the solder resist layer that contact the side surface of the conductive bump.
13. A portion of the conductive bump is exposed from the solder resist layer. The printed circuit board according to claim 1, characterized in that a surface treatment layer is disposed on a portion of the exposed conductive bump.
14. The surface treatment layer includes a first surface treatment layer disposed on an exposed portion of the conductive bump, and a second surface treatment layer disposed on the first surface treatment layer. The first surface treatment layer contains nickel (Ni), The printed circuit board according to claim 13, characterized in that the second surface treatment layer contains gold (Au).
15. The solder resist layer has a cavity that exposes a portion of the conductive bump from the solder resist layer. The printed circuit board according to claim 1, characterized in that the upper surface of the solder resist layer has a step due to the cavity.
16. The solder resist layer includes a first solder resist layer disposed on the insulating layer and covering a portion of the side surface of the conductive pad, and a second solder resist layer disposed on the first solder resist layer and covering a portion of the side surface of the conductive bump. The first solder resist layer is thinner than the conductive pad. The printed circuit board according to claim 1, characterized in that the second solder resist layer is thinner than the conductive bumps.
17. At least a portion of the upper surface of the first solder resist layer has a surface roughness greater than the surface of the first solder resist layer that is in contact with the side surface of the conductive pad. The printed circuit board according to claim 16, characterized in that at least a portion of the upper surface of the second solder resist layer has a surface roughness greater than the surface of the second solder resist layer that is in contact with the side surface of the conductive bump.
18. The printed circuit board according to claim 16, characterized in that the first and second solder resist layers are integrated with each other without boundary divisions.
19. A conductive pattern arranged within the insulating layer, The printed circuit board according to claim 1, further comprising conductive vias that penetrate at least a portion of the insulating layer and are connected to the conductive pattern.
20. The lower surface of the conductive pad is in overall contact with the insulating layer. The printed circuit board according to claim 19, characterized in that the conductive pad is not directly connected to the conductive via.

Description

This invention relates to a printed circuit board and a method for manufacturing the same. The bumps on the substrate connected to the flip-chip die are constantly shrinking in pitch, and at fine pitches, risks such as solder ball placement and bond reliability may arise. Therefore, the application of conductive bumps is being considered. However, conductive bumps have limitations in height, and may also have limitations in width resolution. Furthermore, the size of the conductive bump may be affected by the size of the conductive pad, and if the size is reduced below a certain level due to the influence of the conductive pad, the bond reliability with the die may become weak. Moreover, if the pitch is reduced, these risks may increase. This is a block diagram illustrating an example of an electronic equipment system.This is a perspective view illustrating a typical example of an electronic device.This is a schematic cross-sectional view showing an example of a printed circuit board.Figure 3 is a schematic process diagram showing an example of the manufacturing process of a printed circuit board.This is a schematic cross-sectional view showing another example of a printed circuit board.Figure 5 is a schematic process diagram showing an example of the manufacturing process of a printed circuit board.This is a schematic cross-sectional view showing yet another example of a printed circuit board.Figure 7 is a schematic process diagram showing an example of the manufacturing process of a printed circuit board.This is a schematic cross-sectional view showing yet another example of a printed circuit board.Figure 9 is a schematic process diagram showing an example of the manufacturing process of a printed circuit board.This is a schematic cross-sectional view showing yet another example of a printed circuit board.Figure 11 is a schematic process diagram showing an example of the manufacturing process of a printed circuit board.This is a schematic cross-sectional view showing yet another example of a printed circuit board.Figure 13 is a schematic process diagram showing an example of the manufacturing process of a printed circuit board.This is a schematic cross-sectional view showing yet another example of a printed circuit board.Figure 15 is a schematic process diagram showing an example of the manufacturing process of a printed circuit board.This is a schematic cross-sectional view showing yet another example of a printed circuit board.Figure 17 is a schematic process diagram showing an example of the manufacturing process of a printed circuit board.This is a schematic cross-sectional view showing yet another example of a printed circuit board.Figure 19 is a schematic process diagram showing an example of the manufacturing process of a printed circuit board.This is a schematic cross-sectional view showing yet another example of a printed circuit board.Figure 21 is a schematic process diagram showing an example of the manufacturing process of a printed circuit board.This is a schematic cross-sectional view showing yet another example of a printed circuit board.Figure 23 is a schematic plan view showing a top view of the printed circuit board.This is a schematic cross-sectional view showing yet another example of a printed circuit board. The present invention will be described below with reference to the drawings. The shapes and sizes of elements in the drawings may be exaggerated or reduced for clearer explanation. Figure 1 is a schematic block diagram illustrating an example of an electronic equipment system. Referring to the drawing, the electronic device 1000 houses the main board 1010. The main board 1010 is physically and/or electrically connected to chip-related components 1020, network-related components 1030, and other components 1040, among others. These, along with other electronic components described later, form various signal lines 1090. The chip-related components 1020 include, but are not limited to, memory chips such as volatile memory (e.g., DRAM), non-volatile memory (e.g., ROM), and flash memory; application processor chips such as central processors (e.g., CPUs), graphics processors (e.g., GPUs), digital signal processors, encryption processors, microprocessors, and microcontrollers; and logic chips such as analog-to-digital converters and ASICs (application-specific ICs). Furthermore, these chip-related components 1020 may be combined with each other. The chip-related components 1020 may also be in the form of a package containing the aforementioned chips and electronic components. The network-related component 1030 includes, but is not limited to, any other wireless and wired protocols designated as Wi-Fi® (IEEE 802.11 family, etc.), WiMAX® (IEEE 802.16 family, etc.), IEEE 802.20, LTE® (long term evolution), Ev-DO, HSPA+, HSDPA+, HSUPA+, EDGE, GSM, GPS, GPRS, CDMA, TDMA, DECT, Bluetooth®, 3G, 4G, 5G, and later. It may also include any other diverse wireless or wired standards and protocols. F