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JP-2026514230-A - Power saving in network devices

JP2026514230AJP 2026514230 AJP2026514230 AJP 2026514230AJP-2026514230-A

Abstract

The controller determines the period during which the media access control (MAC) layer circuit outputs data corresponding to an idle symbol, which is output by the MAC layer circuit for transmission over the communication link. In response to the stage of determining the period, at least a portion of the PHY circuitry transitions to a low-power mode during that period, and the PHY circuitry outputs a signal corresponding to an idle symbol, which is for transmission over the communication link.

Inventors

  • シュリカンデ カピル ヴィシュワス

Assignees

  • マーベル アジア ピーティーイー、リミテッド

Dates

Publication Date
20260507
Application Date
20240426
Priority Date
20231030

Claims (19)

  1. A media access control (MAC) layer circuit configured to: i) perform MAC layer operations defined by a communication protocol; ii) output MAC layer data for transmission over a network link; and iii) output an idle symbol when no packet data is being output by the MAC layer circuit; A controller configured to generate an indicator that the MAC layer circuit has output an idle symbol for a certain period of time; and a physical layer (PHY) circuit communicably coupled to the network link, wherein the PHY circuit is configured to: i) receive MAC layer data and idle symbols from the MAC layer circuit, and ii) output signals corresponding to the MAC layer data and idle symbols, wherein the PHY circuit is: When the MAC layer circuit outputs an idle symbol during the aforementioned period, the system is further configured to: i) put a portion of the PHY circuit into a low-power mode during the aforementioned period, and ii) control the PHY circuit to output a signal corresponding to the idle symbol during the aforementioned period. A network device equipped with the following features.
  2. The aforementioned PHY circuit is: The network device according to claim 1, further comprising a forward error correction (FEC) encoder configured to, when an idle symbol is output by the MAC layer circuit during the period, i) put a portion of the circuitry of the FEC encoder into the low-power mode during the period, and ii) output one or more data units corresponding to the idle symbol.
  3. The FEC encoder includes a parity information calculation circuit; The FEC encoder is configured to put the parity information calculation circuit into the low-power mode during the period. The network device according to claim 2.
  4. The network device according to claim 1, wherein the PHY circuit further includes a serializer/deserializer (SERDES), the SERDES configured to, in connection with the MAC layer circuit outputting an idle symbol during the period, i) place a portion of the SERDES circuitry into a low-power mode during the period, and ii) generate one or more serial signals corresponding to the idle symbol.
  5. The SERDES includes a plurality of serial output generators coupled to each lane of the communication link; The SERDES is configured to place a subset of the serial output generators into the low-power mode during the period when idle symbols are output by the MAC layer circuit during that period. The network device according to claim 4.
  6. The PHY circuit includes an FEC encoder circuit configured to generate forward error correction (FEC) data units for transmission over the network link; The PHY circuit is configured to mark one or more FEC data units to indicate that one or more FEC data units corresponding to the period include non-packet data. The network device according to claim 1.
  7. The FEC encoder circuit includes a marking circuit configured to mark each section of the one or more FEC data units corresponding to the payload position within the FEC codeword. The network device according to claim 6.
  8. The FEC encoder circuit includes a marking circuit configured to mark each section of the one or more FEC data units corresponding to the position of the parity portion within the FEC codeword. The network device according to claim 6.
  9. The controller is included in the MAC layer circuit. The network device according to claim 1.
  10. The PHY circuit is a first PHY circuit configured to output a first signal corresponding to the MAC layer data and idle symbols; The network device further comprises a second PHY circuit coupled to the first PHY circuit via a communication link; The second PHY circuit connects the first PHY circuit to the network link in a communicative manner; The second PHY circuit is configured to: i) put a portion of the circuit of the second PHY circuit into a low-power mode during the period when the MAC layer circuit outputs an idle symbol during the period, and ii) control the second PHY circuit to output a signal corresponding to the idle symbol during the period. A network device according to any one of claims 1 to 9.
  11. In the controller, a step of determining the period during which the media access control (MAC) layer circuit outputs data corresponding to an idle symbol; the data is output by the MAC layer circuit for transmission over a communication link; and in response to the step of determining the period, The steps include: placing at least a portion of the PHY circuit into a low-power mode during the aforementioned period; and the PHY circuit outputting a signal corresponding to the idle symbol, the signal being for transmission via the communication link. A method for saving power in a communication network, comprising the features described above.
  12. The step of placing at least a portion of the PHY circuit into the low-power mode during the aforementioned period is: During the aforementioned period, a subset of the circuitry of the forward error correction (FEC) encoder circuit is placed into the low-power mode, wherein the FEC encoder circuit is coupled to the MAC layer circuit; The method has, where the method is: The method according to claim 11, further comprising the step of the FEC encoder circuit outputting one or more FEC data units including data corresponding to the idle symbol.
  13. The step of placing a subset of the FEC encoder circuit into the low-power mode during the aforementioned period is: The method according to claim 12, further comprising the step of placing the parity information generation circuit into the low-power mode during the aforementioned period.
  14. The step of placing at least a portion of the PHY circuit into the low-power mode during the aforementioned period is: During the aforementioned period, a subset of the serializer/deserializer (SERDES) circuitry is placed into the low-power mode, wherein the SERDES is coupled to the MAC layer circuitry; The method has, where the method is: The method according to claim 11, further comprising the step of SERDES outputting one or more serial signals containing data corresponding to the idle symbol.
  15. The SERDES includes a plurality of serial output generators coupled to each lane of the communication link; The step of placing a subset of the circuits of the SERDES into the low-power mode during the aforementioned period includes the step of placing a subset of the serial signal generators into the low-power mode. The method according to claim 14.
  16. The step of placing at least a portion of the PHY circuit into the low-power mode during the aforementioned period is: The method according to claim 11, further comprising the step of placing the digital signal processing circuit into the low-power mode during the aforementioned period.
  17. The PHY circuit includes an FEC encoder circuit that generates forward error correction (FEC) data units for transmission over the communication link; The method described above, in response to the step of determining the period: The method according to any one of claims 11 to 16, further comprising the step of marking one or more FEC data units to indicate that one or more FEC data units corresponding to the period include non-packet data.
  18. The step of marking one or more FEC data units is: The method according to claim 17, wherein the PHY circuit has the step of marking each section of the one or more FEC data units that corresponds to the location of the payload in the FEC codeword.
  19. The step of marking one or more FEC data units is: The method according to claim 17, wherein the PHY circuit has the step of marking each section of the one or more FEC data units that corresponds to the position of the payload portion in the FEC codeword.

Description

[Cross-reference of related applications] This application claims the benefit of U.S. Provisional Patent Application No. 63/462,884, filed on 28 April 2023, entitled "Low Power FEC Mode for Ethernet Ports," the disclosure of which is expressly incorporated herein by reference in its entirety. This disclosure relates generally to communication networks, and more specifically, to power saving techniques for network devices operating in communication networks. The methods described in this section are explorable, but not necessarily previously conceived or explored. Therefore, unless otherwise indicated, none of the methods described in this section should be considered prior art simply because they are included in this section. For example, facilities such as data centers and server farms typically have communication networks with multiple communication links. Data center networks are currently expanding at an exponential rate, and therefore, the number of communication links within data centers is also increasing rapidly. With this increase in the number of communication links in such facilities, the total amount of power consumed by network devices in those facilities becomes considerable. In addition, to improve data throughput, operators often upgrade and/or replace network devices (or their components) to increase link speed, but this increase in link speed also increases power consumption. For example, if the link speed increases fourfold, the power consumption corresponding to that link typically increases two to three times. For example, increased power consumption in facilities such as data centers and server farms leads to increased operating expenses (OpEx) and capital expenses (CapEx) associated with such facilities. For instance, increased energy demand in such facilities necessitates increased power expenditures from operators. This increased energy demand also necessitates CapEx for more complex power supply and cooling solutions. Furthermore, because the density and/or overall size of facilities are constrained by power consumption, the aforementioned increase in power consumption is limiting the expansion of facilities such as data centers and server farms. Therefore, it is advantageous to reduce the amount of power consumed by individual network devices in such facilities. In one embodiment, the network device includes: a medium access control (MAC) layer circuit configured to i) perform MAC layer operations defined by a communication protocol, ii) output MAC layer data for transmission over a network link, and iii) output an idle symbol when no packet data is being output by the MAC layer circuit; a controller configured to generate an indicator that the MAC layer circuit has been outputting an idle symbol for a period of time; and a physical layer (physical) responsively coupled to the network link. A layer (PHY) circuit configured to: i) receive MAC layer data and idle symbols from the MAC layer circuit, and ii) output signals corresponding to the MAC layer data and idle symbols, wherein the PHY circuit is further configured to: i) place a portion of the PHY circuit into a low-power mode during the period when the MAC layer circuit outputs idle symbols during the period, and ii) control the PHY circuit to output signals corresponding to the idle symbols during the period. In another embodiment, a method for saving power in a communication network comprises: determining a period in the controller during which a medium access control (MAC) layer circuit outputs data corresponding to an idle symbol, the data being output by the MAC layer circuit for transmission over the communication link; and, in response to determining the period, placing at least a portion of the PHY circuitry into a low-power mode during the period; and the PHY circuitry outputting a signal corresponding to the idle symbol, the signal being for transmission over the communication link. This is a simplified diagram of an exemplary network device used in a communication network according to one embodiment. This is a simplified diagram of another exemplary network device used in a communication network, according to another embodiment. This is a simplified diagram of an exemplary communication system, including the communication device shown in Figure 2, according to one embodiment. Figures 1 and 2 are simplified diagrams of the components of the network device according to one embodiment, showing the data flow associated with the data to be transmitted via the communication medium.Figure 5A shows an exemplary FEC data unit 400 containing packet data and an exemplary FEC data unit 404 having an idle symbol, configured to be output by the FEC circuit 148 according to one embodiment. Figure 5B shows another exemplary FEC data unit 454, configured to be output by the FEC circuit 148 according to one embodiment. Figures 1 and 2 are simplified diagrams of the components of the network device according to another embodiment, sho