JP-2026514333-A - High aspect ratio contact etching using additional gases

Abstract

A method for processing a substrate, comprising the steps of: flowing a fluorocarbon, a metal halide, and dihydrogen ( H₂ ) into a plasma processing chamber, wherein the plasma processing chamber is configured to hold a substrate comprising a dielectric layer containing silicon oxide as an etching target and a patterned hard mask containing polycrystalline silicon (poly-Si) on the dielectric layer; generating plasma in the plasma processing chamber while flowing a gas; and forming high aspect ratio feature portions by etching recesses in the dielectric layer by exposing the substrate to the plasma, wherein a metal-containing passivation layer is formed on the patterned hard mask during exposure.

Inventors

• ジャーン，ドゥ
• ワーン，ミーンメイ

Assignees

• 東京エレクトロン株式会社
• トーキョー エレクトロン ユーエス ホールディングス，インコーポレーテッド

Dates

Publication Date

20260511

Application Date

20240108

Priority Date

20230328

Claims (20)

1. A method for processing a substrate, A step of flowing fluorocarbon, metal halide, and dihydrogen ( H₂ ) into a plasma processing chamber, wherein the plasma processing chamber is configured to hold a substrate, and the substrate has a dielectric layer containing silicon oxide as an etching target, and a patterned hard mask containing polycrystalline silicon (poly-Si) on the dielectric layer, During the process of flowing the gas, the process of generating plasma in the plasma processing chamber is performed. A step of forming a high aspect ratio feature portion by exposing the substrate to the plasma and etching recesses in the dielectric layer, wherein a metal-containing passivation layer is formed on the patterned hard mask during the exposure step, Methods that include...
2. The method according to claim 1, further comprising the step of flowing dioxygen ( O₂ ).
3. The method according to claim 1 , wherein the fluorocarbon includes C4F6 , C4F8 , CF4 , C3F8 , CHF3 , or CH2F2 .
4. The method according to claim 1, wherein the metal halide is tungsten hexafluoride ( WF6 ).
5. The method according to claim 1, wherein the metal halide is molybdenum hexafluoride ( MoF₂₆ ), niobium hexafluoride ( NbF₂₆ ), tungsten hexachloride ( WCl₂₆ ), aluminum trichloride ( AlCl₃ ), or titanium tetrachloride ( TiCl₄ ).
6. The method according to claim 1, wherein the flow rate of the metal halide is between 0.01% and 1% of the total flow rate of the gas.
7. The method according to claim 1, wherein the metal halide is intermittently flowed during the step of exposing the substrate to the plasma.
8. The method according to claim 1, wherein the dielectric layer comprises a layer stack of silicon oxide and silicon nitride.
9. The method according to claim 1, wherein the aspect ratio of the recess is at least 50:1.
10. A method for processing a substrate, A step of flowing a fluorocarbon and a silane compound into a plasma processing chamber, wherein the plasma processing chamber is configured to hold a substrate, and the substrate has a dielectric layer containing silicon as an etching target, and a patterned hard mask on the dielectric layer. During the process of flowing the gas, the process of generating plasma in the plasma processing chamber is performed. A step of forming a high aspect ratio feature portion by exposing the substrate to the plasma and etching recesses in the dielectric layer, wherein a silicon-containing passivation layer is formed on the patterned hard mask during the exposure step, Methods that include...
11. The method according to claim 10, further comprising the step of flowing dioxygen ( O₂ ).
12. The method according to claim 10 , wherein the fluorocarbon includes C4F6 , C4F8 , CF4 , C3F8 , CHF3 , or CH2F2 .
13. The method according to claim 10, wherein the silane compound is monosilane ( SiH4 ).
14. The method according to claim 10, wherein the silane compound is a disilane ( Si₂H₆ ) or a halogenated silane ( SiH₂X₀y ).
15. The method according to claim 10, wherein the dielectric layer comprises a silicon oxide.
16. The method according to claim 10, wherein the dielectric layer includes silicon nitride.
17. The method according to claim 10, wherein the patterned hard mask comprises polycrystalline silicon (poly-Si).
18. A method for processing a substrate, A step of flowing fluorocarbon into a plasma processing chamber, wherein the plasma processing chamber is configured to hold a substrate, and the substrate includes a dielectric layer as an etching target, and a patterned hard mask on the dielectric layer. During the process of flowing the fluorocarbon, the process of maintaining the plasma generated from the fluorocarbon in the plasma processing chamber, During the process of maintaining the plasma, a process of flowing a metal halide and dihydrogen ( H₂ ) into the plasma processing chamber, During the process of maintaining the plasma, the process includes flowing a silane compound into the plasma processing chamber, A step of forming a high aspect ratio feature portion by exposing the substrate to the plasma and etching recesses in the dielectric layer, wherein a passivation layer is formed on the patterned hard mask during the exposure step, Methods that include...
19. The method according to claim 18, wherein the metal halide, H2 , and the silane compound are simultaneously flowed into the plasma processing chamber.
20. The method according to claim 18, further comprising the step of alternately repeating the step of flowing the metal halide and H2 and the step of flowing the silane compound.

Description

Cross-reference to related applications: This disclosure claims the interests of U.S. Patent Application No. 18/191,098, filed on 28 March 2023, which is incorporated herein by reference in its entirety. This invention generally relates to a method for processing a substrate, and in specific embodiments, to high aspect ratio contact (HARC) etching using an additional gas. Generally, semiconductor devices such as integrated circuits (ICs) are manufactured by sequentially depositing layers of dielectric, conductive, and semiconductor materials onto a substrate, then patterning these layers to form a monolithic structure of integrated electronic components and interconnect elements (e.g., transistors, resistors, capacitors, metal lines, contacts, and vias). Many of the processing steps used to form the structural components of semiconductor devices are carried out using plasma treatment. The following are cross-sectional views of exemplary substrates in a semiconductor manufacturing process, including a plasma etching process for forming high aspect ratio (HAR) features according to various embodiments. Figure 1A shows an incoming substrate including a patterned hard mask layer, a dielectric layer, and an etching stop layer (ESL). Figure 1B shows the substrate during the formation of HAR features by the plasma etching process. Figure 1C shows the substrate after the plasma etching process is complete.This diagram shows the energy levels of adsorption/desorption of a metal fluoride species ( WF4 ) on a silicon oxide surface.This diagram shows the energy levels of adsorption/desorption of a metal fluoride species ( WF4 ) on a silicon surface.This shows the energy level diagram for the formation of a deposition precursor ( WF5 ) from a metal fluoride species ( WF6 ) via heavy particle-assisted dissociation.This shows the energy level diagram for the formation of a deposition precursor ( SiH3 ) from a silane species ( SiH4 ) via heavy particle-assisted dissociation.The process flow diagrams of the plasma etching process method for forming the characteristic parts of HAR according to various embodiments are shown, with Figure 6A showing one embodiment, Figure 6B showing another embodiment, and Figure 6C showing yet another embodiment.An exemplary plasma processing tool according to an embodiment of the present disclosure is shown. This application relates to the manufacture of semiconductor devices, such as integrated circuits including semiconductor devices, and more specifically, high-capacity three-dimensional (3D) memory devices such as 3D-NAND (or vertical NAND), 3D-NOR, or dynamic random-access memory (DRAM) devices. The manufacture of such devices may generally require the formation of conformal high aspect ratio (HAR) features (e.g., contact holes) of circuit elements. Features with an aspect ratio (ratio of the height of a feature to its width) higher than 50:1 are generally considered high aspect ratio features, and in some cases, creating even higher aspect ratios, such as 100:1, may be desirable for advanced 3D semiconductor devices. However, conventional HAR etching methods often involve tens, and sometimes hundreds, of processing steps, typically used, for example, as a periodic process, which complicates process optimization and reduces the amount of etching. Furthermore, conventional HAR etching methods can often result in serious distortion and twisting in the final structure. Therefore, the HAR etching process still faces challenges such as low wafer processing capacity, insufficient uniformity, and contact loss. Thus, a simple yet effective HAR process is desired. Embodiments of this application disclose a method for manufacturing HAR features by a plasma etching process based on fluorocarbons enhanced with additional gases such as metal fluorides and silane compounds. HAR features with aspect ratios higher than 50:1, for example, from 50:1 to 200:1, can be manufactured using the embodiments discussed in this application. The plasma etching method described herein can overcome various challenges posed in plasma etching processes for feature areas of HARs. In various embodiments, the plasma etching process can advantageously achieve a high AR of 100:1 or higher with good selectivity for hard masks. In particular, additional gases can improve mask selectivity (e.g., etching selectivity for masks containing polycrystalline silicon) by selectively providing a metal-containing or silicon-containing passivation layer on the mask. Using this method, dielectric layers such as silicon oxide can be etched with improved selectivity while maintaining a good etching rate. This plasma etching process according to the present method can be carried out in a single step, rather than a periodic etching process requiring multiple steps. Below, in various embodiments, exemplary plasma etching processes assisted by additional gases to form desired high aspect ratio (HAR) features are discussed in Figures 1A to 1C. Th