JP-2026514514-A - Method for curvature correction using tensile nitrides

Abstract

Embodiments of this technology may include a semiconductor processing method. The method may include supplying a deposition precursor to a processing area of a semiconductor processing chamber. The deposition precursor may include a silicon-containing precursor and a nitrogen-containing precursor. A substrate comprising one or more materials may be placed in the processing area. The substrate may be characterized by a first curvature of the substrate. The method may include generating plasma emissions of the deposition precursor. The method may include forming layers of silicon and nitrogen-containing material on the substrate. The layers of silicon and nitrogen-containing material may be characterized by tensile stress. After the formation of the layers of silicon and nitrogen-containing material, the substrate may be characterized by a second curvature of the substrate that is smaller than the first curvature of the substrate. [Selection Diagram] Figure 2

Inventors

• コリンズ デイヴィッド エイチ
• 高橋 信幸
• リー ピン ヒアン
• ソウディビオ リオ
• ベ サンギル
• ラズカニ ホウサム
• スリヴァタナクル ソンクラム サニー
• ガイア ラマン
• バジャージ ゴパル

Assignees

• アプライド マテリアルズ インコーポレイテッド

Dates

Publication Date

20260511

Application Date

20240417

Priority Date

20240410

Claims (20)

1. A semiconductor processing method, The method involves supplying a deposition precursor to a processing area of a semiconductor processing chamber, wherein the deposition precursor comprises a silicon-containing precursor and a nitrogen-containing precursor, and a substrate comprising one or more materials is placed within the processing area, and the substrate is characterized by a first curvature of the substrate. To generate plasma emissions from the aforementioned deposition precursor, The process involves forming a layer of silicon and nitrogen-containing material on the substrate, wherein the layer of silicon and nitrogen-containing material is characterized by tensile stress, and after the formation of the layer of silicon and nitrogen-containing material, the substrate is formed such that it is characterized by a second curvature of the substrate that is smaller than the first curvature of the substrate. A semiconductor processing method, including the following.
2. The semiconductor processing method according to claim 1, wherein the one or more materials include alternating pairs of silicon-containing materials and silicon and germanium-containing materials.
3. The semiconductor processing method according to claim 2, wherein the silicon and nitrogen-containing material layer is formed on the alternating pairs of the silicon-containing material and the silicon and germanium-containing material.
4. The semiconductor processing method according to claim 2, wherein the one or more materials include more than 36 alternating pairs of the silicon-containing material and the silicon and germanium-containing material.
5. The semiconductor processing method according to claim 2, wherein the thickness of the silicon and germanium-containing material is greater than 5 nm or approximately 5 nm.
6. The semiconductor processing method according to claim 1, wherein the first curvature of the substrate is greater than 200 μm or approximately 200 μm.
7. The semiconductor processing method according to claim 1, further comprising treating the silicon and nitrogen-containing material layer with a treatment plasma to increase the tensile stress of the silicon and nitrogen-containing material layer.
8. The semiconductor processing method according to claim 1, wherein the thickness of the silicon and nitrogen-containing material layer is greater than 50 nm or approximately 50 nm.
9. The semiconductor processing method according to claim 1, further comprising depositing one or more additional layers of material on the silicon and nitrogen-containing material layer, wherein the one or more additional layers of material define a patterning stack, and the patterning stack includes a second layer of silicon and nitrogen-containing material.
10. The semiconductor processing method according to claim 9, wherein the second layer of the silicon and nitrogen-containing material is characterized by a thickness greater than the thickness of the layer of the silicon and nitrogen-containing material.
11. The semiconductor processing method according to claim 1, further comprising etching one or more feature portions through one or more materials on the substrate, wherein the etching consumes the silicon and nitrogen-containing material layers, and the etching reduces the compressive stress of the substrate and the one or more materials.
12. A semiconductor processing method, The supply of a substrate to the processing area of a semiconductor processing chamber, wherein the substrate comprises alternating pairs of silicon-containing material and silicon and germanium-containing material, and the substrate is characterized by a first curvature of the substrate. The method involves forming a patterning stack comprising one or more layers of material on the alternating pairs of silicon-containing material and silicon and germanium-containing material, wherein one or more layers of material comprise at least one layer of silicon and nitrogen-containing material characterized by tensile stress, and after the formation of the patterning stack, the substrate is formed to be characterized by a second curvature of the substrate that is smaller than the first curvature of the substrate. The etching involves etching one or more feature portions through the alternating pairs of the silicon-containing material and the silicon and germanium-containing material, wherein the etching removes at least a portion of the patterning stack, and after etching, the substrate is characterized by a third curvature of the substrate that is smaller than the first curvature of the substrate. A semiconductor processing method, including the following.
13. The semiconductor processing method according to claim 12, wherein the substrate includes more than 50 alternating pairs of the silicon-containing material and the silicon and germanium-containing material.
14. The semiconductor processing method according to claim 12, wherein the thickness of the silicon and germanium-containing material is less than 30 nm or approximately 30 nm.
15. The semiconductor processing method according to claim 12, wherein the first curvature of the substrate is greater than 275 μm or approximately 275 μm.
16. The aforementioned patterning stack, A first layer of silicon and nitrogen-containing material arranged on the alternating pairs, A layer of silicon-containing material disposed on the first layer of the silicon and nitrogen-containing material, A second layer of silicon and nitrogen-containing material is disposed on the layer of silicon-containing material, A layer of carbon-containing material disposed on the second layer of silicon and nitrogen-containing material, A third layer of silicon and nitrogen-containing material is disposed on the carbon-containing material layer, The semiconductor processing method according to claim 12, including the method described in claim 12.
17. The semiconductor processing method according to claim 12, wherein the second curvature of the substrate is less than 175 μm or approximately 175 μm.
18. The compressive stress provided by the alternating pairs of the silicon-containing material and the silicon and germanium-containing material decreases during etching of one or more feature portions. The tensile stress given by at least one layer of the silicon and nitrogen-containing material is reduced while etching removes at least the portion of the patterning stack. The semiconductor processing method according to claim 12.
19. It is a semiconductor structure, circuit board and Alternating pairs of silicon-containing material and silicon and germanium-containing material arranged on the substrate, A patterning stack comprising at least one layer of silicon and nitrogen-containing material characterized by compressive stress arranged on the alternating pairs, wherein the semiconductor structure is characterized by curvature of the substrate of less than -200 nm or about -200 nm, A semiconductor structure that includes this.
20. The aforementioned patterning stack, A first layer of silicon and nitrogen-containing material arranged on the alternating pairs, A layer of silicon-containing material disposed on the first layer of the silicon and nitrogen-containing material, A second layer of silicon and nitrogen-containing material is disposed on the layer of silicon-containing material, A layer of carbon-containing material disposed on the second layer of silicon and nitrogen-containing material, The semiconductor structure according to claim 19, comprising a third layer of silicon and nitrogen-containing material disposed on the layer of carbon-containing material.

Description

Cross-reference of Related Applications This application claims the benefit and priority of U.S. Provisional Patent Application No. 63/462,315, filed on 27 April 2023, and priority of U.S. Patent Application No. 18/631,384, filed on 10 April 2024, and these applications are incorporated herein by reference in their entirety for all purposes. This technology relates to semiconductor systems and processes. More specifically, it relates to deposition systems and methods capable of forming tensile silicon nitride layers. Integrated circuits are made possible by a process that generates intricately patterned material layers on a substrate surface. Generating patterned material on a substrate requires a controlled method for forming and removing exposed material. Material properties can influence how the device operates and, further, how the layers are removed from one another. Different stresses may be applied to the substrate during formation and removal. If the overall stress applied to the substrate is too tensile or too compressive, the method for forming and removing the exposed material may become difficult to control. Therefore, improved systems and methods are needed that can be used to produce high-quality devices and structures. These and other requirements are addressed by this technology. Embodiments of this technology may include a semiconductor processing method. This method may include supplying a deposition precursor to a processing area of a semiconductor processing chamber. The deposition precursor may include a silicon-containing precursor and a nitrogen-containing precursor. A substrate containing one or more materials may be placed within the processing area. The substrate may be characterized by a first curvature of the substrate. This method may include generating plasma emissions of the deposition precursor. This method may include forming layers of silicon and nitrogen-containing material on the substrate. The deposited layers of silicon and nitrogen-containing material may be characterized by tensile stress. After the formation of the silicon and nitrogen-containing material layers, the substrate may be characterized by a second curvature of the substrate with a compressive stress smaller than the first curvature of the substrate. In embodiments, one or more materials may include alternating pairs of silicon-containing material and silicon- and germanium-containing material. Layers of silicon- and nitrogen-containing material may be formed on alternating pairs of silicon-containing material and silicon- and germanium-containing material. One or more materials may include more than 36 alternating pairs of silicon-containing material and silicon- and germanium-containing material. The thickness of the silicon- and germanium-containing material may be greater than 5 nm or about 5 nm. The first curvature of the substrate may be greater than 200 μm or about 200 μm. The method may include treating the silicon- and nitrogen-containing material layer with a treatment plasma to increase the tensile stress of the silicon- and nitrogen-containing material layer. The thickness of the silicon- and nitrogen-containing material layer may be greater than 50 nm or about 50 nm. The method may include depositing one or more additional layers of material on the silicon- and nitrogen-containing material layer. One or more additional layers of material may define a patterning stack. The patterning stack may include a second layer of silicon- and nitrogen-containing material. A second layer of silicon and nitrogen-containing material may be characterized by a thickness greater than that of the silicon and nitrogen-containing layer. This method may include etching one or more feature areas through one or more materials on the substrate. Etching can consume the silicon and nitrogen-containing layer. Etching can reduce the compressive stress of the substrate and one or more materials. Some embodiments of this technology may encompass a semiconductor processing method. This method may include supplying a substrate to a processing area of a semiconductor processing chamber. The substrate may include alternating pairs of silicon-containing material and silicon- and germanium-containing material. The substrate may be characterized by a first curvature. This method may include forming a patterning stack comprising one or more layers of material on the alternating pairs of silicon-containing material and silicon- and germanium-containing material. One or more layers of material may include at least one layer of silicon- and nitrogen-containing material characterized by tensile stress. After the formation of the patterning stack, the substrate may be characterized by a second curvature, which may be smaller than the first curvature. This method may etch one or more feature areas through the alternating pairs of silicon-containing material and silicon- and germanium-containing material. Etching may remove at least a por