JP-7856283-B2 - Power semiconductor elements and power semiconductor modules
Inventors
- ▲高▼橋 良和
- 遠藤 哲郎
Assignees
- 国立大学法人東北大学
Dates
- Publication Date
- 20260511
- Application Date
- 20211126
Claims (20)
- A power semiconductor chip comprising a first electrode and a second electrode on a first surface, a third electrode on the second surface opposite to the first surface, and the first electrode located in the main cell region, A fourth electrode is provided on the first surface side of the power semiconductor chip so as to be able to conduct electricity with the first electrode, and has a protruding portion that extends outward from the outer edge of the power semiconductor chip, A fifth electrode is provided on the second surface side of the power semiconductor chip so as to be able to conduct electricity with the third electrode, A sixth electrode is provided on the first surface side of the power semiconductor chip so as to be able to conduct electricity with the second electrode, and has a protruding portion that extends outward from the outer peripheral edge of the power semiconductor chip, A first metal plate is provided on the fourth electrode from either the upper or lower direction, A second metal plate is provided on the fifth electrode from either the upper or lower direction, A third metal plate is provided on the sixth electrode from either the upper or lower direction, The first metal plate and the first ceramic plate that holds the third metal plate, A second ceramic plate that holds the second metal plate, A cooling section that sandwiches the first ceramic plate and the second ceramic plate from above and below, It is equipped with, The first metal plate, the second metal plate, and the third metal plate each have the shape of an external terminal, forming a power semiconductor module.
- The aforementioned power semiconductor chips are multiple, The power semiconductor module according to claim 1, wherein the fourth electrode is provided so as to be electrically connected to the first electrode of each of the plurality of power semiconductor chips.
- The fifth electrode is configured to include a first metal layer provided on the side of the third electrode opposite to the first electrode, and a second metal layer provided on the side of the first metal layer opposite to the first electrode. The first metal layer is a Cu layer, an Al layer, or an alloy layer containing Cu or Al. The power semiconductor module according to claim 1 .
- On the first side of the power semiconductor chip, a termination structure is provided between the outer edge of the power semiconductor chip and the main cell region. An insulating layer is provided on at least the terminal structure, The fourth electrode is configured such that a portion of it is provided within a through-hole in the insulating layer and can conduct electricity with the first electrode, and has a first metal layer provided such that, in a top view, it at least partially overlaps with the first electrode and at least partially overlaps with the insulating layer on the terminal structure. The power semiconductor module according to claim 1 or 2 .
- The fourth electrode is configured to include a second metal layer provided on the first metal layer opposite to the insulating layer, The protruding portion is composed of at least a part of the second metal layer. The power semiconductor module according to claim 4 .
- The first metal layer is a Cu layer, an Al layer, or an alloy layer containing Cu or Al. The power semiconductor module according to claim 4 or 5 .
- Of the fourth electrodes, when viewed from above, the area ratio of the area outside the power semiconductor chip to the main cell area of one power semiconductor chip is 20% or more per power semiconductor chip. A power semiconductor module according to any one of claims 1 to 6 .
- On the first side of the power semiconductor chip, a termination structure is provided between the outer edge of the power semiconductor chip and the main cell region. An insulating layer is provided on at least the terminal structure, The sixth electrode is configured such that a portion of it is provided within a through-hole in the insulating layer and can conduct electricity with the second electrode, and includes a first metal layer provided such that, in a top view, it at least partially overlaps with the second electrode and at least partially overlaps with the insulating layer on the terminal structure, and a second metal layer provided on the first metal layer on the opposite side of the insulating layer, separated from the second electrode so as not to overlap with the second electrode in a top view. The power semiconductor module according to claim 1 or 2 .
- The protruding portion of the sixth electrode is composed of the second metal layer. The power semiconductor module according to claim 8 .
- The power semiconductor module according to any one of claims 1 to 9 , further comprising an insulating enclosure surrounding the outer peripheral side surface of the power semiconductor chip , wherein the protruding portion of the fourth electrode is provided on the enclosure.
- The power semiconductor module according to claim 10, wherein the surface of the enclosed portion opposite to the fourth electrode is flush with a first metal layer provided on the opposite side of the first electrode as part of the fifth electrode , and the first metal layer does not protrude from the outside in the thickness direction of the enclosed portion.
- Multiple power semiconductor devices belonging to the first group, Multiple power semiconductor devices belonging to the second group, Equipped with, Each of the plurality of power semiconductor elements in the first group and the second group is, A power semiconductor chip comprising a first electrode and a second electrode on a first surface, a third electrode on the second surface opposite to the first surface, and the first electrode located in the main cell region, A fourth electrode is provided so as to be electrically connected to the first electrode of the corresponding power semiconductor chip, and has a protruding portion that extends outward from the outer peripheral edge of the corresponding power semiconductor chip, A fifth electrode provided to be electrically connected to the third electrode of the corresponding power semiconductor chip, A sixth electrode provided to be electrically connected to the second electrode of the corresponding power semiconductor chip, It is equipped with, The fourth electrode and the sixth electrode of each of the power semiconductor elements in the first group are arranged in the same direction as the fifth electrode of each of the power semiconductor elements in the second group. The fourth electrode of each power semiconductor element in the first group, the fifth electrode of each power semiconductor element in the first group, the sixth electrode of each power semiconductor element in the first group, the fourth electrode of each power semiconductor element in the second group, the fifth electrode of each power semiconductor element in the second group, and the sixth electrode of each power semiconductor element in the second group are provided to be electrically connected to the corresponding external terminals for each of the fourth, fifth, and sixth electrodes in each group. Power semiconductor module.
- The power semiconductor module according to claim 12 , wherein at least one of the power semiconductor elements in the first group and at least one of the power semiconductor elements in the second group has a plurality of power semiconductor chips.
- The power semiconductor module according to claim 12 or 13, wherein a capacitor is provided between the fourth electrode of each of the power semiconductor elements in the first group and the fifth electrode of each of the power semiconductor elements in the second group.
- A power semiconductor chip comprising a first electrode and a second electrode on a first surface, a third electrode on the second surface opposite to the first surface, and the first electrode located in the main cell region, An insulating layer having through holes is provided on the first surface of the power semiconductor chip, A fourth electrode is provided on the first surface side of the power semiconductor chip so as to be able to conduct electricity with the first electrode, and has a protruding portion that extends outward from the outer edge of the power semiconductor chip, A sixth electrode comprising: an embedded portion provided in the through-hole on the first surface side of the power semiconductor chip so as to be able to conduct electricity with the second electrode; a connecting portion provided away from the fourth electrode and in the opposite direction to the embedded portion; and an extension portion provided between the embedded portion and the connecting portion; It is equipped with, On the first surface side of the power semiconductor chip, a termination structure is provided between the outer peripheral edge of the power semiconductor chip and the main cell region, and the insulating layer is provided at least on the termination structure. The sixth electrode is configured to include a first metal layer that constitutes the embedded portion and the extended portion by being provided such that, in a top view, it at least partially overlaps with the second electrode and at least partially overlaps with the insulating layer on the terminal structure portion, and a second metal layer that constitutes the connection portion by being provided on the first metal layer on the opposite side of the insulating layer, spaced apart from the second electrode so as not to overlap with the second electrode in a top view. The connecting portion extends in a direction intersecting the direction in which the extended portion extends from the buried portion. Power semiconductor device.
- The power semiconductor element according to claim 15, wherein a plurality of the power semiconductor chips are provided, and each of the second electrodes is connected to the sixth electrode.
- Furthermore, the power semiconductor element according to claim 15 or 16 , further comprising a fifth electrode provided on the second surface side of the power semiconductor chip so as to be electrically connected to the third electrode.
- The fifth electrode is configured to include a first metal layer provided on the side of the third electrode opposite to the first electrode, and a second metal layer provided on the side of the first metal layer opposite to the first electrode. The first metal layer of the fifth electrode is a Cu layer, an Al layer, or an alloy layer containing Cu or Al. The power semiconductor device according to claim 17 .
- The fourth electrode is configured such that a portion of it is provided within a through-hole in the insulating layer and can conduct electricity with the first electrode, and has a first metal layer provided such that, in a top view, it at least partially overlaps with the first electrode and at least partially overlaps with the insulating layer on the terminal structure. A power semiconductor device according to any one of claims 15 to 18 .
- The fourth electrode is composed of a second metal layer provided on the first metal layer opposite to the insulating layer, The protruding portion of the fourth electrode is composed of at least a part of the second metal layer. The power semiconductor device according to claim 19 .
Description
This invention relates to power semiconductor elements and power semiconductor modules. Power semiconductor elements are semiconductor elements that handle large voltages and currents and also function as switches. They are used for power control and power conversion in power transmission and distribution systems, trains, hybrid vehicles, electric vehicles, various production facilities, home appliances, and industrial machinery. Patent Document 1 discloses a power module with a double-sided heat dissipation structure, equipped with heat sinks on both the upper and lower sides, as an example of such a power semiconductor element in a modular form. When modularizing power semiconductor elements, it is necessary to connect the power semiconductor chips constituting the power semiconductor element to external terminals using wires or lead frames, and then encapsulate them with resin. Power semiconductor chips are formed by fabricating switching elements into a wafer made of power semiconductor materials such as Si or SiC in a front-end process, and are also called dies. Such power semiconductor chips have a termination structure surrounding the periphery of the first surface side where the main cell region (e.g., source region) is located. This termination structure includes, for example, a guard ring, a field plate, a resurface, or a combination thereof, and mitigates electric field concentration on the first surface side. Japanese Patent Publication No. 2019-85631 (Figure 5) Figure 1 is a schematic cross-sectional view showing a power semiconductor device according to the first embodiment of the present invention.Figure 2 is a schematic diagram showing a top view of a power semiconductor device according to the first embodiment of the present invention.Figure 3 is a schematic cross-sectional view showing a power semiconductor device according to a second embodiment of the present invention.Figure 4 is a schematic diagram showing a top view of a power semiconductor device according to a second embodiment of the present invention.Figure 5 is a schematic diagram showing a top view of a power semiconductor device according to a second embodiment of the present invention, which differs from Figure 4.Figure 6 is a schematic diagram showing a top view of a power semiconductor element according to a second embodiment of the present invention, which differs from Figures 4 and 5.Figure 7 is a schematic diagram showing a top view of a power semiconductor element according to a second embodiment of the present invention, which differs from Figures 4 to 6.Figure 8 is a schematic cross-sectional view showing a power semiconductor device according to a third embodiment of the present invention.Figure 9 is a schematic diagram showing the top-view positional relationship of the power semiconductor chip, the surrounding portion, the first electrode, and the third electrode in a power semiconductor element according to the third embodiment of the present invention.Figure 10 is a schematic diagram showing a top view of a power semiconductor chip.Figure 11 is a schematic cross-sectional view showing a power semiconductor device according to a fourth embodiment of the present invention.Figure 12 is a schematic cross-sectional view showing a power semiconductor module according to a fifth embodiment of the present invention.Figure 13 is a schematic cross-sectional view showing a power semiconductor module according to the sixth embodiment of the present invention.Figure 14 is a schematic cross-sectional view showing a power semiconductor module according to the seventh embodiment of the present invention.Figure 15 is a schematic cross-sectional view showing a power semiconductor module according to the eighth embodiment of the present invention.Figure 16A is a schematic cross-sectional view showing the starting state of a method for manufacturing a power semiconductor module according to the ninth embodiment of the present invention.Figure 16B is a schematic cross-sectional view showing the next state in Figure 16A regarding the manufacturing method of a power semiconductor module according to the ninth embodiment of the present invention.Figure 16C is a schematic cross-sectional view showing the next state of Figure 16B regarding a method for manufacturing a power semiconductor module according to the ninth embodiment of the present invention.Figure 16D is a schematic cross-sectional view showing the next state of Figure 16C regarding a method for manufacturing a power semiconductor module according to the ninth embodiment of the present invention.Figure 16E is a schematic cross-sectional view showing the next state of Figure 16D regarding a method for manufacturing a power semiconductor module according to the ninth embodiment of the present invention.Figure 16F is a schematic cross-sectional view showing the next state of Figure 16E regarding a method for manufacturing a power semiconductor module according to the ninth embodim