JP-7856870-B1 - Semiconductor equipment

JP7856870B1JP 7856870 B1JP7856870 B1JP 7856870B1JP-7856870-B1

Abstract

A semiconductor device 1 comprises multiple semiconductor chips and multiple conductive members including multiple inner leads and multiple connectors. The multiple connectors include individual connectors 51, 52, 53, 61, 62, 63 that connect semiconductor chips (diodes 11, 12, 13, 14, 15, 16) to conductive members on a one-to-one basis. In the semiconductor device 1 of the present invention, the distance and inclination between one semiconductor chip and an individual connector no longer significantly affect the distance and inclination between other semiconductor chips and individual connectors. Therefore, the semiconductor device 1 of the present invention is a semiconductor device that can suppress the occurrence of variations in the connection between semiconductor chips and connectors compared to conventional semiconductor devices.

Inventors

川▲崎▼ 祐生
新井寿和

Assignees

新電元工業株式会社

Dates

Publication Date: 20260511
Application Date: 20250530
Priority Date: 20240718

Claims (10)

A semiconductor device comprising multiple semiconductor chips and multiple conductive members including multiple inner leads and multiple connectors, The plurality of connectors include individual connectors that connect the semiconductor chip and the conductive member one-to-one. The aforementioned multiple inner leads are A first common inner lead having a portion extending along a predetermined first direction, A plurality of individual inner leads arranged along the first direction, It includes a second common inner lead that is positioned between the first common inner lead and the plurality of individual inner leads and has a portion that extends along the first direction, At least two of the semiconductor chips are mounted on the first common inner lead in an arrangement that follows the first direction. At least one of the semiconductor chips is mounted on the individual inner lead. The aforementioned individual connectors are, A first connection portion is positioned to cover the semiconductor chip when viewed from above, A semiconductor device characterized by having a second connecting portion which is narrower in width than the first connecting portion and protrudes from the first connecting portion, with its tip connected to the conductive member.
The semiconductor device according to claim 1, characterized in that the plurality of connectors include a number of individual connectors equal to the number of semiconductor chips.
The semiconductor device according to claim 1 or 2, characterized in that the plurality of semiconductor chips include diodes.
The plurality of semiconductor chips include six diodes as the diodes, The semiconductor device according to claim 3, characterized in that the plurality of connectors include six individual connectors corresponding to the six diodes.
The semiconductor chip is mounted on the inner lead, The semiconductor device according to claim 1 , characterized in that the individual connector connects the semiconductor chip to an inner lead other than the inner lead on which the semiconductor chip is mounted.
The semiconductor device according to claim 1 , further comprising the plurality of semiconductor chips, the first common inner lead, the plurality of individual inner leads, the second common inner lead, and a sealing resin for sealing the individual connector.
The first common inner lead is connected to a first outer lead, one end of which is exposed to the outside of the sealing resin. The individual inner lead is connected to an individual outer lead, one end of which is exposed to the outside of the sealing resin. The semiconductor device according to claim 6 , characterized in that the second common inner lead is connected to a second outer lead, one end of which is exposed to the outside of the sealing resin.
The plurality of connectors include a plurality of the individual connectors, The semiconductor device according to claim 1, characterized in that, when viewed from above, the portion of the second common inner lead extending along the first direction and the second connection portion of all the individual connectors overlap.
When the individual piece connector connecting the semiconductor chip mounted on the first common inner lead to the individual piece inner lead is defined as the first connector, and the individual piece connector connecting the semiconductor chip mounted on the individual piece inner lead to the second common inner lead is defined as the second connector, The semiconductor device according to claim 1 , characterized in that the second connecting portion of the first connector and the second connecting portion of the second connector are adjacent when viewed from above.
There are three or more of the aforementioned second connectors. The semiconductor device according to claim 9 , characterized in that the connection points between the second connector and the second common inner lead are arranged at equal intervals.

Description

Cross-reference This application claims priority under Japanese Patent Application No. 2024-114766, filed in Japan on 18 July 2024, and all contents of said application are incorporated herein by reference. This invention relates to a semiconductor device. Conventionally, semiconductor devices comprising multiple semiconductor chips, multiple inner leads, multiple connectors, and a sealing resin are known (see, for example, Patent Document 1). In such semiconductor devices, it is common for multiple semiconductor chips to be connected together to a single connector. A conventional semiconductor device 900 comprises multiple semiconductor chips 911, 912, 913, 914, 915, and 916, multiple inner leads 921, 922, 923, 924, and 925, multiple connectors 951 and 952, and a sealing resin 970 (see Figure 3). A conventional semiconductor device 900 can also be described as a three-phase bridge diode package. In semiconductor device 900, semiconductor chips 911, 912, and 913 are connected together to connector 951. Also in semiconductor device 900, semiconductor chips 914, 915, and 916 are connected together to connector 952. Japanese Patent Publication No. 2016-149512 This figure shows the internal configuration of the semiconductor device 1 according to Embodiment 1. Figure 1(a) is a plan view, Figure 1(b) is a cross-sectional view of Figure 1(a) taken along line A1-A1, and Figure 1(c) is a cross-sectional view of Figure 1(a) taken along line A2-A2. In the drawings, "a diagram showing the internal configuration" refers to a diagram showing the components sealed in the sealing resin. For this reason, in Figure 1, only the outer shape of the sealing resin 70 is shown with a dashed line. Also, in Figure 1(a), components hidden by the individual connectors 51, 52, 53, 61, 62, and 63 are shown with dashed lines. Furthermore, in Figures 1(b) and 1(c), only the parts of the components facing the cross-section are shown, and the parts of the components that are located on the far side of the cross-section and do not face the cross-section (for example, the second outer lead 40B in Figure 1(b)) are not shown. In Figures 2(b), 2(c), and 4, the same method of display as in Figures 1(b) and 1(c) is used.This figure shows the internal configuration of the semiconductor device 2 according to Embodiment 2. Figure 2(a) is a plan view, Figure 2(b) is a cross-sectional view of Figure 2(a) taken along line A3-A3, and Figure 2(c) is a cross-sectional view of Figure 2(a) taken along line A4-A4. In Figure 2, as well, only the outer shape of the sealing resin 70 is shown with a dashed line. Also, in Figure 2(a), components hidden by the individual connectors 51, 52, 61, and 62 are shown with dashed lines.This is a plan view showing the internal configuration of a conventional semiconductor device 900.This is a cross-sectional view taken along line A-A in Figure 3. Figure 4(a) is a cross-sectional view showing the connector 952 in an upright position, while Figures 4(b) and 4(c) are cross-sectional views showing the connector 952 in an upright position. Note that in Figures 4(b) and 4(c), the inclination of the connector 952 is exaggerated. Therefore, in Figures 4(b) and 4(c), the connector 952 and the semiconductor chips 914, 915, and 916 may appear to be separated. Normally, a conductive bonding material (not shown) is placed between the connector 952 and the semiconductor chips 914, 915, and 916, so even in the cases shown in Figures 4(b) and 4(c), the connection between the connector 952 and the semiconductor chips 914, 915, and 916 is not necessarily lost. The semiconductor device of the present invention will be described below based on the embodiments shown in the figures. In the embodiments described below, components having exactly the same or substantially the same function will be referred to by the same reference numerals in each embodiment, even if their shape or other characteristics differ slightly, and explanations that have already been given may be omitted. The embodiments described below do not limit the invention as defined in the claims. Furthermore, not all of the elements and combinations described in each embodiment are necessarily essential to the solution of the present invention. [Embodiment 1] 1. Configuration of the Semiconductor Device 1 According to Embodiment 1 The semiconductor device 1 according to Embodiment 1 comprises a plurality of semiconductor chips, a plurality of conductive members including a plurality of inner leads and a plurality of connectors, and a sealing resin 70 (see Figure 1). The semiconductor device 1 can also be described as a three-phase bridge diode package. The components of the semiconductor device 1 will be described below. The multiple semiconductor chips include diodes. The multiple semiconductor chips include six diodes 11, 12, 13, 14, 15, and 16. Each of the diodes 11, 12, 13, 14, 15, and 16 has electrodes (not shown) on the side facing the inner lead and the side facing the con