JP-7857097-B2 - Reducing interference within the display panel while input detection is being performed.

Inventors

• 伊藤 大亮
• 武山 洋士
• ロッシュ、ジョナサン

Assignees

• シナプティクス インコーポレイテッド

Dates

Publication Date

20260512

Application Date

20211222

Priority Date

20210106

Claims (10)

1. A processing system for an input device, The system includes a sensor circuit configured to activate multiple sensor electrodes for absolute capacitance detection during the first detection frame. The sensor circuit unit, during the first period in which the absolute capacity detection and the display panel update are performed simultaneously , A first portion of the plurality of sensor electrodes is driven by a detection signal to obtain a result signal from the first portion of sensor electrodes , the absolute capacitance detection is based on the result signal, and the first portion of sensor electrodes overlap with one or more gate lines of the display panel that are not selected for the display update during the first period. A second portion of the aforementioned plurality of sensor electrodes is driven by a guard signal. The third portion of the plurality of sensor electrodes is configured to be driven by a reference signal. The guard signal and the detection signal share at least one characteristic selected from the group consisting of amplitude, phase, and frequency. Some of the third of the plurality of sensor electrodes overlap one or more gate lines of the display panel selected for the display update during the first period. Processing system.
2. The processing system according to claim 1, wherein the second part of the sensor electrode is located between the first part of the sensor electrode and the third part of the sensor electrode.
3. The sensor circuit section operates during the second period of the first detection frame. The first part of the sensor electrodes and the third part of the sensor electrodes are driven by the guard signal. The second set of sensor electrodes are driven by the reference signal, A fourth portion of the plurality of sensor electrodes is configured to be driven by the detection signal. The second portion of the sensor electrodes overlaps with the second gate line of the display panel selected for updating during the second period. The processing system according to claim 1, wherein the second period follows the first period.
4. The sensor circuit unit operates during the third period of the first detection frame. The first part of the sensor electrodes is driven by the reference signal, The second part of the sensor electrodes is driven by the detection signal, The third and fourth sensor electrodes are further configured to be driven by the guard signal. The first portion of the sensor electrodes overlaps with the third gate line of the display panel selected for updating during the third period. The processing system according to claim 3, wherein the third period follows the second period.
5. The plurality of sensor electrodes are operated in a first sequence for absolute capacitance detection during the first detection frame. The aforementioned plurality of sensor electrodes are operated in a second sequence for absolute capacitance detection during the second detection frame. The processing system according to claim 1, wherein the first order is different from the second order.
6. A processing system for an input device, During the first detection frame, the sensor circuit section is configured to activate multiple sensor electrodes for input detection. Equipped with, The sensor circuit unit operates during the first period of the first detection frame. A first portion of the multiple sensor electrodes is driven by a detection signal. A second portion of the aforementioned plurality of sensor electrodes is driven by a guard signal. A third portion of the aforementioned plurality of sensor electrodes is driven by a reference signal. It is configured in such a way, The guard signal and the detection signal share at least one characteristic selected from the group consisting of amplitude, phase, and frequency. Some of the third of the plurality of sensor electrodes overlap the first gate line of the display panel selected for updating during the first period. The plurality of sensor electrodes are operated in a first sequence for input detection during the first detection frame. The aforementioned plurality of sensor electrodes are operated in a second sequence for input detection during the second detection frame. The first order is different from the second order, The first detection frame is in the first display frame, The second detection frame is present in the first display frame and the second display frame. Between the first display frame and the second display frame, the display panel is updated. Processing system.
7. A processing system for an input device, During the first detection frame, the sensor circuit section is configured to activate multiple sensor electrodes for input detection. Equipped with, The sensor circuit unit operates during the first period of the first detection frame. A first portion of the multiple sensor electrodes is driven by a detection signal. A second portion of the aforementioned plurality of sensor electrodes is driven by a guard signal. A third portion of the aforementioned plurality of sensor electrodes is driven by a reference signal. It is configured in such a way, The guard signal and the detection signal share at least one characteristic selected from the group consisting of amplitude, phase, and frequency. Some of the third of the plurality of sensor electrodes overlap the first gate line of the display panel selected for updating during the first period. The plurality of sensor electrodes are operated in a first sequence for input detection during the first detection frame. The aforementioned plurality of sensor electrodes are operated in a second sequence for input detection during the second detection frame. The first order is different from the second order, The first detection frame is in the first display frame, The second detection frame is in the first display frame, The third detection frame is present in the first display frame and the second display frame. Between the first display frame and the second display frame, the display panel is updated. Processing system.
8. The sensor circuit is further configured to start driving the first detection frame based on a display update signal that instructs the start of a display frame. The processing system according to claim 1, wherein the start of the first detection frame is delayed from the start of the display frame.
9. Multiple sensor electrodes, A processing system coupled to the plurality of sensor electrodes and configured to operate the plurality of sensor electrodes for absolute capacitance detection during the first detection frame, Equipped with, The processing system operates during the first period in which the absolute capacity detection and the display panel update of the first detection frame are performed simultaneously . A first portion of the plurality of sensor electrodes is driven by a detection signal to obtain a result signal from the first portion of sensor electrodes, the absolute capacitance detection is based on the result signal, and the first portion of sensor electrodes overlap with one or more gate lines of the display panel that are not selected for the display update during the first period . A second portion of the aforementioned plurality of sensor electrodes is driven by a guard signal. The third portion of the plurality of sensor electrodes is configured to be driven by a reference signal. The guard signal and the detection signal share at least one characteristic selected from the group consisting of amplitude, phase, and frequency. Some of the third of the plurality of sensor electrodes overlap one or more gate lines of the display panel selected for the display update during the first period. Input device.
10. During a first period in the first detection frame in which absolute capacitance detection and display panel display updating are performed simultaneously , a first portion of the sensor electrodes among a plurality of sensor electrodes is driven by a detection signal to obtain a result signal from the first portion of sensor electrodes, the absolute capacitance detection is based on the result signal, and the first portion of sensor electrodes overlap with one or more gate lines of the display panel that are not selected for the display updating during the first period . During the first period, a second portion of the multiple sensor electrodes is driven by a guard signal, During the first period, a third portion of the sensor electrodes among the plurality of sensor electrodes are driven by a reference signal, Includes, The guard signal and the detection signal share at least one characteristic selected from the group consisting of amplitude, phase, and frequency. Some of the third of the plurality of sensor electrodes overlap one or more gate lines of the display panel selected for the display update during the first period. method.

Description

This disclosure relates, in general, to electronic devices, and more specifically, to reducing the effects of interference caused by a detection device in a display device. Input devices equipped with proximity sensors can be used in a variety of electronic systems. A proximity sensor includes a detection area defined by a surface, within which it detects the presence, position, force, and/or movement of one or more input objects. Proximity sensors can be used to provide an interface to an electronic system. For example, they are used as input devices for larger computing systems, such as touchpads embedded in or surrounding devices in notebook computers, desktop computers, automotive multimedia systems, or Internet of Things (IoT) devices. Proximity sensors are also frequently used in smaller computing systems, such as touchscreens embedded in mobile phones. In one example, a processing system for an input device includes a sensor circuit. The sensor circuit is configured to activate a plurality of sensor electrodes for input detection during a first detection frame. During a first period of the first detection frame, the sensor circuit is configured to drive a first subset of the plurality of sensor electrodes with a detection signal, a second subset of the plurality of sensor electrodes with a guard signal, and a third subset of the plurality of sensor electrodes with a reference signal. The guard signal and the detection signal share at least one characteristic selected from the group consisting of amplitude, phase, and frequency. The third subset of the plurality of sensor electrodes overlaps a first gate line of a display panel selected for updating during the first period. In one example, the input device comprises a plurality of sensor electrodes and a processing system. The processing system is coupled to the plurality of sensor electrodes and is configured to activate the plurality of sensor electrodes for input detection during a first detection frame. During a first period of the first detection frame, the processing system is configured to drive a first subset of the plurality of sensor electrodes with a detection signal, a second subset of the plurality of sensor electrodes with a guard signal, and a third subset of the plurality of sensor electrodes with a reference signal. The guard signal and the detection signal share at least one characteristic selected from the group consisting of amplitude, phase, and frequency. The third subset of sensor electrodes overlaps with a first gate line of a display panel selected for updating during the first period. In one example, the method includes driving a first subset of sensor electrodes among a plurality of sensor electrodes with a detection signal during a first period of a first detection frame, and driving a second subset of sensor electrodes among the plurality of sensor electrodes with a guard signal during the first period. The guard signal and the detection signal share at least one characteristic selected from the group consisting of amplitude, phase, and frequency. The method is further configured to drive a third subset of sensor electrodes among the plurality of sensor electrodes with a reference signal during the first period. The third subset of sensor electrodes among the plurality of sensor electrodes overlaps a first gate line of a display panel selected for updating during the first period. To enable a detailed understanding of the features described above, a more specific description of the disclosure, which is briefly summarized above, may be provided with reference to embodiments. Some of these embodiments are illustrated in the accompanying drawings. However, it should be noted that the accompanying drawings illustrate only exemplary embodiments, and since the disclosure acknowledges other equally valid embodiments, they should not be considered to limit the scope of the invention. Figure 1 is a schematic block diagram of an input device according to one or more embodiments. Figure 2 is a schematic block diagram of an input device and a display device according to one or more embodiments. Figure 3 is a schematic side view of an input device according to one or more embodiments. Figure 4 is a schematic side view of a portion of an input device according to one or more embodiments. Figure 5 is a flowchart of a method for performing capacity detection according to one or more embodiments. Figure 6 is a timing diagram of a capacity frame according to one or more embodiments. Figure 7 is a schematic side view of a part of an input device according to one or more embodiments. Figure 8A is a timing diagram of a capacitive frame according to one or more embodiments.Figure 8B is a timing diagram of a capacitive frame according to one or more embodiments.Figure 9A1 is a timing diagram of a capacitive frame according to one or more embodiments.Figure 9A2 is a timing diagram of a capacitive frame according to one or more embodiments.Figure