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JP-7857245-B2 - Manufacturing method for semiconductor devices

JP7857245B2JP 7857245 B2JP7857245 B2JP 7857245B2JP-7857245-B2

Inventors

  • 野村 一城
  • 大橋 健一
  • 山下 創一
  • 森 健太郎
  • 村吉 彬
  • 奥山 拓希

Assignees

  • 株式会社東芝
  • 東芝デバイス＆ストレージ株式会社

Dates

Publication Date
20260512
Application Date
20230315

Claims (4)

  1. A step of preparing a wafer having a first main surface and a second main surface opposite to the first main surface, wherein a first electrode layer is disposed on the first main surface and a second electrode layer is disposed on the second main surface, The steps include applying a resist onto the first electrode layer, The process involves selectively exposing the resist at positions corresponding to the intersections of predetermined dicing lines on the wafer and developing it to form a plurality of openings in a grid pattern on the bottom surface in which the first electrode layer is exposed. The process involves etching the first electrode layer exposed on the bottom surface of the opening to form a plurality of recesses in a grid pattern on the first electrode layer, The step of removing the resist, The steps include: attaching a dicing tape to the first electrode layer, A step of dividing the wafer into multiple semiconductor devices by dicing the wafer along the dicing line, The steps include stretching the dicing tape and picking up the semiconductor device, A method for manufacturing a semiconductor device comprising the same equipment.
  2. A step of preparing a wafer having a first main surface and a second main surface opposite to the first main surface, wherein a first electrode layer is disposed on the first main surface and a second electrode layer is disposed on the second main surface, A step of dividing the wafer into a plurality of semiconductor devices by dicing the wafer along a predetermined dicing line, wherein each semiconductor device comprises a first electrode having a third main surface opposite to the main surface that contacts the first main surface, a first side surface that intersects substantially perpendicularly with the third main surface, and a second side surface that intersects substantially perpendicularly with both the third main surface and the first side surface. A step of performing laser ablation along the boundary line between the third main surface and the first side surface and the boundary line between the third main surface and the second side surface, or performing laser ablation on the corner consisting of the third main surface, the first side surface and the second side surface, thereby removing a portion of the corner and rounding the corner, The steps include: attaching a dicing tape to the first electrode, The steps include stretching the dicing tape and picking up the individual semiconductor devices, A method for manufacturing a semiconductor device comprising the same equipment.
  3. A step of preparing a wafer having a first main surface and a second main surface opposite to the first main surface, wherein a second electrode layer is disposed on the second main surface, The steps include applying a resist to the first main surface, A step of selectively exposing the resist at positions corresponding to the intersections of predetermined dicing lines on the wafer and developing it to form a plurality of openings in a grid pattern on the bottom surface in which the first main surface of the wafer is exposed, A step of etching the wafer exposed in the opening to form a plurality of recesses in a grid pattern on the wafer, The step of removing the resist, The steps include forming a first electrode layer on the first main surface, The steps include: attaching a dicing tape to the first electrode layer , A step of dividing the wafer into multiple semiconductor devices by dicing the wafer along the dicing line, The steps include stretching the dicing tape and picking up the semiconductor device, A method for manufacturing a semiconductor device comprising the same equipment.
  4. A step of preparing a wafer having a first main surface and a second main surface opposite to the first main surface, wherein a second electrode layer is disposed on the second main surface, A step of forming spacers in a grid pattern on the second electrode layer at positions corresponding to the intersections of predetermined dicing lines on the wafer, A step of placing the wafer on the support jig such that the second main surface side faces the support jig, A step of grinding the first main surface of the wafer, The steps include forming a first electrode layer on the first main surface, The steps include: attaching a dicing tape to the first electrode layer , A step of dividing the wafer into multiple semiconductor devices by dicing the wafer along the dicing line, The steps include stretching the dicing tape and picking up the semiconductor device, A method for manufacturing a semiconductor device equipped with [the specified features].

Description

Embodiments of the present invention relate to a semiconductor device, a semiconductor module, and a method for manufacturing a semiconductor device. In a semiconductor module equipped with a semiconductor device such as a vertical MOSFET (Metal Oxide Semiconductor Field Effect Transistor), the electrodes of the semiconductor device are electrically connected to lead materials (metal components) via a bonding material such as solder. Since semiconductor devices are formed by dicing a wafer with an electrode layer, the corners of the electrodes have a sharp, angular shape. Therefore, in semiconductor modules, stress tends to concentrate at the electrode corners due to thermal expansion of the bonding material, etc. As a result, the semiconductor substrate may be damaged, especially in situations with large changes in ambient temperature. Patent No. 2890851Japanese Patent Publication No. 2007-165371Japanese Patent Publication No. 2013-161944 This is a cross-sectional view of a semiconductor module according to the first embodiment.This is a top view of a semiconductor device according to the first embodiment.This is a cross-sectional view of the semiconductor device shown in Figure 2A, along the line I-I.This is a cross-sectional view of the semiconductor device shown in Figure 2A, along the line II-II.This is a three-dimensional perspective view of the first electrode included in the semiconductor device according to the first embodiment.This is a cross-sectional view illustrating a step in a first example of a method for manufacturing a semiconductor device according to the first embodiment.This is a cross-sectional view illustrating the steps in a first example of a semiconductor device manufacturing method according to the first embodiment, following Figure 3A.Figure 3B is a cross-sectional view illustrating the steps in a first example of a method for manufacturing a semiconductor device according to the first embodiment.Figure 3A(3) is a top view illustrating the steps in a first example of a method for manufacturing a semiconductor device according to the first embodiment.Figure 3B(1) is a top view illustrating the steps in a first example of a method for manufacturing a semiconductor device according to the first embodiment.This is a cross-sectional view illustrating a process in a second example of a method for manufacturing a semiconductor device according to the first embodiment.This is a cross-sectional view illustrating a process in a second example of the method for manufacturing a semiconductor device according to the first embodiment, following Figure 4A.Figure 4A(2) is a top view illustrating the process in a second example of the method for manufacturing a semiconductor device according to the first embodiment.Figure 4A(3) is a top view illustrating the laser processing step in a second example of the method for manufacturing a semiconductor device according to the first embodiment.Figure 4A(3) is a top view illustrating another example relating to the laser processing step in a second example of the method for manufacturing a semiconductor device according to the first embodiment.This is a three-dimensional perspective view of the first electrode provided in a semiconductor device according to a modified example of the first embodiment.This is a top view of a semiconductor device according to the second embodiment.This is a cross-sectional view of the semiconductor device shown in Figure 6A, along the line II-II.This is a three-dimensional perspective view of the first electrode and semiconductor substrate included in the semiconductor device according to the second embodiment.This is a cross-sectional view illustrating a step in the first example of a method for manufacturing a semiconductor device according to a second embodiment.This is a cross-sectional view illustrating the steps in the first example of a method for manufacturing a semiconductor device according to a second embodiment, following Figure 7A.This is a cross-sectional view illustrating the steps in the first example of the method for manufacturing a semiconductor device according to the second embodiment, following Figure 7B.This is a cross-sectional view illustrating a step in a second example of a method for manufacturing a semiconductor device according to a second embodiment.This is a cross-sectional view illustrating the steps in a second example of a semiconductor device manufacturing method according to the second embodiment, following Figure 8A.This is a cross-sectional view illustrating the steps in a second example of a semiconductor device manufacturing method according to the second embodiment, following Figure 8B.Figure 8A(2) is a top view illustrating the steps in a second example of the method for manufacturing a semiconductor device according to the second embodiment.Figure 8C(2) is a top view illustrating the steps in a second example of a method for manufacturing a semiconductor device according to the se