JP-7857384-B2 - Nitride semiconductor equipment

JP7857384B2JP 7857384 B2JP7857384 B2JP 7857384B2JP-7857384-B2

Inventors

小川雅弘
柴田大輔
田村聡之

Assignees

パナソニックホールディングス株式会社

Dates

Publication Date: 20260512
Application Date: 20241212
Priority Date: 20200108

Claims (8)

A substrate having a first main surface and a second main surface opposite to the first main surface, A first electron transport layer having a first conductivity type is provided above the first main surface, A first electron supply layer provided above the first electron transport layer, A first nitride semiconductor layer having a second conductivity type different from the first conductivity type is provided above the first electron supply layer, A second electron transport layer is provided in the upper portion of the first nitride semiconductor layer and in the portion along the inner surface of the first opening that penetrates the first electron supply layer and the first nitride semiconductor layer and reaches the first electron transport layer, The present invention comprises a second electron supply layer provided above the second electron transport layer and covering the first opening , The first electron transport layer is The third nitride semiconductor layer of the first conductivity type, The third nitride semiconductor layer and the first electron supply layer are located between them and an undoped fourth nitride semiconductor layer. Nitride semiconductor equipment.
Furthermore, the nitride semiconductor device according to claim 1, further comprising a high-resistance layer made of nitride semiconductor material, having a higher resistance than the first nitride semiconductor layer, provided between the first nitride semiconductor layer and the second electron transport layer along the inner surface of the first opening.
The nitride semiconductor device according to claim 2, wherein the high-resistance layer contains iron.
The nitride semiconductor device according to claim 2 or 3, wherein the high-resistance layer is provided along the inner surface of the first opening, between the first electron supply layer and the second electron transport layer.
A gate electrode is provided above the second electron supply layer and covering the first opening, A nitride semiconductor device according to any one of claims 1 to 4, comprising: a second nitride semiconductor layer having the second conductivity type, provided between the gate electrode and the second electron supply layer.
The system comprises a source electrode connected to the first nitride semiconductor layer and the second electron transport layer, The nitride semiconductor device according to claim 5, wherein, when the substrate is viewed in plan view, the end of the gate electrode is located closer to the source electrode than the end of the first opening.
Furthermore, at a position away from the gate electrode, a second opening is provided that penetrates the second electron transport layer and reaches the first nitride semiconductor layer. The nitride semiconductor device according to claim 6, wherein at least a portion of the source electrode is provided within the second opening.
A substrate having a first main surface and a second main surface opposite to the first main surface, A first electron transport layer having a first conductivity type is provided above the first main surface, A first nitride semiconductor layer having a second conductivity type different from the first conductivity type is provided above the first electron transport layer, A second electron transport layer is provided in the upper portion of the first nitride semiconductor layer and in the portion along the inner surface of the first opening that penetrates the first nitride semiconductor layer and reaches the first electron transport layer, An electron supply layer is provided above the second electron transport layer and covering the first opening, Equipped with, The first electron transport layer is The third nitride semiconductor layer of the first conductivity type, A nitride semiconductor device comprising a fourth nitride semiconductor layer located between the third nitride semiconductor layer and the first nitride semiconductor layer, the fourth nitride semiconductor layer having a higher impurity concentration than the third nitride semiconductor layer.

Description

This disclosure relates to nitride semiconductor devices. Nitride semiconductors such as GaN (gallium nitride) are wide-bandgap semiconductors with a large bandgap, a high dielectric breakdown field, and a higher electron saturation drift rate compared to GaAs (gallium arsenide) or Si (silicon) semiconductors. Therefore, research and development of power transistors using nitride semiconductors, which are advantageous for high power output and high breakdown voltage, is being conducted. For example, Patent Document 1 discloses a semiconductor device formed on a GaN-based laminate. The semiconductor device described in Patent Document 1 is a vertical field-effect transistor (FET) comprising a regrowth layer positioned to cover an opening in the GaN-based laminate, and a gate electrode positioned on the regrowth layer along its path. A channel is formed by a two-dimensional electron gas (2DEG) generated in the regrowth layer, resulting in an FET with high mobility and low on-resistance. Japanese Patent Publication No. 2011-82397 Figure 1 is a plan view showing the planar layout of a nitride semiconductor device according to Embodiment 1.Figure 2 is a cross-sectional view of the nitride semiconductor device according to Embodiment 1.Figure 3A is a cross-sectional view showing the stacking process of a nitride semiconductor in the manufacturing method of a nitride semiconductor device according to Embodiment 1.Figure 3B is a cross-sectional view showing the resist patterning process in the method for manufacturing a nitride semiconductor device according to Embodiment 1.Figure 3C is a cross-sectional view showing the gate opening formation process in the method for manufacturing a nitride semiconductor device according to Embodiment 1.Figure 3D is a cross-sectional view showing the regrowth process of a nitride semiconductor in the manufacturing method of a nitride semiconductor device according to Embodiment 1.Figure 3E is a cross-sectional view showing the gate electrode formation process in the method for manufacturing a nitride semiconductor device according to Embodiment 1.Figure 3F is a cross-sectional view showing the process of forming a source opening in the method for manufacturing a nitride semiconductor device according to Embodiment 1.Figure 4 is a cross-sectional view of a nitride semiconductor device according to Modification 1.Figure 5A is a cross-sectional view showing the patterning process of the resist for the mask during ion implantation in the method for manufacturing a nitride semiconductor device according to Modification 1.Figure 5B is a cross-sectional view showing the ion implantation step in the method for manufacturing a nitride semiconductor device according to Modification 1.Figure 6 is a cross-sectional view of a nitride semiconductor device according to modified example 2.Figure 7 is a cross-sectional view of the nitride semiconductor device according to Embodiment 2.Figure 8 is a cross-sectional view of the nitride semiconductor device according to Embodiment 3. (Summary of this disclosure) To solve the above problems, a nitride semiconductor device according to one aspect of the present disclosure includes a substrate having a first main surface and a second main surface opposite to the first main surface, a first electron transport layer having a first conductivity type provided above the first main surface, a first electron supply layer provided above the first electron transport layer, a first nitride semiconductor layer having a second conductivity type different from the first conductivity type provided above the first electron supply layer, and a first electron transport layer penetrating the first electron supply layer and the first nitride semiconductor layer. The device comprises a first opening that reaches the layer, a second electron transport layer provided in the upper portion of the first nitride semiconductor layer and in the portion along the inner surface of the first opening, a second electron supply layer provided above the second electron transport layer and covering the first opening, a gate electrode provided above the second electron supply layer and covering the first opening, a source electrode connected to the first nitride semiconductor layer and the second electron transport layer, and a drain electrode provided on the second main surface side of the substrate. As a result, the two-dimensional electron gas generated in the first electron transport layer forms a channel, and the source-drain current flowing through the opening diffuses laterally along the channel within the first electron transport layer. In other words, the current path within the first electron transport layer can be widened, making it easier for the source-drain current to flow. Therefore, according to this embodiment, a nitride semiconductor device is provided that can reduce the resistance value during operation. Furthermore, for example, a nitride semiconductor device accordin