KR-102960302-B1 - Neuron circuit with synaptic weight learning

KR102960302B1KR 102960302 B1KR102960302 B1KR 102960302B1KR-102960302-B1

Abstract

A neuron circuit according to an embodiment of the present disclosure includes: a first internal circuit configured to receive a plurality of spike input signals, generate a first sum value by summing a plurality of synaptic weights corresponding to the plurality of spike input signals, and output a second sum value by summing a membrane potential value to the first sum value; a spike generation circuit configured to generate a spike output signal by comparing the second sum value with a threshold potential value; a membrane potential generation circuit configured to generate a membrane potential value by subtracting the threshold potential value from the second sum value based on the spike output signal and a lateral inhibition signal; a second internal circuit configured to count a final spike time based on the spike output signal; and an online learning circuit configured to receive a final input time from the first internal circuit and perform long-term reinforcement learning based on the final input time, or receive a final spike time from the second internal circuit and perform long-term weakening learning based on the final spike time.

Inventors

배영환
이재진
강태욱
김성은
변경진
오광일
전인산

Assignees

한국전자통신연구원

Dates

Publication Date: 20260507
Application Date: 20220314

Claims (17)

A first internal circuit configured to receive a plurality of spike input signals, generate a first sum value by summing a plurality of synaptic weights corresponding to the plurality of spike input signals, and output a second sum value by summing a membrane potential value to the first sum value; A spike generation circuit configured to generate a spike output signal by comparing the above second sum value with a threshold potential value; A membrane potential generation circuit configured to generate the membrane potential value by subtracting the threshold potential value from the second summed value based on the spike output signal and the lateral suppression signal; A second internal circuit configured to count the final spike time based on the above spike output signal; and The online learning circuit is configured to receive a final input time from the first internal circuit and perform long-term reinforcement learning based on the final input time, or to receive a final spike time from the second internal circuit and perform long-term weakening learning based on the final spike time, The above membrane potential generation circuit is: A first MUX configured to output a leakage value or a threshold potential value based on the spike output signal; A first subtractor configured to subtract the output value of the first MUX from the second sum value; A second MUX configured to output the output value of the first subtractor or 0 based on a selection signal; and A neuron circuit comprising a membrane potential register configured to store the output value of the second MUX as the membrane potential value.
In Article 1, The above first internal circuit is: An input register configured to convert and store the above plurality of spike input signals into Boolean values; A first count register configured to count the final input time, which is the time difference between when each of the plurality of spike input signals is input and when the spike output signal is generated; A synaptic weight register configured to sequentially extract and sum synaptic weight values for which the above Boolean value is True to generate the above first sum value; and A neuron circuit comprising a first adder configured to generate the second sum value by adding the membrane potential to the first sum value.
In Article 2, The above-mentioned first count register is a neuron circuit further configured to reset the final input time when the spike output signal is 1.
In Article 1, The above spike generation circuit is: A comparator configured to compare the second sum value and the threshold potential value, and to generate a spike generation signal when the second sum value is greater than the threshold potential value; A spike generator configured to generate the spike output signal in response to the spike generation signal; and A neuron circuit comprising a Vth adjuster configured to adjust the threshold potential value based on the spike output signal and provide the threshold potential value to the comparator.
In Paragraph 4, The above Vth regulator is further configured to output the threshold potential value by adding the threshold potential adjustment value to the stored existing threshold potential value when the spike output signal is 1.
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In Article 1, The neuron circuit further configured such that the first MUX outputs the threshold potential value when the spike output signal is 1, and outputs the leakage value, which is a constant value modeling the leakage current over time, when the spike output signal is 0.
In Article 1, The neuron circuit further configured such that the second MUX outputs 0 based on the selection signal which is 1 when both the inverted signal of the spike output signal and the lateral suppression signal are 1, and outputs the output value of the first subtractor based on the selection signal which is 0 when at least one of the inverted signal and the lateral suppression signal is not 1.
In Article 1, The second internal circuit includes a second count register configured to count the final spike time, which is the time elapsed since the last spike was generated, and The above second count register is a neuron circuit further configured to reset the final spike time when the spike output signal is 1.
In Article 1, The above online learning circuit is: A long-term reinforcement learning circuit configured to update the plurality of synaptic weights based on the final input time; and A neuron circuit comprising a long-term weakening learning circuit configured to update a plurality of synaptic weights based on the final spike time.
In Article 10, The above long-term reinforcement learning circuit is: A final input time register configured to load and store the final input time from the first internal circuit; An LTP table configured to store a quantized first weight learning rate value by setting the above final input time as an index; A first weight register configured to load a current synaptic weight from the first internal circuit and upload a first updated synaptic weight to the first internal circuit; and A neuron circuit comprising a second adder configured to generate the first updated synaptic weight by adding the first weight learning rate value to the current synaptic weight.
In Article 11, The above long-term weakening learning circuit is: A final spike time register configured to load and store the final spike time from the second internal circuit; An LTD table configured to store a quantized second weight learning rate value by setting the above-mentioned final spike time as an index; A second weight register configured to load the current synaptic weight from the first internal circuit and upload the second update synaptic weight to the first internal circuit; and A neuron circuit comprising a second subtractor configured to generate the second updated synaptic weight by subtracting the second weight learning rate value from the current synaptic weight.
In Article 12, The neuron circuit further configured such that the second weight register loads the current synaptic weight or uploads the second updated synaptic weight in response to an activation signal.
In Article 12, The first weight register and the second weight register are configured as a single integrated weight register, and The above online learning circuit further includes a neuron circuit configured to output the first updated synaptic weight to the integrated weight register when the spike output signal is 1, and output the second updated synaptic weight to the integrated weight register when the spike output signal is 0.
In a spiking neural network circuit comprising one or more hidden layers, The above one or more hidden layers are: A plurality of neuron circuits configured to perform online learning based on the Spike Timing Dependent Plasticity algorithm; and For adjacent first neuron circuits and second neuron circuits among the plurality of neuron circuits, the first OR gate performs an OR operation on a first spike output signal which is the output of the first neuron circuit and a second spike output signal which is the output of the second neuron circuit, wherein Each of the above plurality of neuron circuits is: A first internal circuit configured to receive a plurality of spike input signals, generate a first sum value by summing a plurality of synaptic weights corresponding to the plurality of spike input signals, and output a second sum value by summing a membrane potential value to the first sum value; A spike generation circuit configured to generate a spike output signal by comparing the above second sum value with a threshold potential value; A membrane potential generation circuit configured to generate the membrane potential value by subtracting the threshold potential value from the second summed value based on the spike output signal and the lateral suppression signal; A second internal circuit configured to count the final spike time based on the above spike output signal; and It includes an online learning circuit configured to receive a final input time from the first internal circuit and perform long-term reinforcement learning based on the final input time, or to receive a final spike time from the second internal circuit and perform long-term weakening learning based on the final spike time, and The above membrane potential generation circuit is: A first MUX configured to output a leakage value or a threshold potential value based on the spike output signal; A first subtractor configured to subtract the output value of the first MUX from the second sum value; A second MUX configured to output the output value of the first subtractor or 0 based on a selection signal; and A spiking neural network circuit comprising a membrane potential register configured to store the output value of the second MUX as the membrane potential value.
In Article 15, The first OR gate is a spiking neural network circuit configured to generate the lateral suppression signal based on the first spike output signal and the second spike output signal.
In Article 15, The above spiking neural network circuit is: A chain of OR gates comprising a plurality of OR gates that sequentially perform OR operations on the spike output signals of the plurality of neuron circuits, wherein The above OR gate chain is a spiking neural network circuit including the above first OR gate.

Description

Neuron circuit with synaptic weight learning The present disclosure relates to a neuron circuit for synaptic weight learning, and more specifically, to a neuron circuit capable of online learning in a neuromorphic system based on a spiking neural network. An artificial neural network refers to computing devices, such as those used to implement artificial neurons or the interconnections of such models. Convolutional Neural Networks (CNNs) and Recursive Neural Networks (RCNNs) have been proposed as implementation methods for artificial neural networks; furthermore, research on Spiking Neural Networks (SNNs) is gaining prominence to construct artificial neural networks similar to the structure of the human brain by mimicking biological structures. SNNs can learn synaptic weights (hereinafter referred to as synaptic weights) using the Spike Timing Dependent Plasticity algorithm. For SNN training, batch training can be used, in which data to be trained is grouped into fixed units and executed as a single batch. Since batch training consumes a significant amount of time and resources, it is generally performed offline. However, batch training requires retraining using the entire dataset for additional learning on new data, and the results must be uploaded back to the final inference system. This approach can be time-consuming and costly. Meanwhile, online learning trains the system by sequentially inputting data generated in the field as it occurs, either one by one or in small batches. Each learning step is fast and cost-effective, and the system can learn immediately as data is generated. Since completed data does not need to be stored, it does not require large amounts of memory; furthermore, the system's flexibility can be significantly enhanced by allowing additional learning using data generated in the field on top of results learned on the server. To enable online learning in SNNs, the neural circuits implemented in hardware must have learning capabilities. Since as many neural circuits as possible must be implemented on a chip, the neural circuits must have a structure that enables rapid learning with as little hardware as possible and also ensures high learning accuracy. FIG. 1 is a diagram illustrating the operation of a spiking neural network according to an embodiment of the present disclosure. FIGS. 2a and 2b are conceptual drawings illustrating the relationship between neurons and synapses of a spiking neural network according to an embodiment of the present disclosure. FIG. 3 is a block diagram of a neuron circuit according to an embodiment of the present disclosure. Figure 4 is a block diagram showing a specific embodiment of the neuron circuit of Figure 3. Figure 5 is a diagram showing the membrane potential after spike generation of the neuron circuit of Figure 4. Figures 6a and 6b are diagrams showing the long-term reinforcement learning circuit of Figure 4. Figures 7a and 7b are diagrams showing the long-term weakening learning circuit of Figure 4. Figures 8 and 9 are diagrams showing an example of integrating a long-term reinforcement learning circuit and a long-term weakening learning circuit. FIG. 10 is a drawing showing a hidden layer to which a neuron circuit according to an embodiment of the present disclosure is applied. In the following, embodiments of the present disclosure will be described clearly and in detail so that a person skilled in the art can easily practice the present disclosure. However, since the present disclosure may be implemented in various different forms within the scope of the claims, the embodiments described below are merely illustrative, regardless of expression. That is, the present disclosure is not limited to the embodiments disclosed below but may be implemented in various different forms. FIG. 1 is a diagram illustrating the operation of a spiking neural network according to an embodiment of the present invention. Referring to FIG. 1, a spiking neural network (SNN) may include a first layer (L1), a second layer (L2), and synapses (S). The first layer (L1) may include m axons (A1–Am), and the second layer (L2) may include n neurons (N1–Nn). Synapses (S) may connect the axons (A1–Am) and the neurons (N1–Nn). Here, m and n may be any natural numbers, and m and n may be different numbers or the same number. The axons (A1~Am) included in the first layer (L1) can each output an axon spike. Synapses (S) can transmit a spike signal with increased synaptic weight to neurons (N1~Nn) included in the second layer (L2) based on the output axon spike. Even if an axon spike is output from a single axon, the spike signal transmitted from each synapse (S) to the neurons (N1~Nn) may differ depending on the synaptic weight, which is the connection strength of each synapse (S). For example, if the synaptic weight of the first synapse is greater than the synaptic weight of the second synapse, the neuron connected to the first synapse may receive a spike signal with a larger va