KR-102960653-B1 - CIRCUIT BOARD AND PACKAGE SUBSTRATE HAVING THE SAME

KR102960653B1KR 102960653 B1KR102960653 B1KR 102960653B1KR-102960653-B1

Abstract

A circuit board according to an embodiment comprises: a first insulating layer; a second insulating layer disposed on the first insulating layer and including a cavity; and a first protective layer disposed on the second insulating layer and including an open portion vertically superimposed with the cavity, wherein the cavity has a first slope in which its width decreases as it faces the first insulating layer, and the open portion includes a first region in which its width changes with a second slope different from the first slope, and at least a portion of the first region of the open portion has the same width as the region adjacent to the first protective layer within the entire region of the cavity.

Inventors

정지철
신종배
이수민
정재훈

Assignees

엘지이노텍 주식회사

Dates

Publication Date: 20260507
Application Date: 20211105

Claims (18)

First insulating layer; A second insulating layer disposed on the first insulating layer and including a cavity; and It includes a first protective layer disposed on the second insulating layer and having an open portion vertically superimposed with the cavity, and The inner wall of the cavity has a first slope such that the width of the cavity in the horizontal direction decreases as it faces the first insulating layer, The inner wall of the above-mentioned open portion comprises a first region having a second slope such that the horizontal width of the open portion increases as it faces the first insulating layer, and a second region having a third slope different from the first slope and the second slope, which is more adjacent to the upper surface of the first protective layer than the first region. Circuit board.
In paragraph 1, The second inclination of the first region with respect to the upper surface of the first insulating layer superimposed vertically with respect to the cavity has a range between 80 and 100 degrees. Circuit board.
In paragraph 2, The first inclination of the cavity with respect to the upper surface of the first insulating layer superimposed vertically with respect to the cavity has a range between 91 and 130 degrees. Circuit board.
In any one of paragraphs 1 through 3, At least a portion of the first region of the above-mentioned open portion is equal to the width of the region closest to the first protective layer among the entire region of the cavity, Circuit board.
In any one of paragraphs 1 through 3, At least a portion of the second region of the above-mentioned open portion includes a curved surface, Circuit board.
First insulating layer; A second insulating layer disposed on the first insulating layer and including a cavity; and It includes a first protective layer disposed on the second insulating layer and having an open portion vertically superimposed with the cavity, and The inner wall of the cavity has a first slope such that the width of the cavity in the horizontal direction decreases as it faces the first insulating layer, The inner wall of the above-mentioned open portion includes a first region having a second slope such that the horizontal width of the open portion increases as it faces the first insulating layer, and The first region of the above-mentioned open portion is adjacent to the upper surface of the second insulating layer and includes a recessed portion that is sunken inwardly toward the first protective layer. Circuit board.
In paragraph 1 or 6, The above second slope is, The slope is between one end of the inner wall of the open portion adjacent to the upper surface of the first protective layer and the other end of the inner wall of the open portion adjacent to the lower surface of the first protective layer. The first inclination with respect to the upper surface of the first insulating layer, which is vertically superimposed with the cavity, is Smaller than the second slope with respect to the upper surface of the first insulating layer superimposed vertically with respect to the cavity, Circuit board.
In Paragraph 7, The second slope is greater than the first slope and has a range between 95 and 160 degrees. Circuit board.
In Paragraph 7, The above-mentioned open portion has a planar shape including a plurality of first convex portions that are convex toward the inner direction of the first protective layer, Circuit board.
In Paragraph 9, The above cavity includes a plurality of second convex portions that are convex toward the inner direction of the second insulating layer, and The size of the first convex portion is different from the size of the second convex portion. Circuit board.
In Paragraph 10, The size of the first convex portion is larger than the size of the second convex portion. Circuit board.
First insulating layer; A second insulating layer disposed on the first insulating layer and including a cavity; A first circuit pattern layer disposed between the first insulating layer and the second insulating layer; and It includes a first protective layer disposed on the second insulating layer and having an open portion vertically superimposed with the cavity, and The first circuit pattern layer above is, A first pad portion disposed on the first upper surface of the first insulating layer vertically superimposed with the above cavity, and A second pad portion disposed on the second upper surface of the first insulating layer that does not overlap vertically with the above cavity, and A trace including a direct connection between the first and second pad portions, Circuit board.
In Paragraph 12, The above trace is, A first portion disposed on the first upper surface of the first insulating layer, with one end directly connected to the first pad portion, and A second portion disposed on the second upper surface of the first insulating layer, the other end of which is connected to the second pad portion, Circuit board.
In Paragraph 12, The above second insulating layer is, It includes a portion that overlaps vertically with the above cavity and corresponds to the bottom surface of the above cavity, The bottom surface of the above cavity is, A structure positioned higher than the upper surface of the first insulating layer and lower than the upper surface of the first circuit pattern layer. Circuit board.
In Paragraph 14, The bottom surface of the above cavity is, A concave portion with respect to the first insulating layer, and A convex portion including a convex portion with respect to the first insulating layer. Circuit board.
First insulating layer; A second insulating layer disposed on the first insulating layer and including a cavity; A first circuit pattern layer comprising: a first pad portion disposed between the first insulating layer and the second insulating layer and disposed on a first upper surface of the first insulating layer that is vertically superimposed with the cavity; a second pad portion disposed on a second upper surface of the first insulating layer that is not vertically superimposed with the cavity; and a trace directly connecting the first pad portion and the second pad portion. A first protective layer disposed on the second insulating layer and including an open portion vertically superimposed with the cavity; A connection portion disposed on the first pad portion; and A chip comprising a chip disposed on the above-mentioned connection portion Package substrate.
In Paragraph 16, A molding layer disposed to fill at least a portion of the cavity and the open portion, comprising Package substrate.
In Paragraph 16, The above chip comprises a first chip and a second chip that are spaced apart from each other in the width direction or arranged in the vertical direction on the first insulating layer. Package substrate.

Description

Circuit board and package substrate having the same An embodiment relates to a circuit board and a package board including the same. Recently, efforts are being made to develop improved 5G (5th generation) communication systems or pre-5G communication systems to meet the demand for wireless data traffic. To achieve high data transfer rates, 5G communication systems use ultra-high frequency (mmWave) bands (sub 6 GHz, 28 GHz, 38 GHz, or higher frequencies). These high frequency bands are called mmWave due to their wavelengths. In order to mitigate path loss of radio waves in the ultra-high frequency band and increase the transmission distance of radio waves, aggregation technologies such as beamforming, massive MIMO, and array antennas are being developed in 5G communication systems. Considering that these frequency bands can consist of hundreds of active antennas of different wavelengths, the antenna system can be relatively large. This means that the multiple substrates forming the active antenna system—namely, the antenna substrate, antenna feed substrate, transceiver substrate, and baseband substrate—must be integrated into a single compact unit. Accordingly, the circuit board applied to conventional 5G communication systems had a structure in which multiple boards as described above were integrated, and thus had a relatively thick thickness. Accordingly, conventionally, the overall thickness of the circuit board was reduced by making the thickness of the insulating layer constituting the circuit board thin. However, there are limitations to manufacturing a circuit board by making the thickness of the insulating layer thin, and furthermore, as the thickness of the insulating layer becomes thin, there is a problem in that the circuit pattern is not stably protected. Accordingly, recently, a cavity for embedding a device has been formed on a circuit board using a drill bit, or auxiliary materials such as release film have been used for mounting the device, or a cavity for embedding a device has been formed using sandblasting. At this time, in order to form a cavity in a conventional circuit board, a stop layer was required in the cavity processing area to form a cavity of a desired depth. However, when using the stop layer, the process of removing the stop layer must be performed after the cavity is formed, which leads to the problem of a complex process. Furthermore, the stop layer is formed of metal, and accordingly, conventionally, the stop layer was removed by performing an etching process after the cavity was formed. However, during the etching process of the stop layer, the pad placed within the cavity is also removed, leading to deformation of the pad. Moreover, the same problem occurs even when the cavity is formed using a sandblasting process. Furthermore, the conventional circuit board formation process includes a first process of stacking a plurality of insulating layers, a second process of forming a cavity in the plurality of insulating layers, a third process of forming a protective layer on the plurality of insulating layers, and a fourth process of forming an open portion in the protective layer that overlaps vertically with the cavity. At this time, the process of forming the cavity is performed before the process of forming the open portion. Accordingly, in the process of forming the open portion in the protective layer, the width of the open portion of the protective layer is formed to be larger than the width of the cavity due to process deviations. Furthermore, as the width of the open portion of the protective layer is larger than the width of the cavity, there is a problem in that a dead region is formed corresponding to the area between the open portion and the inner wall of the cavity and the inner wall of the cavity. Moreover, the dead region increases the overall size of the circuit board. Additionally, if a circuit pattern layer exists in the area that overlaps vertically with the above region, a reliability problem may occur in which the circuit pattern layer is exposed through the cavity or the open portion. FIG. 1a is a cross-sectional view of the circuit board of the first comparative example. Figure 1b is a plan view of the circuit board of Figure 1a. FIG. 1c is a cross-sectional view of the circuit board of the second comparative example. FIGS. 2a and FIGS. 2b are drawings showing a circuit board according to the first embodiment. FIG. 3a is an enlarged view of the cavity area of either FIG. 2a or FIG. 2b. Fig. 3b is a plan view of Fig. 3a. Figure 3c shows a micrograph of a product corresponding to Figure 3a. FIG. 4a is a first drawing that enlarges the open area of either FIG. 2a or FIG. 2b. FIG. 4b is a second drawing that enlarges the open area of either FIG. 2a or FIG. 2b. FIG. 4c is a third drawing that enlarges the open area of either FIG. 2a or FIG. 2b. Figure 4d shows a micrograph of a product corresponding to Figure 4c. FIG. 5a is a drawing showing a circuit board