KR-102961389-B1 - Test board for semiconductor devices, test device for semiconductor devices including the same, evaluation device for semiconductor devices including the same, analysis device for semiconductor devices including the same, and test method for semiconductor devices using the same

Abstract

A test device for a semiconductor device is provided. The test device for a semiconductor device to be tested comprises a first circuit, an isolator receiving an output value of the first circuit, and a second circuit receiving an input value from the isolator. The test device for the semiconductor device may include a test board on which a plurality of the semiconductor devices to be tested are mounted, a plurality of switching modules that selectively transmit signals to the plurality of the semiconductor devices to be tested, and a control unit that determines whether the semiconductor devices to be tested are normal.

Inventors

• 이근우
• 강윤호
• 이소은
• 김동성
• 김기석
• 김영부

Assignees

• 큐알티 주식회사

Dates

Publication Date

20260511

Application Date

20250418

Priority Date

20250417

Claims (20)

1. A test device for a semiconductor device to be tested, comprising a first circuit, an isolator receiving an output value of the first circuit, and a second circuit receiving an input value from the isolator. A test board equipped with a plurality of the above-mentioned semiconductor devices to be tested; A first-1 switching module connected to the above test board, which selects one of the plurality of first circuits included in the plurality of semiconductor devices under test and supplies a first driving voltage to the selected first circuit; A first-2 switching module connected to the above test board, which selects one of a plurality of first circuits included in a plurality of semiconductor devices under test, and supplies a first ground voltage or a transient voltage to the selected first circuit; A first-3 switching module connected to the above test board, which selects one of the plurality of first circuits included in the plurality of semiconductor devices under test and transmits a test input signal to the selected first circuit; A 2-1 switching module connected to the above test board, which selects one of the plurality of second circuits included in the plurality of semiconductor devices under test and supplies a second driving voltage to the selected second circuit; A second-2 switching module connected to the above test board, which selects one of a plurality of second circuits included in a plurality of semiconductor devices under test, and supplies a second ground voltage or the transient voltage to the selected second circuit; A second-third switching module connected to the above test board, which selects one of the plurality of second circuits included in the plurality of semiconductor devices under test and receives a test output signal of the selected second circuit; and It includes a control unit that receives the test output signal from the second and third switching modules and determines whether the semiconductor device under test is normal. The above-mentioned 1-1 switching module, the above-mentioned 1-2 switching module, and the above-mentioned 1-3 switching module select the same 1 circuit among a plurality of the above-mentioned 1 circuits, and The above 2-1 switching module, the above 2-2 switching module, and the above 2-3 switching module select the same above 2 circuit among a plurality of above 2 circuits, and The above-mentioned first-1 switching module, the above-mentioned first-2 switching module, the above-mentioned first-3 switching module, the above-mentioned second-1 switching module, the above-mentioned second-2 switching module, and the above-mentioned second-3 switching module include selecting the same semiconductor device under test among a plurality of semiconductor devices under test, and The semiconductor device under test is mounted using a socket disposed on the test board, wherein the semiconductor device under test includes a terminal electrically connected to the socket, and the socket includes a pinhole formed through which the terminal is inserted and an elastic pin disposed inside the pinhole. It includes a state in which the elastic pin is positioned inside the pinhole, and as the terminal is inserted into the pinhole, the terminal comes into contact with the elastic pin, thereby electrically connecting the semiconductor device under test and the test board. A test device for a semiconductor device comprising the above elastic pin including a cushioning member including a center and an edge portion surrounding the center, wherein the center has relatively high conductivity compared to the edge portion and the edge portion has relatively high elasticity compared to the center.
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3. In Article 1, A test device for a semiconductor device further comprising a first power supply unit that supplies the first driving voltage to the first-1 switching module.
4. In Paragraph 3, A test device for a semiconductor device further comprising a second power supply unit that supplies the second driving voltage to the second-1 switching module.
5. In Paragraph 4, A test device for a semiconductor device comprising the first power supply and the second power supply being individually provided.
6. In Article 5, The above-mentioned first power supply unit is, 1st battery section; and A test device for a semiconductor device comprising a first DC-DC converter that converts the voltage supplied from the first battery unit into the first driving voltage.
7. In Article 6, The second power supply unit is, 2nd battery section; and A test device for a semiconductor device comprising a second DC-DC converter that converts the voltage supplied from the second battery unit into the second driving voltage.
8. In Article 7, A plurality of the above-mentioned semiconductor devices under test include a first semiconductor device under test and a second semiconductor device under test, and A test device for a semiconductor device comprising the above-mentioned first-1 switching module, the above-mentioned first-2 switching module, and the above-mentioned first-3 switching module, selecting the above-mentioned first circuit included in the above-mentioned first semiconductor device under test, and transmitting the above-mentioned first driving voltage, the above-mentioned first ground voltage or the above-mentioned transient voltage, and the above-mentioned test input signal to the above-mentioned first circuit.
9. In Article 8, A plurality of the above-mentioned semiconductor devices under test include a first semiconductor device under test and a second semiconductor device under test, and A test device for a semiconductor device comprising the above-mentioned 2-1 switching module, the above-mentioned 2-2 switching module, and the above-mentioned 2-3 switching module selecting the above-mentioned 2nd circuit included in the above-mentioned 1st semiconductor device under test, transmitting the above-mentioned 2nd driving voltage and the above-mentioned 2nd ground voltage or the above-mentioned transient voltage to the above-mentioned 2nd circuit, and receiving the above-mentioned test output signal from the above-mentioned 2nd circuit.
10. In Article 9, A test device for a semiconductor device comprising: the first-1 switching module, the first-2 switching module, and the first-3 switching module selecting the first circuit included in the first semiconductor device under test and transmitting the first driving voltage, the first ground voltage or the transient voltage, and the test input signal to the first circuit, while the second-1 switching module, the second-2 switching module, and the second-3 switching module selecting the second circuit included in the first semiconductor device under test and transmitting the second driving voltage and the second ground voltage or the transient voltage to the second circuit, and receiving the test output signal from the second circuit.
11. In Article 10, After determining whether the above-mentioned first semiconductor device under test is normal, The first-1 switching module, the first-2 switching module, and the first-3 switching module select the first circuit included in the second semiconductor device under test, and transmit the first driving voltage, the first ground voltage or the transient voltage, and the test input signal to the first circuit, and A test device for a semiconductor device comprising the above-mentioned second-1 switching module, the above-mentioned second-2 switching module, and the above-mentioned second-3 switching module, selecting the second circuit included in the second semiconductor device under test, transmitting the second driving voltage and the second ground voltage or the transient voltage to the second circuit, and receiving the test output signal from the second circuit.
12. A test method for a semiconductor device to be tested, comprising a first circuit, an isolator receiving an output value of the first circuit, and a second circuit receiving an input value from the isolator. A step of preparing a test board equipped with a plurality of the above-mentioned semiconductor devices to be tested; A step of selecting one of the plurality of first circuits included in the plurality of semiconductor devices under test through a first-1 switching module, and supplying a first driving voltage to the selected first circuit; A step of selecting one of a plurality of first circuits included in a plurality of semiconductor devices under test through a first-2 switching module, and supplying a first ground voltage or a transient voltage to the selected first circuit; A step of selecting one of the plurality of first circuits included in the plurality of semiconductor devices under test through the first-third switching module, and transmitting a test input signal to the selected first circuit; A step of selecting one of the plurality of second circuits included in the plurality of semiconductor devices under test through a second-1 switching module, and supplying a second driving voltage to the selected second circuit; A step of selecting one of the plurality of second circuits included in the plurality of semiconductor devices under test through a second-2 switching module, and supplying a second ground voltage or the transient voltage to the selected second circuit; A step of selecting one of the plurality of second circuits included in the plurality of semiconductor devices under test through a second-third switching module, and receiving a test output signal of the selected second circuit; and The method includes the step of receiving the above test output signal and determining whether the above semiconductor device under test is normal, The above-mentioned 1-1 switching module, the above-mentioned 1-2 switching module, and the above-mentioned 1-3 switching module select the same 1 circuit among a plurality of the above-mentioned 1 circuits, and The above 2-1 switching module, the above 2-2 switching module, and the above 2-3 switching module select the same above 2 circuit among a plurality of above 2 circuits, and The above-mentioned first-1 switching module, the above-mentioned first-2 switching module, the above-mentioned first-3 switching module, the above-mentioned second-1 switching module, the above-mentioned second-2 switching module, and the above-mentioned second-3 switching module include selecting the same semiconductor device under test among a plurality of semiconductor devices under test, and The semiconductor device under test is mounted using a socket disposed on the test board, wherein the semiconductor device under test includes a terminal electrically connected to the socket, and the socket includes a pinhole formed through which the terminal is inserted and an elastic pin disposed inside the pinhole. It includes a state in which the elastic pin is positioned inside the pinhole, and as the terminal is inserted into the pinhole, the terminal comes into contact with the elastic pin, thereby electrically connecting the semiconductor device under test and the test board. A method for testing a semiconductor device, wherein the elastic pin comprises a cushioning member including a center and an edge portion surrounding the center, wherein the center has relatively higher conductivity compared to the edge portion and the edge portion has relatively higher elasticity compared to the center.
13. In a test device for a semiconductor device to be tested, comprising a first circuit, an isolator receiving an output value of the first circuit, and a second circuit receiving an input value from the isolator, A test board equipped with a plurality of the above-mentioned semiconductor devices to be tested; A first-1 switching module that selects one of the plurality of first circuits included in the plurality of semiconductor devices under test and supplies a first driving voltage to the selected first circuit; A first-2 switching module that selects one of the plurality of first circuits included in the plurality of semiconductor devices under test and supplies a first ground voltage or a transient voltage to the selected first circuit; A first-3 switching module that selects one of the plurality of first circuits included in the plurality of semiconductor devices under test and transmits a test input signal to the selected first circuit; A second-1 switching module that selects one of the plurality of second circuits included in the plurality of semiconductor devices under test and supplies a second driving voltage to the selected second circuit; A second-2 switching module that selects one of the plurality of second circuits included in the plurality of semiconductor devices under test and supplies a second ground voltage or the transient voltage to the selected second circuit; A second-third switching module that selects one of the plurality of second circuits included in the plurality of semiconductor devices under test and receives a test output signal of the selected second circuit; and A control unit that receives the test output signal from the second and third switching modules and determines whether the semiconductor device under test is normal, The above-mentioned 1-1 switching module, the above-mentioned 1-2 switching module, and the above-mentioned 1-3 switching module select the same 1 circuit among a plurality of the above-mentioned 1 circuits, and The above 2-1 switching module, the above 2-2 switching module, and the above 2-3 switching module select the same above 2 circuit among a plurality of above 2 circuits, and The above-mentioned first-1 switching module, the above-mentioned first-2 switching module, the above-mentioned first-3 switching module, the above-mentioned second-1 switching module, the above-mentioned second-2 switching module, and the above-mentioned second-3 switching module include selecting the same semiconductor device under test among a plurality of semiconductor devices under test, wherein The semiconductor device under test is mounted using a socket disposed on the test board, wherein the semiconductor device under test includes a terminal electrically connected to the socket, and the socket includes a pinhole formed through which the terminal is inserted and an elastic pin disposed inside the pinhole. It includes a state in which the elastic pin is positioned inside the pinhole, and as the terminal is inserted into the pinhole, the terminal comes into contact with the elastic pin, thereby electrically connecting the semiconductor device under test and the test board. A semiconductor device inspection device comprising the above elastic pin including a cushioning member including a center and an edge portion surrounding the center, wherein the center has relatively higher conductivity compared to the edge portion and the edge portion has relatively higher elasticity compared to the center.
14. A device for determining whether a semiconductor device under test is defective, comprising a first circuit, an isolator receiving an output value of the first circuit, and a second circuit receiving an input value from the isolator. A test board equipped with a plurality of the above-mentioned semiconductor devices to be tested; A first-1 switching module connected to the above test board, which selects one of the plurality of first circuits included in the plurality of semiconductor devices under test and supplies a first driving voltage to the selected first circuit; A first-2 switching module connected to the above test board, which selects one of a plurality of first circuits included in a plurality of semiconductor devices under test, and supplies a first ground voltage or a transient voltage to the selected first circuit; A first-3 switching module connected to the above test board, which selects one of the plurality of first circuits included in the plurality of semiconductor devices under test and transmits a test input signal to the selected first circuit; A 2-1 switching module connected to the above test board, which selects one of the plurality of second circuits included in the plurality of semiconductor devices under test and supplies a second driving voltage to the selected second circuit; A second-2 switching module connected to the above test board, which selects one of a plurality of second circuits included in a plurality of semiconductor devices under test, and supplies a second ground voltage or the transient voltage to the selected second circuit; A second-third switching module connected to the above test board, which selects one of the plurality of second circuits included in the plurality of semiconductor devices under test and receives a test output signal of the selected second circuit; and A control unit that receives the test output signal from the second and third switching modules and determines whether the semiconductor device under test is normal, The above-mentioned 1-1 switching module, the above-mentioned 1-2 switching module, and the above-mentioned 1-3 switching module select the same 1 circuit among a plurality of the above-mentioned 1 circuits, and The above 2-1 switching module, the above 2-2 switching module, and the above 2-3 switching module select the same above 2 circuit among a plurality of above 2 circuits, and The above-mentioned first-1 switching module, the above-mentioned first-2 switching module, the above-mentioned first-3 switching module, the above-mentioned second-1 switching module, the above-mentioned second-2 switching module, and the above-mentioned second-3 switching module include selecting the same semiconductor device under test among a plurality of semiconductor devices under test, wherein The semiconductor device under test is mounted using a socket disposed on the test board, wherein the semiconductor device under test includes a terminal electrically connected to the socket, and the socket includes a pinhole formed through which the terminal is inserted and an elastic pin disposed inside the pinhole. It includes a state in which the elastic pin is positioned inside the pinhole, and as the terminal is inserted into the pinhole, the terminal comes into contact with the elastic pin, thereby electrically connecting the semiconductor device under test and the test board. A device for determining defects in a semiconductor device, wherein the elastic pin comprises a cushioning member including a center and an edge portion surrounding the center, wherein the center has relatively higher conductivity compared to the edge portion and the edge portion has relatively higher elasticity compared to the center.
15. An analysis device for a semiconductor device under test comprising a first circuit, an isolator receiving an output value of the first circuit, and a second circuit receiving an input value from the isolator, A test board equipped with a plurality of the above-mentioned semiconductor devices to be tested; A first-1 switching module connected to the above test board, which selects one of the plurality of first circuits included in the plurality of semiconductor devices under test and supplies a first driving voltage to the selected first circuit; A first-2 switching module connected to the above test board, which selects one of a plurality of first circuits included in a plurality of semiconductor devices under test, and supplies a first ground voltage or a transient voltage to the selected first circuit; A first-3 switching module connected to the above test board, which selects one of the plurality of first circuits included in the plurality of semiconductor devices under test and transmits a test input signal to the selected first circuit; A 2-1 switching module connected to the above test board, which selects one of the plurality of the second circuits included in the plurality of the semiconductor devices under test and supplies a second driving voltage to the selected second circuit; A second-2 switching module connected to the above test board, which selects one of a plurality of second circuits included in a plurality of semiconductor devices under test, and supplies a second ground voltage or the transient voltage to the selected second circuit; A second-third switching module connected to the above test board, which selects one of the plurality of second circuits included in the plurality of semiconductor devices under test and receives a test output signal of the selected second circuit; and A control unit that receives the test output signal from the second and third switching modules and determines whether the semiconductor device under test is normal, The above-mentioned 1-1 switching module, the above-mentioned 1-2 switching module, and the above-mentioned 1-3 switching module select the same 1 circuit among a plurality of the above-mentioned 1 circuits, and The above 2-1 switching module, the above 2-2 switching module, and the above 2-3 switching module select the same above 2 circuit among a plurality of above 2 circuits, and The above-mentioned first-1 switching module, the above-mentioned first-2 switching module, the above-mentioned first-3 switching module, the above-mentioned second-1 switching module, the above-mentioned second-2 switching module, and the above-mentioned second-3 switching module include selecting the same semiconductor device under test among a plurality of semiconductor devices under test, wherein The semiconductor device under test is mounted using a socket disposed on the test board, wherein the semiconductor device under test includes a terminal electrically connected to the socket, and the socket includes a pinhole formed through which the terminal is inserted and an elastic pin disposed inside the pinhole. It includes a state in which the elastic pin is positioned inside the pinhole, and as the terminal is inserted into the pinhole, the terminal comes into contact with the elastic pin, thereby electrically connecting the semiconductor device under test and the test board. An analysis device for a semiconductor device comprising the above elastic pin including a cushioning member including a center and an edge portion surrounding the center, wherein the center has relatively high conductivity compared to the edge portion and the edge portion has relatively high elasticity compared to the center.
16. A method for testing a semiconductor device to be tested, comprising a first circuit, an isolator receiving an output value of the first circuit, and a second circuit receiving an input value from the isolator. A step of preparing a test board equipped with a plurality of the above-mentioned semiconductor devices to be tested; A step of selecting one of a plurality of first circuits included in a plurality of semiconductor devices under test using a first-1 switching module connected to the test board, and supplying a first driving voltage to the selected first circuit; A step of selecting one of a plurality of first circuits included in a plurality of semiconductor devices under test using a first-2 switching module connected to the test board, and supplying a first ground voltage or transient voltage to the selected first circuit; A step of selecting one of a plurality of first circuits included in a plurality of semiconductor devices under test using a first-to-third switching module connected to the test board, and transmitting a test input signal to the selected first circuit; A step of selecting one of the plurality of second circuits included in the plurality of semiconductor devices under test using a second-1 switching module connected to the test board, and supplying a second driving voltage to the selected second circuit; A step of selecting one of a plurality of second circuits included in a plurality of semiconductor devices under test using a second-2 switching module connected to the test board, and supplying a second ground voltage or the transient voltage to the selected second circuit; A step of selecting one of the plurality of second circuits included in the plurality of semiconductor devices under test using a second-third switching module connected to the test board, and receiving a test output signal of the selected second circuit; and The method includes the step of receiving the above test output signal and determining whether the above semiconductor device under test is normal, The above-mentioned 1-1 switching module, the above-mentioned 1-2 switching module, and the above-mentioned 1-3 switching module select the same 1 circuit among a plurality of the above-mentioned 1 circuits, and The above 2-1 switching module, the above 2-2 switching module, and the above 2-3 switching module select the same above 2 circuit among a plurality of above 2 circuits, and The above-mentioned first-1 switching module, the above-mentioned first-2 switching module, the above-mentioned first-3 switching module, the above-mentioned second-1 switching module, the above-mentioned second-2 switching module, and the above-mentioned second-3 switching module include selecting the same semiconductor device under test among a plurality of semiconductor devices under test, wherein The semiconductor device under test is mounted using a socket disposed on the test board, wherein the semiconductor device under test includes a terminal electrically connected to the socket, and the socket includes a pinhole formed through which the terminal is inserted and an elastic pin disposed inside the pinhole. It includes a state in which the elastic pin is positioned inside the pinhole, and as the terminal is inserted into the pinhole, the terminal comes into contact with the elastic pin, thereby electrically connecting the semiconductor device under test and the test board. A method for inspecting a semiconductor device, wherein the elastic pin comprises a cushioning member including a center and an edge portion surrounding the center, wherein the center has relatively higher conductivity compared to the edge portion and the edge portion has relatively higher elasticity compared to the center.
17. A method for determining whether a semiconductor device under test is defective, comprising a first circuit, an isolator receiving an output value of the first circuit, and a second circuit receiving an input value from the isolator. A step of preparing a test board equipped with a plurality of the above-mentioned semiconductor devices to be tested; A step of selecting one of the plurality of first circuits included in the plurality of semiconductor devices under test through a first-1 switching module, and supplying a first driving voltage to the selected first circuit. A step of selecting one of a plurality of first circuits included in a plurality of semiconductor devices under test through a first-2 switching module, and supplying a first ground voltage or a transient voltage to the selected first circuit; A step of selecting one of the plurality of first circuits included in the plurality of semiconductor devices under test through the first-third switching module, and transmitting a test input signal to the selected first circuit; A step of selecting one of the plurality of second circuits included in the plurality of semiconductor devices under test through a second-1 switching module, and supplying a second driving voltage to the selected second circuit; A step of selecting one of the plurality of second circuits included in the plurality of semiconductor devices under test through a second-2 switching module, and supplying a second ground voltage or the transient voltage to the selected second circuit; A step of selecting one of the plurality of second circuits included in the plurality of semiconductor devices under test through a second-third switching module, and receiving a test output signal of the selected second circuit; and The method includes the step of receiving the above test output signal and determining whether the above semiconductor device under test is normal, The above-mentioned 1-1 switching module, the above-mentioned 1-2 switching module, and the above-mentioned 1-3 switching module select the same 1 circuit among a plurality of the above-mentioned 1 circuits, and The above 2-1 switching module, the above 2-2 switching module, and the above 2-3 switching module select the same above 2 circuit among a plurality of above 2 circuits, and The above-mentioned first-1 switching module, the above-mentioned first-2 switching module, the above-mentioned first-3 switching module, the above-mentioned second-1 switching module, the above-mentioned second-2 switching module, and the above-mentioned second-3 switching module include selecting the same semiconductor device under test among a plurality of semiconductor devices under test, wherein The semiconductor device under test is mounted using a socket disposed on the test board, wherein the semiconductor device under test includes a terminal electrically connected to the socket, and the socket includes a pinhole formed through which the terminal is inserted and an elastic pin disposed inside the pinhole. It includes a state in which the elastic pin is positioned inside the pinhole, and as the terminal is inserted into the pinhole, the terminal comes into contact with the elastic pin, thereby electrically connecting the semiconductor device under test and the test board. A method for determining whether a semiconductor device is defective, wherein the elastic pin comprises a cushioning member including a center and an edge portion surrounding the center, wherein the center has relatively higher conductivity compared to the edge portion and the edge portion has relatively higher elasticity compared to the center.
18. A method for analyzing a semiconductor device under test, comprising a first circuit, an isolator receiving an output value of the first circuit, and a second circuit receiving an input value from the isolator. A step of preparing a test board equipped with a plurality of the above-mentioned semiconductor devices to be tested; A step of selecting one of the plurality of first circuits included in the plurality of semiconductor devices under test through a first-1 switching module, and supplying a first driving voltage to the selected first circuit; A step of selecting one of a plurality of first circuits included in a plurality of semiconductor devices under test through a first-2 switching module, and supplying a first ground voltage or a transient voltage to the selected first circuit; A step of selecting one of the plurality of first circuits included in the plurality of semiconductor devices under test through the first-third switching module, and transmitting a test input signal to the selected first circuit; A step of selecting one of the plurality of second circuits included in the plurality of semiconductor devices under test through a second-1 switching module, and supplying a second driving voltage to the selected second circuit; A step of selecting one of the plurality of second circuits included in the plurality of semiconductor devices under test through a second-2 switching module, and supplying a second ground voltage or the transient voltage to the selected second circuit; A step of selecting one of the plurality of second circuits included in the plurality of semiconductor devices under test through a second-third switching module, and receiving a test output signal of the selected second circuit; and The method includes the step of receiving the above test output signal and determining whether the above semiconductor device under test is normal, The above-mentioned 1-1 switching module, the above-mentioned 1-2 switching module, and the above-mentioned 1-3 switching module select the same 1 circuit among a plurality of the above-mentioned 1 circuits, and The above 2-1 switching module, the above 2-2 switching module, and the above 2-3 switching module select the same above 2 circuit among a plurality of above 2 circuits, and The above-mentioned first-1 switching module, the above-mentioned first-2 switching module, the above-mentioned first-3 switching module, the above-mentioned second-1 switching module, the above-mentioned second-2 switching module, and the above-mentioned second-3 switching module include selecting the same semiconductor device under test among a plurality of semiconductor devices under test, wherein The semiconductor device under test is mounted using a socket disposed on the test board, wherein the semiconductor device under test includes a terminal electrically connected to the socket, and the socket includes a pinhole formed through which the terminal is inserted and an elastic pin disposed inside the pinhole. It includes a state in which the elastic pin is positioned inside the pinhole, and as the terminal is inserted into the pinhole, the terminal comes into contact with the elastic pin, thereby electrically connecting the semiconductor device under test and the test board. A method for analyzing a semiconductor device, wherein the elastic pin comprises a cushioning member including a center and an edge portion surrounding the center, wherein the center has relatively higher conductivity compared to the edge portion and the edge portion has relatively higher elasticity compared to the center.
19. A test device for a semiconductor device to be tested, comprising a first circuit, an isolator receiving an output value of the first circuit, and a second circuit receiving an input value from the isolator. A test board equipped with a plurality of the above-mentioned semiconductor devices to be tested; A first-1 switching module connected to the above test board, which selects one of the plurality of first circuits included in the plurality of semiconductor devices under test and supplies a first driving voltage to the selected first circuit; A first-2 switching module connected to the above test board, which selects one of a plurality of first circuits included in a plurality of semiconductor devices under test, and supplies a first ground voltage or a transient voltage to the selected first circuit; A first-3 switching module connected to the above test board, which selects one of the plurality of first circuits included in the plurality of semiconductor devices under test and transmits a test input signal to the selected first circuit; A 2-1 switching module connected to the above test board, which selects one of the plurality of second circuits included in the plurality of semiconductor devices under test and supplies a second driving voltage to the selected second circuit; A second-2 switching module connected to the above test board, which selects one of a plurality of second circuits included in a plurality of semiconductor devices under test, and supplies a second ground voltage or the transient voltage to the selected second circuit; A second-third switching module connected to the above test board, which selects one of the plurality of second circuits included in the plurality of semiconductor devices under test and receives a test output signal of the selected second circuit; and It includes a control unit that receives the test output signal from the second and third switching modules and determines whether the semiconductor device under test is normal. The above-mentioned 1-1 switching module, the above-mentioned 1-2 switching module, and the above-mentioned 1-3 switching module select the same 1 circuit among a plurality of the above-mentioned 1 circuits, and The above 2-1 switching module, the above 2-2 switching module, and the above 2-3 switching module select the same above 2 circuit among a plurality of above 2 circuits, and The above-mentioned first-1 switching module, the above-mentioned first-2 switching module, the above-mentioned first-3 switching module, the above-mentioned second-1 switching module, the above-mentioned second-2 switching module, and the above-mentioned second-3 switching module include selecting the same semiconductor device under test among a plurality of semiconductor devices under test, and The semiconductor device under test is mounted using a socket disposed on the test board, wherein the semiconductor device under test includes a terminal electrically connected to the socket, and the socket includes a pinhole formed through which the terminal is inserted and an elastic pin disposed inside the pinhole. It includes a state in which the elastic pin is positioned inside the pinhole, and as the terminal is inserted into the pinhole, the terminal comes into contact with the elastic pin, thereby electrically connecting the semiconductor device under test and the test board. The above elastic pin includes a cushioning member comprising a center and an edge portion surrounding the center, wherein the center has relatively higher conductivity compared to the edge portion and the edge portion has relatively higher elasticity compared to the center. A test device for a semiconductor device comprising the above-mentioned central portion and the above-mentioned edge portion, wherein the above-mentioned central portion has a higher proportion of the conductive polymer than the proportion of the elastomer, and the above-mentioned edge portion has a lower proportion of the conductive polymer than the proportion of the elastomer.
20. A test device for a semiconductor device to be tested, comprising a first circuit, an isolator receiving an output value of the first circuit, and a second circuit receiving an input value from the isolator. A test board equipped with a plurality of the above-mentioned semiconductor devices to be tested; A first-1 switching module connected to the above test board, which selects one of the plurality of first circuits included in the plurality of semiconductor devices under test and supplies a first driving voltage to the selected first circuit; A first-2 switching module connected to the above test board, which selects one of a plurality of first circuits included in a plurality of semiconductor devices under test, and supplies a first ground voltage or a transient voltage to the selected first circuit; A first-3 switching module connected to the above test board, which selects one of the plurality of first circuits included in the plurality of semiconductor devices under test and transmits a test input signal to the selected first circuit; A 2-1 switching module connected to the above test board, which selects one of the plurality of second circuits included in the plurality of semiconductor devices under test and supplies a second driving voltage to the selected second circuit; A second-2 switching module connected to the above test board, which selects one of a plurality of second circuits included in a plurality of semiconductor devices under test, and supplies a second ground voltage or the transient voltage to the selected second circuit; A second-third switching module connected to the above test board, which selects one of the plurality of second circuits included in the plurality of semiconductor devices under test and receives a test output signal of the selected second circuit; and It includes a control unit that receives the test output signal from the second and third switching modules and determines whether the semiconductor device under test is normal. The above-mentioned 1-1 switching module, the above-mentioned 1-2 switching module, and the above-mentioned 1-3 switching module select the same 1 circuit among a plurality of the above-mentioned 1 circuits, and The above 2-1 switching module, the above 2-2 switching module, and the above 2-3 switching module select the same above 2 circuit among a plurality of above 2 circuits, and The above-mentioned first-1 switching module, the above-mentioned first-2 switching module, the above-mentioned first-3 switching module, the above-mentioned second-1 switching module, the above-mentioned second-2 switching module, and the above-mentioned second-3 switching module include selecting the same semiconductor device under test among a plurality of semiconductor devices under test, and The semiconductor device under test is mounted using a socket disposed on the test board, wherein the semiconductor device under test includes a terminal electrically connected to the socket, and the socket includes a pinhole formed through which the terminal is inserted and an elastic pin disposed inside the pinhole. It includes a state in which the elastic pin is positioned inside the pinhole, and as the terminal is inserted into the pinhole, the terminal comes into contact with the elastic pin, thereby electrically connecting the semiconductor device under test and the test board. The above elastic pin includes a cushioning member comprising a center and an edge portion surrounding the center, wherein the center has relatively higher conductivity compared to the edge portion and the edge portion has relatively higher elasticity compared to the center. The above central part and the above edge part both comprise a conductive polymer and an elastomer, wherein the ratio of the conductive polymer in the central part is higher than the ratio of the elastomer, and the ratio of the conductive polymer in the edge part is lower than the ratio of the elastomer. A test device for a semiconductor device comprising any one of the conductive polymers polyaniline (PANI), polypyrrole (PPy), polythiophene (PTs), PEDOT:PSS, and polyacetylene (PA).

Description

Test board for semiconductor devices, test device for semiconductor devices including the same, evaluation device for semiconductor devices including the same, analysis device for semiconductor devices including the same, and test method for semiconductor devices using the same The present application relates to a test, analysis, and evaluation apparatus for semiconductor devices, and more specifically, to a test board for a semiconductor device, a test apparatus for a semiconductor device including the same, an evaluation apparatus for a semiconductor device including the same, an analysis apparatus for a semiconductor device including the same, and a method for testing a semiconductor device using the same. Semiconductors are widely used not only in computers, mobile phones, and TVs but also in home electronic products, and have now permeated every corner of our daily lives. Semiconductors enable video and voice communication in TVs and mobile phones, while those found in home appliances such as rice cookers, microwave ovens, air conditioners, refrigerators, and washing machines control them to operate optimally with just simple operations. These semiconductors are installed in automobiles in quantities ranging from hundreds to thousands; in particular, for semiconductors used in fields such as autonomous vehicles and unmanned aerial vehicles, operational reliability is directly linked to life and safety, so semiconductor reliability evaluation is recognized as one of the most critical processes. Reliability evaluation of semiconductors involves conducting tests to determine whether they operate without error even under the worst environmental conditions, such as high pressure, high temperature, and high humidity, and how long their lifespan is in response to environmental changes, thereby predicting errors in semiconductors exposed to specific environments and evaluating their reliability. For example, Korean Patent Publication No. 10-1045009 discloses a temperature evaluation device for a semiconductor RAM having a closed-type circulation structure comprising a thermoelectric unit that controls the temperature of the semiconductor RAM by being installed in a direction perpendicular to the semiconductor RAM and comprising a heat exchange unit that is bonded to one side of the thermoelectric semiconductor to cool and heat the air inside the chamber, and a heat dissipation unit that is bonded to the other side of the thermoelectric semiconductor to discharge the heat generated by the thermoelectric semiconductor; an insulating chamber installed on the outer edge of the thermoelectric unit to separate the thermoelectric unit from the external environment, and an internal partition structure installed to surround the heat dissipation unit to separate the heat dissipation unit of the thermoelectric unit from the insulating chamber. As another example, Korean Patent Publication No. 10-1421051 discloses a semiconductor inspection device characterized by comprising: a guide plate having a plurality of guide holes and a conductive wire support hole formed on one side; a plurality of inspection pins inserted into the guide holes and having their lower ends electrically contacting a semiconductor to be inspected; one or more conductive wires inserted into the conductive wire support holes and arranged around a power inspection pin or a signal inspection pin among the plurality of inspection pins; and a conductive connection means electrically connecting a grounding inspection pin among the plurality of inspection pins and the conductive wire. FIG. 1 is a drawing for explaining a test apparatus for a semiconductor device according to an embodiment of the present application. FIG. 2 is intended to illustrate a test board included in a test device for a semiconductor device according to an embodiment of the present application. FIG. 3 is intended to illustrate a semiconductor device to be tested included in a test board of a semiconductor device test device according to an embodiment of the present application. FIG. 4 is intended to explain a first circuit, an isolator, and a second circuit included in a semiconductor device under test of a test board of a test device for a semiconductor device according to an embodiment of the present application. FIG. 5 is a flowchart for explaining a test method for a semiconductor device according to an embodiment of the present application. FIG. 6 is a drawing for explaining a first semiconductor device to be tested connected according to a first example of a switching unit in a test device of a semiconductor device according to an embodiment of the present application. FIG. 7 is a diagram illustrating how signals are transmitted to a first semiconductor device under test according to a first example of a switching unit in a test device of a semiconductor device according to an embodiment of the present application. FIG. 8 is a drawing for explaining a connection to a second semi