Search

KR-102962382-B1 - METHOD OF DICING A WAFER

KR102962382B1KR 102962382 B1KR102962382 B1KR 102962382B1KR-102962382-B1

Abstract

The present disclosure provides a wafer cutting method for cutting a wafer having a plurality of devices formed by a multilayer structure stacked on the surface of a substrate along a plurality of scribe lines that partition the plurality of devices, the method comprising: forming a protective film on the wafer; performing a laser grooving process by irradiating a first laser light onto the wafer having the protective film formed thereon to form a first groove that exposes a portion of the surface of the substrate; performing a laser ablation process by irradiating a second laser light onto the portion of the surface of the substrate exposed through the first groove to form a second groove; performing plasma etching along the second groove using the protective film as a mask; and removing the protective film.

Inventors

  • 윤성진
  • 윤회정
  • 박종범
  • 전진표
  • 설봉호
  • 김태철
  • 장동현

Assignees

  • 피에스케이홀딩스 (주)

Dates

Publication Date
20260508
Application Date
20250612

Claims (11)

  1. A wafer cutting method for cutting a wafer having a plurality of devices formed by a multilayer structure stacked on the surface of a substrate along a plurality of scribe lines that partition the plurality of devices, A step of forming a protective film on the wafer; A step of forming a first groove that exposes a portion of the surface of the substrate by performing a laser grooving process by irradiating a first laser light onto the wafer having the protective film formed thereon; A step of forming a second groove that removes a portion of the substrate by performing a laser ablation process in which a second laser light having an output smaller than that of the first laser light is irradiated onto a portion of the surface of the substrate exposed through the first groove; A step of performing plasma etching along the second groove using the protective film as a mask; and The step of removing the above protective film is included, The step of forming the second groove above is, A wafer cutting method comprising the step of controlling the shape of the second groove by controlling at least one of the wavelength, intensity, waveform, and pulse of the second laser light.
  2. delete
  3. In paragraph 1, A wafer cutting method in which the second groove above has a portion that becomes narrower towards the bottom.
  4. In paragraph 1, A wafer cutting method in which, in the step of forming the second groove, an internal crack is formed inside the substrate below the second groove.
  5. In paragraph 4, A wafer cutting method comprising a plurality of internal cracks that overlap in a vertical direction with the second groove.
  6. delete
  7. In paragraph 1, A wafer cutting method in which a heat affected zone is formed along the surface profile of the second groove.
  8. In paragraph 1, A wafer cutting method in which the step of performing the above plasma etching is to divide the wafer to manufacture the plurality of devices.
  9. In paragraph 1, A wafer cutting method in which, in the step of removing the protective film, the protective film is removed by washing.
  10. In paragraph 1, The above wafer is a wafer cutting method having a thickness of 50㎛ or less.
  11. delete

Description

Method of Dicing a Wafer The present disclosure relates to a wafer cutting method, and more specifically, to a method of cutting a wafer having a plurality of semiconductor chips formed thereon along a scribe line. Generally, the wafer dicing process is a process located between the wafer manufacturing process and the packaging process in the semiconductor production process that separates the wafer into individual semiconductor chips. Conventional wafer cutting methods include the so-called sawing method, which physically cuts the wafer using a blade, or the laser stealth cutting method, which induces internal cracks by focusing a laser beam into the wafer. Conventional wafer cutting methods involve physically processing the silicon wafer and multiple thin film layers formed on the wafer surface; therefore, this physical processing method causes problems such as the generation of debris during cutting or cracking and chipping on the processed surface. As the need to use wafers thinner than conventional thicknesses arises to improve semiconductor integration density, there is a need for a wafer cutting method that is more reliable than conventional wafer cutting methods. In particular, for High Bandwidth Memory (HBM) products that stack thin chip dies, the thickness of the chip dies must be reduced as the number of stacked chip dies increases, and accordingly, it must be possible to separate ultra-thin wafers of, for example, 50㎛ or less into individual semiconductor chips without quality issues. In addition, for products incorporating a hybrid copper bonding process, it is necessary to manage cracks or chipping on the wafer cut edges to maintain the strength of each bonded wafer above a certain level, and it must also be possible to control the size and number of particles on the chip die surface. Figure 1 is a drawing illustrating a wafer. FIG. 2 is a flowchart for explaining a wafer cutting method according to one embodiment of the present disclosure. FIG. 3 is a cross-sectional view illustrating a method for forming a protective layer on a wafer according to one embodiment of the present disclosure. FIG. 4 is a cross-sectional view illustrating a method for forming a first groove on a wafer according to one embodiment of the present disclosure. FIG. 5a is a cross-sectional view showing a method of forming a second groove on a wafer according to one embodiment of the present disclosure, and FIG. 5b is a cross-sectional view showing a method of cutting a wafer according to one embodiment of the present disclosure. FIG. 6a is a cross-sectional view showing a method of forming a second groove on a wafer according to one embodiment of the present disclosure, and FIG. 6b is a cross-sectional view showing a method of cutting a wafer according to one embodiment of the present disclosure. FIG. 7a is a cross-sectional view showing a method of forming a second groove on a wafer according to one embodiment of the present disclosure, and FIG. 7b is a cross-sectional view showing a method of cutting a wafer according to one embodiment of the present disclosure. Hereinafter, exemplary embodiments according to the present invention will be described in detail with reference to the contents described in the attached drawings. However, the present invention is not limited or restricted by exemplary embodiments. Unless otherwise defined, all terms used in this specification (including technical and scientific terms) shall be used in a meaning that is commonly understood by those skilled in the art to which this disclosure belongs, but this may vary depending on the intent of those skilled in the art, case law, the emergence of new technology, etc. Furthermore, terms defined in commonly used dictionaries are not to be interpreted ideally or excessively unless explicitly and specifically defined otherwise. In certain cases, terms have been selected at the applicant's discretion, and in such cases, their meanings will be described in detail in the relevant explanatory sections. Accordingly, terms used in this disclosure should be defined not merely by their names, but based on their meanings and the content throughout this disclosure. Throughout this specification, when a part is described as "comprising" a certain component, this means that, unless specifically stated otherwise, it does not exclude other components but may include additional components. Furthermore, the singular form used in this specification includes the plural form unless specifically stated otherwise. Additionally, the expression "at least one of a, b, and/or c" as used throughout this specification may encompass 'a alone', 'b alone', 'c alone', 'a and b', 'a and c', 'b and c', or 'a, b, and c all'. Meanwhile, terms such as "first and/or second" used in this specification may be used to describe various components, but they are used solely for the purpose of distinguishing one component from another and are not intended to limit the scope to the compone