KR-102962388-B1 - HARD MASK MANUFACTURING METHOD AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD USING THE SAME

Abstract

A method for manufacturing a hard mask according to an embodiment of the present technology may include: a step of providing a substrate having a lower film formed thereon; a step of forming a first hard mask film on the lower film that is made of a material having Si-C bonds and has a first etching selectivity ratio; and a step of forming a second hard mask film on the first hard mask film that is made of a material having Si-N bonds and has a second etching selectivity ratio different from the first etching selectivity ratio.

Inventors

• 김동학
• 문재정

Assignees

• 주식회사 원익아이피에스

Dates

Publication Date

20260511

Application Date

20201109

Claims (8)

1. A step of providing a substrate having a lower film formed thereon; A step of forming a first hard mask film on the above-mentioned substrate as an etching stop film comprising silicon carbide (SiC) having a first etching selectivity; A step of forming a second hard mask film comprising silicon nitride (SiN) on the first hard mask film, which is used for mandrel formation having a second etching selectivity greater than the first etching selectivity; A method for manufacturing a hard mask including
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5. In paragraph 1, A method for manufacturing a hard mask characterized by continuously depositing the first hard mask film and the second hard mask film using in-situ equipment.
6. In paragraph 1, After the step of forming the second hard mask film, A step of patterning the second hard mask film to form a second hard mask film pattern; A step of depositing a spacer film on the second hard mask film pattern; A step of forming a spacer film pattern by removing the second hard mask film pattern after etching the spacer film on the entire surface; and A step of patterning the first hard mask film along the spacer film pattern and then removing the spacer film pattern to form the first hard mask film pattern; A method for manufacturing a hard mask including further
7. In paragraph 6, A method for manufacturing a hard mask characterized in that the above spacer film is a thin film of at least one of TiO2, SiO2, AlO, and TiN.
8. A step of providing a substrate having a lower film formed thereon; A step of forming a first hard mask film on the above-mentioned substrate as an etching stop film comprising silicon carbide (SiC) having a first etching selectivity; A step of forming a second hard mask film comprising silicon nitride (SiN) on the first hard mask film, which is used for mandrel formation having a second etching selectivity greater than the first etching selectivity; A step of patterning the second hard mask film to form a second hard mask film pattern using the mandrel; A step of depositing a spacer film on the second hard mask film pattern; A step of forming a spacer film pattern by etching the spacer film and then etching the second hard mask film pattern so that the upper surfaces of the first hard mask film and the second hard mask film pattern are exposed; and A step of maintaining the spacer film pattern and etching the first hard mask film to form a first hard mask film pattern; A method for manufacturing a semiconductor device including

Description

Hard mask manufacturing method and semiconductor device manufacturing method using the same The present invention relates to a method for manufacturing a hard mask, and more specifically, to a method for manufacturing a hard mask capable of realizing an accurate line width and a method for manufacturing a semiconductor device using the same. A semiconductor integrated circuit device may include a semiconductor device in which millions of transistors, capacitors, and resistors are integrated on a single chip. Such semiconductor integrated circuit devices are required to be faster and more highly integrated. To satisfy this, the size of transistors, capacitors, and resistors must be reduced. Currently, as the size of components constituting semiconductor integrated circuit devices is reduced to micron (㎛) or smaller, it is required that these components be patterned with a linewidth below the exposure limit of the lithography equipment while ensuring electrical performance. In order to limit the line width to below the exposure limit, a hard mask pattern is currently formed by a double or multiple patterning method. FIGS. 1 to 6 are cross-sectional views of each process to explain a method for manufacturing a hard mask according to an embodiment of the present technology. FIGS. 7a to 7e are drawings and diagrams comparing the differences between the present technology and the prior art during the hard mask manufacturing process according to embodiments of the present technology and the prior art. The advantages and features of the present technology, and the methods for achieving them, will become clear by referring to the embodiments described below in detail together with the accompanying drawings. However, the present technology is not limited to the embodiments disclosed below but may be implemented in various different forms; these embodiments are provided merely to ensure that the disclosure of the present technology is complete and to fully inform those skilled in the art of the scope of the technology, and the present technology is defined only by the scope of the claims. In the drawings, the sizes and relative sizes of layers and regions may be exaggerated for clarity of description. Throughout the specification, the same reference numerals refer to the same components. FIGS. 1 to 6 are cross-sectional views of each process to explain a method for manufacturing a hard mask according to an embodiment of the present technology. Referring to FIG. 1, a target film (200), a first hard mask film (300), and a second hard mask film (400) are sequentially stacked and formed on a semiconductor substrate (100) that includes a lower film (not shown). Here, the target film (200) may be at least one film. The target film (200) may be in the form of a plurality of layers stacked and may form a pattern. The target film (200) is depicted as a single layer for convenience of this description, but its form is not limited thereto. According to an embodiment of the present technology, a material having Si-C bonds may be used as the first hard mask film (300). Examples may include silicon carbide (SiC). The first hard mask film (300) may be used as an etching stop film. A material having Si-N bonds may be used as the second hard mask film (400). Examples may include silicon nitride (SiN). The second hard mask film (400) may be used as a mandrel. In the embodiments of the present technology described below, the first hard mask film (300) is specified as silicon carbide (SiC) and the second hard mask film (400) as silicon nitride (SiN), but are not limited thereto. Referring to FIG. 2, after sequentially stacking a target film (200), a first hard mask film (300), and a second hard mask film (400) on a substrate (100), a photoresist pattern (not shown) is formed on the second hard mask film (400), and then a second hard mask film pattern (400a) can be formed through an etching process. At this time, the second etching selectivity of the second hard mask film (400) is greater than the first etching selectivity of the first hard mask film (300). When the etching process is performed to form the second hard mask film pattern (400a), the first hard mask film (300) may not be etched. Referring to FIG. 3, a spacer film (500) can be deposited on the formed second hard mask film pattern (400a). In an embodiment of the present technology, the spacer film (500) may include at least one thin film of TiO2, SiO2, AlO, and TiN, but is not limited thereto. Referring to FIG. 4, the deposited spacer film (500) can form a spacer film pattern (500a) located on the side of the second hard mask film pattern (400a) through a front etching process. Referring to FIG. 5, a spacer film pattern (500a) can be formed by selectively removing only the second hard mask film pattern (400a) from the entire exposed structure. Referring to FIG. 6, the first hard mask film (300) can be patterned according to the spacer film pattern (500a), and then the spacer f