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KR-102962497-B1 - PWM DRIVING METHOD FOR AN ELECTRIC MOTOR WITH ZEROCROSSING COMPENSATION

KR102962497B1KR 102962497 B1KR102962497 B1KR 102962497B1KR-102962497-B1

Abstract

The present invention relates to a PWM driving method for a PWM motor control system (10) using zero-crossing compensation. The PWM motor control system comprises: a three-phase AC motor (40); a power inverter (30) comprising three half-bridges, each comprising a first transistor ( T1 , T3 , T5 ) connected to a common given voltage (V PWR ) and a second transistor ( T2 , T4 , T6 ) connected to a reference point (GND PWR )—each phase of the AC motor (40) is connected to a corresponding node (n1, n2, n3) of the corresponding half-bridge; and a controller (20). The controller (20) includes three PWM generators (21a, 21b, 21c) each having first, second, and third carrier generators ( 24a , 24b , 24c ) configured to generate first, second, and third carriers (PWM car1 , PWM car2 , PWM car3 ) respectively to generate first, second, and third PWMB signals (PWM 1, PWM 2, PWM 3). Each PWM generator (21a, 21b, 21c) further includes a dead time generator ( 22a , 22b , 22c) configured to convert each PWM signal (PWM 1 , PWM 2 , PWM 3 ) into first and second inverted square wave signals having dead time (T d1 , T d2 ) to control each of the first and second transistors (T 1 , T 2 ; T 3 , T 4 ; T 5, T 6) of the corresponding half bridge. The method is characterized by the step of controlling each carrier generator ( 24a , 24b , 24c ) of the corresponding first, second, and third PWM generators (21a, 21b, 21c) to generate a carrier offset between each of the first, second, and third carriers (PWM car1 , PWM car2 , PWM car3 ) so that the voltage (V ph1 , V ph2 , V ph3 ) between the nodes (n1, n2, n3) of the corresponding half- bridge and the reference point (GND PWR) is offset to obtain a variable common mode voltage (V CM) whenever the corresponding PWM signals (PWM 1, PWM 2, PWM 3) are off.

Inventors

  • 괄코, 가브리엘레

Assignees

  • 에텔 쏘시에떼 아노님

Dates

Publication Date
20260508
Application Date
20220603
Priority Date
20210714

Claims (10)

  1. In a PWM driving method for a PWM motor control system (10) using zero-crossing compensation, The above PWM motor control system is, 3-phase AC motor (40); A power inverter (30) comprising three half-bridges, each comprising a first transistor ( T1 , T3 , T5 ) connected to a common given voltage (V PWR ) and a second transistor ( T2 , T4 , T6 ) connected to a reference point (GND PWR ) - each phase of the AC motor (40) is connected to the corresponding nodes (n1, n2, n3) of the corresponding half-bridges -; and A controller (20) comprising three PWM generators ( 21a , 21b, 21c ), each comprising first, second , and third carrier generators (24a, 24b, 24c) configured to generate first, second, and third carriers (PWM car1 , PWM car2 , PWM car3 ) respectively to generate first, second, and third PWM signals (PWM 1, PWM 2, PWM 3) - each PWM generator (21a, 21b, 21c) generates each PWM signal (PWM 1 , PWM 2 , PWM 3 ) into first and second inverted square wave signals having dead time (t d1 , t d2 ) to control the first and second transistors (T 1 , T 2 ; T 3 , T 4 ; T 5 , T 6 ) of the corresponding half-bridge respectively. Includes deadtime generators (22a, 22b, 22c) configured to convert - Includes, The above PWM driving method comprises, for generating a carrier offset between each of the first, second, and third carriers (PWM car1, PWM car2, PWM car3 ) of the corresponding first, second, and third PWM generators ( 21a , 21b , 21c), at least when the current ( I1 , I2 , I3 ) flowing through each phase of the AC motor is between +/- 10 mA, so that the voltage ( Vph1 , Vph2 , Vph3 ) between the node (n1, n2, n3) of the corresponding half-bridge and the reference point (GND PWR ) is offset to obtain a variable common mode voltage ( VCM ) whenever the corresponding PWM signal (PWM 1 , PWM 2, PWM 3 ) is in an off state, respectively, a carrier generator (24a, 24b) of the corresponding first, second, and third PWM generators (21a, 21b , 21c), respectively, of the corresponding first, second, and third PWM generators ( 21a , 21b , 21c), such that when the current (I1, I2, I3) flowing through each phase of the AC motor is zero-crossing, the voltage (Vph1, Vph2, Vph3 ) between the node (n1, n2, n3) of the corresponding half-bridge and the reference point (GND PWR) is offset. A PWM driving method characterized by a step of controlling 24c).
  2. In paragraph 1, The above carrier offset is always generated in the PWM driving method.
  3. In paragraph 1 or 2, A PWM driving method in which the carrier offset is constant between each of the three carriers (PWM car1 , PWM car2 , PWM car3 ).
  4. In paragraph 3, A PWM driving method in which the carrier offset is 0.4 to 8 μs.
  5. In paragraph 1 or 2, A PWM driving method in which the frequency of each signal carrier is 5kHz to 200kHz.
  6. In paragraph 1 or 2, A PWM driving method in which the above variable common mode voltage ( VCM ) is a step-shaped ramp voltage.
  7. In paragraph 6, A PWM driving method in which the above-mentioned step-shaped ramp voltage includes a negative ramp slope and a positive ramp slope.
  8. In paragraph 1 or 2, The method further includes the step of determining the current sign of the current ( I1 , I2 , I3 ) for each phase load of the three-phase AC motor (40), and the first and second square wave control signals ( VgT1 , VgT2; VgT3 , VgT4; VgT5, VgT6 ) for controlling the first and second transistors ( T1 , T2 ; T3 , T4 ; T5 , T6 ) of each of the first, second, and third half - bridges , respectively, are: When the current sign of the current ( I1 , I2 , I3 ) at each load phase of the three-phase AC motor ( 40 ) is positive, in order to control the first transistor ( T1 , T3 , T5 ) of the corresponding first, second, and third half-bridges, the falling edge and rising edge of the first square wave control signal (VgT1, VgT3 , VgT5 ) are offset by a first dead time ( td1 ) with respect to the corresponding falling edge and rising edge of the corresponding PWM signal ( PWM1 , PWM2 , PWM3 ), respectively, and the rising edge of the second square wave control signal ( VgT2 , VgT4 , VgT6 ) is offset by a second dead time ( td2 ) with respect to the corresponding falling edge of the corresponding PWM signal ( PWM1 , PWM2 , PWM3 ). Offset - the second dead time (t d2 ) is longer than the first dead time (t d1 ) -, and in order to control the second transistors (T 2 , T 4 , T 6 ) of the corresponding first, second, and third half-bridges, the falling edge of the second square wave control signal is not offset with respect to the corresponding rising edge of the corresponding PWM signal, A PWM driving method calculated such that when the current sign of the current ( I1 , I2 , I3 ) on each load of the three-phase AC motor (40) is negative, the falling edge of the first square wave control signal ( VgT1 , VgT3 , VgT5 ) is not offset with respect to the corresponding falling edge of the corresponding PWM signal (PWM 1 , PWM 2 , PWM 3 ), the rising edge of the first square wave control signal is offset by the second dead time ( td2 ) with respect to the corresponding rising edge of the corresponding PWM signal, and the rising edge and falling edge of the second square wave control signal are offset by the first dead time ( td1 ), which is shorter than the second dead time ( td2 ), with respect to the corresponding falling edge and rising edge of the corresponding PWM signal, respectively.
  9. In paragraph 8, The second square wave control signal ( VgT2 , VgT4 , VgT6 ) for controlling the second transistor ( T2 , T4 , T6 ) of each hybrid bridge is an inverted and delayed replica of the first, second, and third PWM signals ( PWM1 , PWM2 , PWM3 ) respectively when the current sign of the current ( I1 , I2 , I3 ) on each load of the three-phase AC motor (40) is negative, and the first square wave control signal for controlling the first transistor of each hybrid bridge is a delayed replica of the first, second, and third PWM signals ( PWM1 , PWM2, PWM3 ) respectively when the current sign of the current ( I1 , I2 , I3) on each load of the three -phase AC motor ( 40 ) is positive, PWM drive method.
  10. In paragraph 8, A PWM driving method in which the node voltages ( Vph1 , Vph2 , Vph3 ) of each half-bridge of the power inverter (30) are delayed copies of the first, second, and third PWM signals (PWM 1 , PWM 2, PWM 3 ) when the current sign of the current ( I1 , I2 , I3 ) on each load of the three - phase AC motor is positive or negative.

Description

PWM Driving Method for an Electric Motor with Zero-Crossing Compensation The present invention relates to a pulse width modulation (PWM) driving method for driving an electric motor using zero-crossing compensation to reduce unwanted current wave distortion of the motor driving current. The disclosed method may further include deadtime compensation to further reduce current wave distortion. In PWM-inverter controlled AC motor drives, dead time or time delays must be inserted into the switching signals to prevent short circuits in each inverter half-bridge. While this time delay ensures the safe operation of the inverter, it causes significant distortion in the output voltage. This results in momentary control losses, causing the output voltage to deviate from the reference voltage. Since this is repeated for every switching operation, the effect can be substantial. This effect remains evident even in high-speed switching devices such as MOSFETs and IGBTs (insulated gate bipolar transistors). Therefore, efficient dead time compensation is required to improve the performance of the PWM inverter, preventing or at least reducing undesirable speed ripple and limiting periodic oscillations around the desired motor position. Several approaches for dead-time compensation have been developed to reduce unwanted current wave distortion in motor drive currents. As an example, US2004/0037097 discloses a method for compensating for dead-time nonlinearity in a solid switch device, comprising the following steps: receiving a PWM signal at a first time point; receiving current feedback from an output of a solid switch device, wherein the solid switch device comprises a plurality of switch components; detecting a change in polarity in the feedback current at a second time point; detecting a rising edge of the PWM signal at a third time point; determining whether the feedback current has a positive polarity or a negative polarity after the detected change in polarity; and, if the feedback current has a positive polarity after the detected change in polarity, outputting a first control signal to activate a first switch component of the solid switch device with a predetermined delay after the third time point. Although US2004/0037097 acknowledges that voltage distortion becomes more severe at the point of current polarity change, generally known as "zero crossing," due to dead-time effects, the negative impact of zero crossing is not resolved, despite the fact that it contributes to current wave distortion as a dead-time effect. L. Ben-Brahim, "On the Compensation of Dead Time and Zero-Current Crossing for a PWM-Inverter-Controlled AC Servo Drive" [IEEE Transaction on industrial electronics Vol. 51, No 5, October 2004] proposed a zero-crossing and dead-time compensation method based on angular domain iterative control. The present invention is provided by way of example and will be better understood with the help of the description of the various embodiments illustrated in the drawings, and in the drawings: FIG. 1 illustrates a partial schematic diagram of a PWM motor control system of an exemplary embodiment of the present invention; FIG. 2 illustrates a PWM signal in which a dead time is inserted into the PWM signal to prevent a short circuit in a single-phase leg of a PWM inverter according to the prior art; FIG. 3a illustrates a modified PWM signal having dead time compensation according to an exemplary embodiment of the present invention compared to a PWM signal having dead time according to the prior art when the polarity of the current at one upper load of the motor is positive; FIG. 3b illustrates a modified PWM signal having dead time compensation according to an exemplary embodiment of the present invention compared to a PWM signal having dead time according to the prior art when the polarity of the current is negative at one upper load of the motor; FIG. 4a illustrates the period of a PWM signal for a scenario in the conventional PWM method of FIG. 2, the corresponding common mode voltage, the node voltage of one half-bridge of the power inverter, the voltage across one upper load, and the resulting current in that phase; FIG. 4b illustrates a similar diagram to FIG. 4a for a scenario in which a zero-crossing compensation algorithm is used according to an exemplary embodiment of the present invention; FIG. 4c illustrates a similar diagram to FIG. 4b for a scenario in which a zero-crossing compensation algorithm is used in conjunction with a dead-time compensation algorithm based on FIG. 3a and 3b according to an exemplary embodiment of the present invention; FIG. 5a illustrates three carriers of each PWM generator offset from each other by a constant offset according to an embodiment of the present invention; FIG. 5b shows the node voltages of each half-bridge when offsetting the three carriers shown in FIG. 5a; FIG. 5c illustrates the resulting common mode voltage of an AC motor; FIG. 6a shows a graph of the current