KR-102962798-B1 - CIRCUIT BOARD FOR SMART IC AND CHIP PACKAGE INCLUDING THE SAME

KR102962798B1KR 102962798 B1KR102962798 B1KR 102962798B1KR-102962798-B1

Abstract

A circuit board according to an embodiment comprises an insulating layer; and a circuit pattern layer disposed on the insulating layer and formed of an alloy, wherein the alloy comprises a first metal having a content in the range of 60 weight% to 80 weight%, a second metal having a content in the range of 10 weight% to 22 weight%, and a third metal having a content in the range of 3 weight% to 20 weight%, wherein the first metal comprises either nickel (Ni) or iron (Fe), the second metal comprises chromium (Cr), and the third metal comprises one other than the first metal among nickel (Ni) and iron (Fe).

Inventors

이인재
조민성

Assignees

엘지이노텍 주식회사

Dates

Publication Date: 20260512
Application Date: 20211001
Priority Date: 20210601

Claims (12)

An insulating layer including through holes penetrating the upper and lower surfaces; and It includes a circuit pattern layer disposed on the insulating layer and formed of an alloy, and The upper surface of the circuit pattern layer is a contact portion, and the lower surface of the circuit pattern layer in the area vertically superimposed with the through hole is a bonding portion. The above alloy is, A first metal having a content in the range of 60 weight% to 80 weight%, and A second metal having a content in the range of 10 weight% to 22 weight%, and It comprises a third metal having a content in the range of 3 weight% to 20 weight%, and The first metal above includes either nickel (Ni) or iron (Fe), and The second metal mentioned above includes chromium (Cr), and The third metal comprises one other than the first metal among nickel (Ni) and iron (Fe). Circuit board for smart ICs.
In paragraph 1, The first metal above includes nickel (Ni), and The second metal mentioned above includes iron (Fe), and The above alloy is, It further comprises a fourth metal having a content in the range of 1 weight% to 5 weight%, and The above-mentioned fourth metal is, any one of molybdenum (Mo), manganese (Mn), and molybdenum (Mo)-manganese (Mn) alloys, Circuit board for smart ICs.
In paragraph 1, The first metal mentioned above includes iron (Fe), and The second metal mentioned above includes nickel (Ni), and The above alloy is, It further comprises a fourth metal having a content in the range of 0 weight% to 5 weight%, and The above-mentioned fourth metal is, Any one of molybdenum (Mo), manganese (Mn), and molybdenum (Mo)-manganese (Mn) alloys Circuit board for smart ICs.
In any one of paragraphs 1 through 3, The upper surface of the circuit pattern layer is exposed to the outside without contacting other metals, Circuit board for smart ICs.
In any one of paragraphs 1 through 3, A surface treatment layer disposed on the bonding portion of the circuit pattern layer, Circuit board for smart ICs.
In paragraph 5, The above surface treatment layer is, A gold metal layer comprising gold (Au) disposed in the bonding portion of the circuit pattern layer, Circuit board for smart ICs.
In paragraph 6, The above surface treatment layer is, A nickel metal layer disposed between the above circuit pattern layer and the above gold metal layer, further comprising a nickel metal layer containing nickel. Circuit board for smart ICs.
In paragraph 1, The above alloy is, It further comprises a fifth metal having a content in the range of 3 weight% to 10 weight%, and The above fifth metal is, Any one of silver (Ag), silicon (Si), and silver (Ag)-silicon (Si) alloy, Circuit board for smart ICs.
In paragraph 8, The above alloy is, It further comprises a sixth metal having a content in the range of 1 weight% to 5 weight%, and The above-mentioned sixth metal is, Any one of manganese (Mn), tin (Sn), zinc (Zn), and an alloy comprising at least two of these, Circuit board for smart ICs.
In any one of paragraphs 1 through 3, paragraph 8 and 9, It further includes a bonding sheet disposed between the insulating layer and the circuit pattern layer, and The above bonding sheet includes a through hole, Circuit board for smart ICs.
A circuit board for a smart IC as described in any one of paragraphs 1 to 3; An IC chip attached to the lower surface of the insulating layer of the circuit board for the smart IC above; and It includes a connecting member connecting the IC chip and the surface treatment layer of the circuit board for the smart IC, and the circuit board for the smart IC includes a surface treatment layer disposed in the bonding portion of the circuit pattern layer. The above connecting member connects the IC chip and the surface treatment layer. Chip package.
A circuit board for a smart IC included in either of paragraphs 8 and 9; An IC chip attached to the lower surface of the insulating layer of the circuit board for the smart IC above; and It includes a connecting member that connects the above IC chip and the circuit pattern layer of the circuit board for the smart IC, and The above connecting member is, Directly contacting the bonding portion of the circuit pattern layer that overlaps vertically with the through hole, Chip package.

Description

Circuit board for smart IC and chip package including the same The embodiment relates to a circuit board, and in particular to a circuit board applied to a smart IC and a chip package including the same. A smart IC card is a card embedded with at least one integrated circuit chip or chip module. More specifically, a smart IC card refers to a device capable of performing simple tasks independently by embedding a central processing unit, such as a microprocessor, which is typically made of a plastic-based resin in the shape of a thin card, and a memory unit capable of storing information of a predetermined capacity, as well as inputting, outputting, and processing information without a separate power supply. To implement such a smart IC card, a chip package is required in which a thin semiconductor chip is mounted on a circuit pattern of a printed circuit board, and a contact terminal is formed on the opposite side of the printed circuit board so that a circuit pattern electrically connected to the semiconductor chip can be connected to an external card reader or the like in a contact- or contactless manner; and a card body on which the chip package is mounted is required. The smart IC card described above is widely used in various fields, such as credit cards, USIM cards, security cards, and identification cards. The circuit board applied to such a smart IC card includes an insulating layer and a circuit pattern layer disposed on the insulating layer. At this time, the circuit pattern layer includes a bonding portion and a contact portion. The bonding portion may refer to the upper surface or a first surface of the circuit pattern layer. For example, the bonding portion may refer to a surface of the circuit pattern layer connected to an IC chip. Additionally, the contact portion may refer to a lower surface or a second surface of the circuit pattern layer. For example, the contact portion may refer to a surface of the circuit pattern layer that contacts an external device (e.g., a card reader). In addition, a surface treatment layer is disposed on the bonding portion and the contact portion of the circuit pattern layer, respectively. The surface treatment layer is formed to impart wire bondability, corrosion resistance, oxidation resistance, wear resistance, and hardness to the bonding portion and the contact portion of the circuit pattern layer at a certain level or higher. However, conventional circuit boards as described above necessarily require the formation of a surface treatment layer on the circuit pattern layer, which leads to problems such as a complex manufacturing process and increased manufacturing costs. Additionally, conventional circuit boards have the problem of increasing the overall thickness by the thickness of the surface treatment layer. (Patent Document 1) KR 10-2002-0011361 A Figure 1 is a diagram showing a chip package according to a comparative example. FIG. 2 is a drawing showing a circuit board and a chip package according to the first and second embodiments. Figure 3 is a diagram showing a first modified example of the circuit board and chip package of Figure 2. Figure 4 is a diagram showing a second variation example of the circuit board and chip package of Figure 2. FIG. 5 is a drawing showing a circuit board according to a third embodiment. Hereinafter, embodiments disclosed in this specification will be described in detail with reference to the attached drawings. Identical or similar components regardless of drawing symbols are assigned the same reference number, and redundant descriptions thereof will be omitted. The suffixes "module" and "part" for components used in the following description are assigned or used interchangeably solely for the ease of drafting the specification and do not inherently possess distinct meanings or roles. Furthermore, in describing the embodiments disclosed in this specification, if it is determined that a detailed description of related prior art could obscure the essence of the embodiments disclosed in this specification, such detailed description will be omitted. Additionally, the attached drawings are intended only to facilitate easy understanding of the embodiments disclosed in this specification; the technical concept disclosed in this specification is not limited by the attached drawings and should be understood to include all modifications, equivalents, and substitutions that fall within the spirit and technical scope of the present invention. Terms including ordinal numbers, such as first, second, etc., may be used to describe various components, but said components are not limited by said terms. These terms are used solely for the purpose of distinguishing one component from another. When it is stated that one component is "connected" or "connected" to another component, it should be understood that while it may be directly connected or connected to that other component, there may also be other components in between. On the other hand