KR-102962871-B1 - HIGH VOLTAGE SEMICONDUCTOR DEVICE AND MANUFACTURING THE SAME

KR102962871B1KR 102962871 B1KR102962871 B1KR 102962871B1KR-102962871-B1

Abstract

The present invention relates to a high-voltage semiconductor device (1), and more specifically, to a semiconductor device (1) that improves the reliability of the device by preventing electric field concentration at the corner portion of a field plate (172) by additionally forming a slope correction structure (180) on at least a part of the outer surface of a gate spacer (155), which is a side wall of a gate region (150).

Inventors

윤호진

Assignees

주식회사 디비하이텍

Dates

Publication Date: 20260508
Application Date: 20220420

Claims (19)

Semiconductor layer; A gate region on the semiconductor layer above; An inclination correction structure on the outer wall of the gate area above; Insulation pattern on the gate region and slope correction structure above; and Includes a gate field plate on the insulation pattern above; The above gate region is A gate insulating film on the semiconductor layer; a gate electrode on the gate insulating film; and a gate spacer on the sidewall of the gate electrode; are included. The above gate spacer A first portion extending downward in a curved manner; and a second portion extending downward at an angle of inclination greater than that of the first portion from the lower side of the first portion; comprising, The above slope correction structure is A high-voltage semiconductor device characterized in that the upper portion is located on the outer wall of the second portion at a lower height compared to the first portion, and the outer wall has a gentle angle of inclination compared to the outer wall of the gate spacer at a height corresponding to the gate spacer.
In paragraph 1, the second part A high-voltage semiconductor device characterized by extending downward in an orthogonal manner to the ground.
In paragraph 1, the slope correction structure A high-voltage semiconductor device characterized by being located on at least one part of the outer wall of the second part.
In paragraph 3, the above-mentioned slope correction structure It includes insulating material, The above insulation pattern is A high-voltage semiconductor device characterized by having a side extending from one side of the semiconductor layer surface to the upper surface of an adjacent gate electrode.
In paragraph 1, the slope correction structure A high-voltage semiconductor device characterized by including an oxide film or a nitride film.
In paragraph 1, Drift region within the semiconductor layer above; Body region within the semiconductor layer above; Drain area within the above drift area; additionally including a source region within the above body region; The above insulation pattern is A high-voltage semiconductor device characterized by covering the above-mentioned slope correction structure.
In paragraph 6, A high-voltage semiconductor device characterized by additionally including a drain extension region that surrounds the drain region within the above-mentioned drift region.
In paragraph 6, A body contact region having a side in contact with the source region within the body region; and A high-voltage semiconductor device characterized by additionally including an LDD region having a side in contact with the source region within the body region.
In paragraph 6, the above-mentioned slope correction structure A high-voltage semiconductor device characterized by being located on a side gate spacer adjacent to the drain region.
In paragraph 6, the insulation pattern is A high-voltage semiconductor device characterized by being in contact with the front surface of the outer wall of the above-mentioned slope correction structure.
In the method for manufacturing a high-voltage semiconductor device according to paragraph 6, A step of forming a gate region between a source region and a drain region on a semiconductor layer; A step of forming a slope correction structure on at least one portion of the outer wall of the gate region on the semiconductor layer; A step of forming an insulating pattern on the gate region, the semiconductor layer, and covering the slope correction structure; and A method for manufacturing a high-voltage semiconductor device characterized by including the step of forming a gate field plate on the insulating pattern above.
In Clause 11, the gate region forming step is A step of forming a gate insulating film on the semiconductor layer; A step of forming a gate electrode on the gate insulating film; and The method includes the step of forming a gate spacer on the sidewall of the gate electrode. The above slope correction structure is A method for manufacturing a high-voltage semiconductor device characterized by being formed on the lower part of the outer wall of the above-mentioned gate spacer.
In Clause 12, the above-mentioned slope correction structure is A method for manufacturing a high-voltage semiconductor device characterized by being formed on the semiconductor layer at a height less than or equal to the second portion height.
In Clause 13, the step of forming the slope correction structure is A step of depositing an insulating film on the semiconductor layer to cover the gate region; and A method for manufacturing a high-voltage semiconductor device characterized by including the step of etching the deposited insulating film.
In the method for manufacturing a high-voltage semiconductor device according to claim 1, A step of sequentially depositing an insulating film layer and a gate film on a semiconductor layer; A step of sequentially etching the gate film and the insulating film layer to form a gate electrode and a gate insulating film; A step of depositing a first insulating film on the semiconductor layer and on the gate electrode; A step of etching the first insulating film to form a gate spacer; A step of depositing a second insulating film on the semiconductor layer and on the gate electrode and gate spacer; A step of etching the second insulating film to form a slope correction structure; A step of forming an insulating pattern on the corner and slope correction structure of the gate electrode; and A method for manufacturing a high-voltage semiconductor device characterized by including the step of forming a gate field plate on the insulating pattern above.
In item 15, the insulation pattern and gate field plate forming step is A step of sequentially depositing a third insulating film and a plate film on the corner and slope correction structure of the gate electrode; and A method for manufacturing a high-voltage semiconductor device characterized by including the step of partially etching the third insulating film and the plate film.
In item 15, the above-mentioned slope correction structure A method for manufacturing a high-voltage semiconductor device characterized in that the outer wall has a gentler angle of inclination than the lower outer wall of the gate spacer.
In paragraph 15, A step of forming a drift region within the semiconductor layer; and The step of forming a body region within the semiconductor layer; additionally included, The above body area is A method for manufacturing a high-voltage semiconductor device characterized by being within the above-mentioned drift region.
In item 15, the above-mentioned slope correction structure A method for manufacturing a high-voltage semiconductor device characterized by being made of a nitride film.

Description

High Voltage Semiconductor Device and Manufacturing Method The present invention relates to a high-voltage semiconductor device (1), and more specifically, to a semiconductor device (1) that improves the reliability of the device by preventing electric field concentration at the corner portion of a field plate (172) by additionally forming a slope correction structure (180) on at least a part of the outer surface of a gate spacer (155), which is a side wall of a gate region (150). Lateral Double Diffused Metal Oxide Semiconductor (LDMOS) is a representative power device with a fast switching response and high input impedance. Below, the structure and problems of a semiconductor device having a field plate and an STI on the underside thereof will be described in detail. Figure 1 is a cross-sectional view of a conventional high-voltage semiconductor device. Referring to FIG. 1, in a conventional semiconductor device (9), an insulating pattern (930) is formed on a gate region (910), and a field plate (950) is formed on the insulating pattern (930). The insulating pattern (930) may be an oxide film layer. In such a structure, low on-resistance can be secured through the field plate (950). The gate region (910) may have a gate insulating film (911) on the substrate (901), a gate electrode (913) on the gate insulating film (913), and a sidewall (915) formed on the outer wall of the gate electrode (913). Briefly describing the process of forming the sidewall (915), after the gate insulating film (911) and the gate electrode (913) are formed, an insulating film layer is deposited on the substrate (901) to cover the gate electrode (913), and then a process of etching is performed. Figure 2 is a Scanning Electron Microscope (SEM) image of the sidewall side of a high-voltage semiconductor device according to Figure 1. Referring to FIG. 2, the sidewall (915) is formed with an upper portion (915a) in which the outer wall extends gently downward; and a lower portion (915b) in which the lower portion (915a) extends downward at an angle. Accordingly, the corner of the insulating pattern (930) formed to cover the sidewall (915) is formed to have a side that extends downward at a steep angle due to the lower portion (915b). Consequently, the field plate (950) on the insulating pattern (930) is also formed to have a side in which the corner extends at a steep angle, thereby causing electric field concentration at the corner of the field plate (950), which is a major cause of the degradation of the device's breakdown voltage characteristics and the resulting degradation of overall reliability. In order to solve such problems, the inventor of the present invention intends to present a novel high-voltage semiconductor device having an improved structure and a method for manufacturing it. FIG. 1 is a cross-sectional view of a conventional high-voltage semiconductor device; FIG. 2 is a Scanning Electron Microscope (SEM) image of the sidewall side of a high-voltage semiconductor device according to FIG. 1; FIG. 3 is a cross-sectional view of a high-voltage semiconductor device according to one embodiment of the present invention; FIG. 4 is an SEM image of the gate spacer side of a high-voltage semiconductor device according to FIG. 3; FIGS. 5 to 12 are reference cross-sectional views for explaining a method for manufacturing a high-voltage semiconductor device according to one embodiment of the present invention. Hereinafter, embodiments of the present invention will be described in more detail with reference to the accompanying drawings. Embodiments of the present invention may be modified in various forms, and the scope of the present invention should not be interpreted as being limited to the embodiments below, but should be interpreted based on the matters described in the claims. Furthermore, these embodiments are provided merely for reference to more completely explain the present invention to those with average knowledge in the art. As used herein, the singular form may include the plural form unless the context clearly indicates otherwise. Additionally, as used herein, “comprise” and/or “comprising” specify the presence of the mentioned features, numbers, steps, actions, parts, elements, and/or groups thereof, and do not exclude the presence or addition of one or more other features, numbers, actions, parts, elements, and/or groups. In the following description, it should be noted that when one component (or layer) is described as being placed on another component (or layer), the component may be placed directly on the other component, or other component(s) or layer(s) may be located between the components. Furthermore, when one component is described as being placed directly on or above another component, no other component(s) are located between the components. Additionally, being located on the 'top', 'upper', 'lower', 'upper side', 'lower side', or 'one side' or 'side' of a component refers to a relative positional rela