KR-102962957-B1 - CORE SUBSTRATE, PACKAGE STRUCTURE INCLUDING THE CORE SUBSTRATE, AND METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE

Abstract

The technical concept of the present invention provides a core substrate and a package structure including the core substrate. The package structure includes a core substrate including a substrate base having a plurality of first cavities and a plurality of second cavities, a plurality of blocks accommodated within the plurality of second cavities, and a plurality of bridge structures extending between each of the plurality of blocks and the substrate base; a plurality of semiconductor chips accommodated within the plurality of first cavities; and a molding layer covering the core substrate and the plurality of semiconductor chips, the molding layer having a portion within the plurality of first cavities and the plurality of second cavities of the core substrate.

Inventors

• 홍명호
• 김도원
• 손장배
• 윤석우
• 임교묵

Assignees

• 삼성전자주식회사

Dates

Publication Date

20260508

Application Date

20210823

Claims (20)

1. A core substrate comprising a substrate base including a plurality of first cavities and a plurality of second cavities, a plurality of blocks accommodated within the plurality of second cavities, and a plurality of bridge structures extending between each of the plurality of blocks and the substrate base; A plurality of semiconductor chips accommodated within the plurality of first cavities above; and A molding layer covering the core substrate and the plurality of semiconductor chips, wherein a portion thereof is located within the plurality of first cavities and the plurality of second cavities of the core substrate; The substrate base, the plurality of blocks, and the plurality of bridge structures each comprise the same insulating material, and each of the plurality of blocks is connected to the substrate base through one or more of the plurality of bridge structures. Each of the plurality of bridges is provided within a part of the second cavity between the block and the substrate base, and The above molding layer is a package structure provided within the remaining part of the second cavity between the block and the substrate base.
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3. In Article 1, Each of the plurality of first cavities, each of the plurality of second cavities, and each of the plurality of blocks has a rectangular shape in a planar view. A package structure in which the horizontal width of each of the plurality of first cavities is the same as the horizontal width of each of the plurality of second cavities.
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5. In Paragraph 3, Each of the above plurality of blocks includes a first edge and a second edge opposite to each other, and Each of the above plurality of blocks is a package structure connected to the substrate base through at least one first bridge structure extending between the first edge and the substrate base and at least one second bridge structure extending between the second edge and the substrate base.
6. In Article 1, A package structure in which the horizontal width of each of the plurality of blocks is the same as the horizontal width of each of the plurality of semiconductor chips.
7. In Article 1, A package structure in which the horizontal width of each of the plurality of blocks is different from the horizontal width of each of the plurality of semiconductor chips.
8. In Article 1, A package structure in which the distance between each of the plurality of blocks and the substrate base is between 20㎛ and 1000㎛.
9. In Article 1, The above plurality of blocks are, At least one first block having a first horizontal width; and At least one second block having a second horizontal width different from the first horizontal width; A package structure containing
10. In Article 1, The plurality of first cavities are provided in the center of the substrate base, and The plurality of second cavities above are package structures provided on the outer part of the substrate base.
11. In Article 1, A package structure in which a first region of the substrate base provided with a plurality of first cavities is surrounded by a second region of the substrate base provided with a plurality of second cavities in a planar view.
12. In Article 1, A package structure further comprising a lower redistribution structure including a conductive lower redistribution pattern provided on the lower surface of the core substrate and the lower surfaces of the plurality of semiconductor chips and electrically connected to the chip pads of each of the plurality of semiconductor chips.
13. In Article 12, The core substrate further includes a conductive connection structure extending from the lower surface to the upper surface of the substrate base, and The above package structure is, A package structure further comprising an upper redistribution structure provided on the upper surface of the core substrate and the upper surfaces of the plurality of semiconductor chips, and including a conductive upper redistribution pattern electrically connected to the conductive lower redistribution pattern through the conductive connection structure of the core substrate.
14. A core substrate comprising a substrate base portion including a plurality of first cavities and a plurality of second cavities, a plurality of block portions accommodated within the plurality of second cavities, and a plurality of bridge structure portions extending between each of the plurality of blocks and the substrate base; A plurality of semiconductor chips accommodated within the plurality of first cavities above; and A molding layer covering the core substrate and the plurality of semiconductor chips, wherein a portion thereof is located within the plurality of first cavities and the plurality of second cavities of the core substrate; Includes, The substrate base portion, the plurality of block portions, and the plurality of bridge structure portions each comprise the same insulating material, and the plurality of block portions are connected to the substrate base portion through the plurality of bridge structure portions. The above plurality of block parts each have a rectangular shape from a planar perspective, The plurality of bridge structure portions include at least one first bridge structure portion extending from a first edge of each of the plurality of block portions to the substrate base portion, and at least one second bridge structure portion extending from a second edge of each of the plurality of block portions to the substrate base portion. The above plurality of block portions are a package structure comprising at least one material selected from phenolic resin, epoxy resin, and polyimide.
15. In Article 14, The core substrate further includes a conductive connection structure extending from the lower surface to the upper surface of the substrate base portion within the substrate base portion, and The above package structure is, A lower redistribution structure comprising a conductive lower redistribution pattern provided on the lower surface of the core substrate and the lower surfaces of the plurality of semiconductor chips and electrically connected to the chip pads of each of the plurality of semiconductor chips; and An upper redistribution structure comprising a conductive upper redistribution pattern provided on the upper surface of the core substrate and the upper surfaces of the plurality of semiconductor chips, and electrically connected to the conductive lower redistribution pattern through the conductive connection structure of the core substrate; A package structure that includes more.
16. A substrate base portion in the form of a square panel including a plurality of first cavities and a plurality of second cavities; A plurality of block portions accommodated within the plurality of second cavities above; and A plurality of bridge structure portions extending between each of the plurality of blocks and the substrate base; Includes, The substrate base portion, the plurality of block portions, and the plurality of bridge portions each comprise the same insulating material, and the plurality of block portions are connected to the substrate base portion through the plurality of bridge structure portions. The substrate base portion, the plurality of block portions, and the plurality of bridge portions comprise at least one material selected from phenolic resin, epoxy resin, and polyimide.
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18. In Article 16, Each of the plurality of first cavities and each of the plurality of second cavities extends from the upper surface to the lower surface of the substrate base portion and penetrates the substrate base portion, and Each of the plurality of first cavities, each of the plurality of second cavities, and each of the plurality of block parts has a rectangular shape in a planar view, A core substrate in which the horizontal width of each of the plurality of first cavities is the same as the horizontal width of each of the plurality of second cavities.
19. In Article 16, The above plurality of block parts are, At least one first block having a first horizontal width; and At least one second block having a second horizontal width different from the first horizontal width; A core substrate including
20. In Article 16, A core substrate further comprising a conductive connection structure provided within the substrate base portion and extending from the lower surface to the upper surface of the substrate base portion.

Description

Core substrate, package structure including the core substrate, and method of manufacturing a semiconductor package The technical concept of the present invention relates to a core substrate and a package structure including the core substrate, and more specifically, to a core substrate for manufacturing a fan-out semiconductor package and a package structure including the core substrate. Driven by the rapid advancement of the electronics industry and user demands, electronic devices are becoming increasingly smaller, multifunctional, and high-capacity, thereby requiring highly integrated semiconductor chips. In particular, highly integrated semiconductor chips with an increased number of I/O terminals result in reduced spacing between terminals, which can lead to interference; therefore, fan-out semiconductor packages are being used to increase the spacing between I/O terminals. FIG. 1 is a plan view showing a core substrate according to exemplary embodiments of the present invention. Figure 2 is a cross-sectional view of the core substrate along the line II-II' of Figure 1. FIG. 3 is a plan view showing a package structure according to exemplary embodiments of the present invention. Figure 4 is a cross-sectional view of a package structure along the line IV-IV' of Figure 3. FIGS. 5A and FIGS. 5B are cross-sectional views illustrating the method of forming the molding layer of FIGS. 3 and FIGS. 4. FIG. 6 is a plan view showing a core substrate according to exemplary embodiments of the present invention. FIG. 7 is a cross-sectional view showing a package structure including a core substrate according to exemplary embodiments of the present invention. FIG. 8 is a flowchart illustrating a method for manufacturing a core substrate according to exemplary embodiments of the present invention. FIGS. 9a to 9d are cross-sectional views illustrating a method for manufacturing a core substrate according to exemplary embodiments of the present invention. FIGS. 10a to 10f are cross-sectional views illustrating a package structure according to exemplary embodiments of the present invention and a method for manufacturing a semiconductor package using said package structure. Hereinafter, embodiments of the technical concept of the present invention will be described in detail with reference to the attached drawings. Identical components in the drawings are denoted by the same reference numerals, and redundant descriptions thereof are omitted. FIG. 1 is a plan view showing a core substrate (100) according to exemplary embodiments of the present invention. FIG. 2 is a cross-sectional view of the core substrate (100) along the line II-II' of FIG. 1. Referring to FIGS. 1 and 2, a core substrate (100) may be provided for manufacturing a fan-out semiconductor package. In exemplary embodiments, the core substrate (100) may be provided for manufacturing a fan-out panel-level semiconductor package. In exemplary embodiments, the core substrate (100) may be a panel board, a printed circuit board (PCB), a ceramic substrate, or a wafer for manufacturing a package. In exemplary embodiments, the core substrate (100) may be a multi-layer printed circuit board (PCB). The core substrate (100) may include a substrate base (110), a block (120), and a bridge structure (130). The substrate base (110) may have a rectangular shape in a planar view. The substrate base (110) may have a roughly rectangular panel shape or a rectangular flat plate shape. The substrate base (110) may include an upper surface (119) and a lower surface opposite each other. Hereinafter, a direction parallel to the upper surface (119) of the substrate base (110) is defined as a horizontal direction (e.g., X direction and/or Y direction), and a direction perpendicular to the upper surface (119) of the substrate base (110) is defined as a vertical direction (e.g., Z direction). Additionally, hereinafter, the horizontal width of any member may refer to a length along the horizontal direction (e.g., X direction and/or Y direction), and the vertical height of any member may refer to a length along the vertical direction (e.g., Z direction). The substrate base (110) may be formed of an insulating material. For example, the substrate base (110) may include at least one material selected from FR-4 (Flame Retardant 4), tetrafunctional epoxy, polyphenylene ether, epoxy/polyphenylene oxide, BT (Bismaleimide triazine), Thermount, cyanate ester, phenol resin, epoxy resin, polyimide, and liquid crystal polymer. The substrate base (110) may include a plurality of cavities. The plurality of cavities may be arranged in a two-dimensional array form on the substrate base (110). That is, the plurality of cavities may be arranged in two or more rows and two or more columns. Each of the plurality of cavities may be a through hole that extends from the upper surface (119) of the substrate base (110) to the lower surface and penetrates the substrate base (110). Each of the plurality of cavities