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KR-102962959-B1 - METHOD FOR FORMING FINE PATTERNS OF SEMICONDUCTOR DEVICE

KR102962959B1KR 102962959 B1KR102962959 B1KR 102962959B1KR-102962959-B1

Abstract

A method for forming a pattern of a semiconductor device according to the technical concept of the present invention comprises the steps of: preparing a semiconductor substrate in which a cell region and an outer region surrounding the cell region are defined; applying a photoresist on the semiconductor substrate; irradiating the photoresist by superimposing EUV light reflected from an EUV mask onto the photoresist; developing the photoresist to form a photoresist pattern in the cell region and the outer region; and etching the semiconductor substrate using the photoresist pattern as an etching mask. The EUV mask comprises a plurality of main patterns arranged along a first direction and a second direction perpendicular to the first direction in a first zone corresponding to the cell region, and a first lane extending in the first direction and having a line and space pattern and a second lane extending in the second direction and having a protruding pattern, which surround the plurality of main patterns in a second zone corresponding to the outer region.

Inventors

  • 김기성
  • 박상오

Assignees

  • 삼성전자주식회사

Dates

Publication Date
20260508
Application Date
20211005

Claims (10)

  1. A step of preparing a semiconductor substrate having a cell region and an outer region surrounding the cell region defined therein; A step of applying photoresist on the semiconductor substrate; A step of superimposing and irradiating the photoresist with EUV light reflected from the EUV mask; A step of developing the above photoresist to form a photoresist pattern in the cell region and the outer region; and The method includes the step of etching the semiconductor substrate using the above photoresist pattern as an etching mask; The above EUV mask is, A plurality of main patterns arranged along a first direction and a second direction perpendicular to the first direction in a first zone corresponding to the cell area; and A second zone corresponding to the outer area comprises a plurality of main patterns surrounding the first lane, extending in the first direction and having a line-and-space pattern, and a second lane extending in the second direction and having a protruding pattern. The protruding pattern of the second lane is formed in a direction approaching and a direction moving away from the plurality of main patterns, respectively, and A closed square dam-shaped photoresist pattern is formed in the outer region of the semiconductor substrate corresponding to the first and second lanes of the EUV mask. Method for forming a pattern of a semiconductor device.
  2. In paragraph 1, The above plurality of main patterns are arranged in a honeycomb structure, and The main patterns located at the vertices of the hexagon and the main pattern located at the center point of the hexagon form a hexagonal structure, and The main patterns located at the vertices of the above hexagonal structure become the main patterns located at the center points of each of the six different hexagonal structures, and A method for forming a pattern of a semiconductor device, characterized in that a main pattern located at the center point of the above-mentioned hexagonal structure is shared with one another as one of the main patterns located at the vertices of the above-mentioned six other hexagonal structures.
  3. In paragraph 1, A method for forming a pattern of a semiconductor device, characterized in that a plurality of circular photoresist patterns are regularly formed in the cell region of the semiconductor substrate corresponding to the plurality of main patterns of the EUV mask.
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  5. In paragraph 1, A method for forming a pattern of a semiconductor device, characterized in that a plurality of main patterns adjacent to the first lane are arranged on a straight line along the first direction.
  6. In paragraph 1, A method for forming a pattern of a semiconductor device, characterized in that a plurality of main patterns adjacent to the second lane are arranged on a zigzag line along the second direction.
  7. In paragraph 1, When EUV light reflected from the above EUV mask is superimposed on the photoresist formed on the semiconductor substrate and irradiated N times (where N is an integer greater than or equal to 2), A method for forming a pattern of a semiconductor device characterized by exceeding a threshold light amount in the photoresist corresponding to the first and second lanes.
  8. In Paragraph 7, A method for forming a pattern of a semiconductor device, characterized by shifting the EUV mask in different directions from the center point of the semiconductor substrate and irradiating the photoresist N times in a superposition manner with a dose amount that is 1/N of the dose amount corresponding to the threshold light amount.
  9. In paragraph 1, A method for forming a pattern of a semiconductor device, characterized in that the line and space pattern of the first lane is composed of at least two line patterns.
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Description

Method for Forming Fine Patterns of Semiconductor Device The technical field of the present invention relates to a method for forming a pattern of a semiconductor device, and more specifically, to a method for forming a pattern of a semiconductor device on a semiconductor substrate using an EUV mask. Photolithography technology, including exposure and development processes, is utilized to fabricate semiconductor devices on semiconductor substrates. Due to the recent trend toward downscaling semiconductor devices, extreme ultraviolet (EUV) light is used as the light source for exposure devices to form fine photoresist patterns on semiconductor substrates. Generally, EUV masks used in such EUV exposure devices perform superposition exposure, resulting in the formation of fine photoresist patterns on the semiconductor substrate. To achieve this, various methods have been proposed to design precise mask patterns on EUV masks. FIGS. 1a and 1b are schematic diagrams illustrating an EUV exposure apparatus according to an embodiment of the technical concept of the present invention. FIG. 2 is a plan view schematically showing an EUV mask according to an embodiment of the technical concept of the present invention. Figure 3 is a cross-sectional and planar enlarged view showing the AA portion of Figure 2 enlarged. FIG. 4 is a conceptual diagram showing a method of exposing a mask pattern on a semiconductor substrate in a step-and-repeat manner using an EUV mask according to an embodiment of the technical concept of the present invention. Figure 5 is a conceptual diagram conceptually showing the amount of light irradiated onto the photoresist when superimposed exposure is performed. FIG. 6 is a plan view showing a part of a mask pattern and a part of a corresponding photoresist pattern according to an embodiment of the technical concept of the present invention. Figure 7 is a drawing illustrating the honeycomb structure arrangement of the main pattern by enlarging the BB portion of Figure 6. FIG. 8 is a plan view showing a photoresist pattern to explain a method for forming a pattern of a semiconductor device according to an embodiment of the technical concept of the present invention. FIG. 9 is a flowchart schematically illustrating the process of the OPC method of an EUV mask according to an embodiment of the technical concept of the present invention. FIG. 10 is a schematic layout of a semiconductor device fabricated by a pattern formation method for a semiconductor device according to an embodiment of the technical concept of the present invention. FIGS. 11a and FIGS. 11b are cross-sectional views taken along the line II' and the line II-II' of FIG. 10. Hereinafter, embodiments of the technical concept of the present invention will be described in detail with reference to the attached drawings. FIGS. 1a and 1b are schematic diagrams illustrating an EUV exposure apparatus according to an embodiment of the technical concept of the present invention. Referring to FIG. 1a and FIG. 1b together, the EUV exposure apparatus (1000) may include an EUV light source (1100), an illumination optical system (1200), a reticle support (1300), a projection optical system (1400), and a substrate stage (1500). The EUV light source (1100) can generate and output EUV light (EL) having high energy density. For example, the EUV light (EL) emitted from the EUV light source (1100) may have a wavelength of about 4 nm to 124 nm. In some embodiments, the EUV light (EL) may have a wavelength of about 4 nm to 20 nm, and the EUV light (EL) may have a wavelength of 13.5 nm. The above EUV light source (1100) may be a plasma-based light source or a synchrotron radiation light source. Here, the plasma-based light source refers to a light source that generates plasma and utilizes light emitted by the plasma, and includes a laser-produced plasma light source or a discharge-produced plasma light source. The above EUV light source (1100) may include a laser light source (1110), a transfer optical system (1120), a vacuum chamber (1130), a collector mirror (1140), a droplet generator (1150), and a droplet catcher (1160). The laser light source (1110) may be configured to output a laser (OL). For example, the laser light source (1110) may output a carbon dioxide laser. The laser (OL) output from the laser light source (1110) may be introduced into the interior of the vacuum chamber (1130) by being incident on the window (1131) of the vacuum chamber (1130) through a plurality of reflective mirrors (1121, 1123) included in the transfer optical system (1120). An aperture (1141) through which a laser (OL) can pass is formed in the center of the collector mirror (1140), and the laser (OL) can be introduced into the interior of the vacuum chamber (1130) through the aperture (1141) of the collector mirror (1140). A droplet generator (1150) can generate a droplet that interacts with a laser (OL) to generate EUV light (EL) and can provide the droplet into the inter