Search

KR-102963071-B1 - DISPLAY DEVICE

KR102963071B1KR 102963071 B1KR102963071 B1KR 102963071B1KR-102963071-B1

Abstract

A display device is provided. The display device comprises a first data line to which a first data voltage is applied, a second data line to which a second data voltage is applied, a low potential line to which a low potential voltage is applied, and a first subpixel connected to the first data line, the second data line, and the low potential line. The first subpixel includes a cathode pad electrode connected to the low potential line, a first transistor having a first gate electrode that generates a control current according to the first data voltage of the first data line, an eighth transistor that generates a driving current applied to a light-emitting element according to the second data voltage of the second data line, a first capacitor electrode connected to the first gate electrode, and a first capacitor including a second capacitor electrode disposed on the first capacitor electrode. The low potential line is disposed on the same layer as the second capacitor electrode and is disposed to surround the second capacitor electrode.

Inventors

  • 전상진
  • 김현준
  • 이계욱
  • 황정환

Assignees

  • 삼성디스플레이 주식회사

Dates

Publication Date
20260512
Application Date
20220318
Priority Date
20220117

Claims (20)

  1. A first data wiring to which a first data voltage is applied; A second data wiring to which a second data voltage is applied; Low-potential wiring to which a low-potential voltage is applied; and It has a first subpixel connected to the first data wiring, the second data wiring, and the low-potential wiring, and The above first subpixel is, A cathode pad electrode connected to the above low-potential wiring; A first transistor having a first gate electrode that generates a control current according to the first data voltage of the first data wiring; An eighth transistor that generates a driving current applied to a light-emitting element according to the second data voltage of the second data wiring; and A first capacitor comprising a first capacitor electrode connected to the first gate electrode and a second capacitor electrode disposed on the first capacitor electrode, and The above low-potential wiring is placed in the same layer as the second capacitor electrode and is a display device arranged to surround the second capacitor electrode.
  2. In Article 1, Scan write wiring that applies a scan write signal; and It further includes a second transistor comprising a second gate electrode connected to the scan writing wiring above, and The above second gate electrode is a display device that overlaps with the above low-potential wiring.
  3. In Article 1, The above low-potential wiring is a display device positioned below the first data wiring and the second data wiring.
  4. In Article 1, The above cathode pad electrode is a display device connected to the low potential wiring through the pad contact hole.
  5. In Paragraph 4, The above cathode pad electrode comprises a stem portion extending in a first direction and a branch portion extending in a second direction that is connected to the stem portion and intersects the first direction, and the pad contact hole is a display device located in the stem portion.
  6. In Article 1, A second light-emitting wiring to which a second light-emitting signal is applied; A second high-potential wiring to which a second high-potential voltage is applied; and It further includes a 12th transistor that connects the 2nd high-potential wiring to one electrode of the 8th transistor according to the 2nd light emission signal, and The above second high-potential wiring is a display device placed on the above low-potential wiring.
  7. In Article 6, The above low-potential wiring is a hole that exposes one electrode of the 12th transistor; and A display device further comprising a connecting electrode having a contact hole connecting one electrode of the first 12th transistor and the second high-potential wiring within the hole.
  8. In Article 7, It includes a substrate supporting the first subpixel, and A display device in which the above low potential wiring, the above connecting electrode, and the above second high potential wiring are sequentially arranged in the thickness direction of the substrate.
  9. In Article 6, The second high-potential wiring includes an opening that exposes the low-potential wiring, and The above cathode pad electrode is a display device connected to the low-potential wiring within the above opening.
  10. In Article 1, It includes an anode pad electrode spaced apart from the cathode pad electrode, and The light-emitting element is a display device disposed on the cathode pad electrode and the anode pad electrode.
  11. In Article 1, A first light-emitting wiring to which a first light-emitting signal is applied; A first high-potential wiring to which a first high-potential voltage is applied; and It further includes a fifth transistor that connects the first high-potential wiring to one electrode of the first transistor according to the first light emission signal, and The above low-potential wiring is a display device including a hole that exposes one electrode of the fifth transistor.
  12. In Article 1, The above-mentioned light-emitting element is a flip-chip type micro light-emitting diode element, which is a display device.
  13. A first data wiring to which a first data voltage is applied; A second data wiring to which a second data voltage is applied; Low-potential wiring to which a low-potential voltage is applied; A second high-potential wiring to which a second high-potential voltage is applied; and It has a first subpixel connected to the first data wiring, the second data wiring, the low potential wiring, and the second high potential wiring, and The above first subpixel is, A first transistor having a first gate electrode that generates a control current according to the first data voltage of the first data wiring; An eighth transistor that generates a driving current applied to a light-emitting element according to the second data voltage of the second data wiring; and It includes a capacitor electrode disposed on the first gate electrode, and A display device in which the low potential wiring is disposed on the same layer as the capacitor electrode, and the second high potential wiring includes an opening that exposes the low potential wiring.
  14. In Article 13, A display device further comprising a cathode pad electrode connected to the low-potential wiring within the above opening.
  15. In Article 13, The above-mentioned light-emitting element is a flip-chip type micro light-emitting diode element, which is a display device.
  16. Substrate; An active layer comprising a first channel, a first source electrode, and a first drain electrode disposed on the substrate; A first insulating film disposed on the active layer above; A first gate electrode and a first capacitor electrode disposed on the first insulating film and overlapping with the first channel; A second insulating film disposed on the first gate electrode and the first capacitor electrode; A second capacitor electrode disposed on the second insulating film and overlapping with the first capacitor electrode, and a low-potential wiring; A third insulating film disposed on the second capacitor electrode and the low-potential wiring; Scan writing wiring disposed on the third insulating film and to which a scan writing signal is applied; A fourth insulating film disposed on the above scan writing wiring; A second high-potential wiring disposed on the fourth insulating film and to which a second high-potential voltage is applied; and A display device comprising a cathode pad electrode disposed on the second high-potential wiring and connected to the low-potential wiring.
  17. In Article 16, The second high-potential wiring includes an opening that exposes the low-potential wiring, and The above cathode pad electrode is a display device connected to the low-potential wiring within the opening.
  18. In Article 16, The above cathode pad electrode is a display device directly connected to the low-potential wiring through a pad contact hole penetrating the fourth insulating film and the third insulating film.
  19. In Article 18, The above pad contact hole is a display device formed through laser drilling.
  20. In Article 16, A first anode connecting electrode disposed on the fourth insulating film above; A fifth insulating film disposed on the first anode connecting electrode; A second anode connecting electrode disposed on the fifth insulating film; and A display device further comprising an anode pad electrode disposed on the second anode connection electrode.

Description

Display Device {DISPLAY DEVICE} The present invention relates to a display device. As the information society develops, the demand for display devices for displaying images is increasing in various forms. Display devices may be flat panel display devices such as Liquid Crystal Displays, Field Emission Displays, and Light Emitting Displays. Light Emitting Displays may include organic light-emitting display devices comprising organic light-emitting diode elements as light-emitting elements, or light-emitting diode display devices comprising inorganic light-emitting diode elements such as LEDs as light-emitting elements. FIG. 1 is a plan view showing a display device according to one embodiment. Figure 2 is an example drawing showing one example of a pixel of Figure 1. Figure 3 is an example drawing showing another example of the pixel of Figure 1. FIG. 4 is a block diagram showing a display device according to one embodiment. FIG. 5 is a circuit diagram showing a first subpixel according to one embodiment. FIG. 6 is a layout diagram showing an active layer of a first subpixel, a first gate metal layer, a second gate metal layer, a first source metal layer, and a second source metal layer according to one embodiment. FIG. 7 is a layout diagram showing the third source metal layer and pad electrodes in FIG. 6. FIG. 8 is a layout diagram showing the active layer and the first gate metal layer of FIG. 6. FIG. 9a is a layout diagram showing the second gate metal layer of FIG. 6. FIG. 9b is a layout diagram showing the active layer, the first gate metal layer, and the second gate metal layer of FIG. 6. FIG. 10 is a layout diagram showing the first source metal layer and the second source metal layer of FIG. 6. FIG. 11 is a layout diagram showing the first source metal layer, the second source metal layer, and the third source metal layer of FIG. 6. Figures 12 and 13 are enlarged layout diagrams showing area A of Figures 6 and 7 in detail. Figure 14 is an enlarged layout diagram showing area B of Figure 6 in detail. Figures 15 and 16 are enlarged layout diagrams showing area C of Figures 6 and 7 in detail. FIG. 17 is a cross-sectional view taken along I-I' of FIG. 6 and FIG. 7. FIG. 18 is a cross-sectional view taken along II-II' of FIG. 6 and FIG. 7. FIG. 19 is a cross-sectional view taken along III-III' of FIG. 6 and FIG. 7. FIG. 20 is a cross-sectional view taken along IV-IV' and V-V' of FIG. 6 and FIG. 7. FIG. 21 is another example of a cross-sectional view cut along IV-IV' and V-V' of FIG. 6 and 7. FIG. 22 is a perspective view showing a tile-type display device including a plurality of display devices according to one embodiment. Figure 23 is an enlarged layout diagram showing the area E of Figure 22 in detail. FIG. 24 is a cross-sectional view showing an example of a tile-type display device cut along X1-X1' of FIG. 21. Figure 25 is an enlarged layout diagram showing the F region of Figure 22 in detail. FIG. 26 is a cross-sectional view showing an example of a tile-type display device cut along X5-X5' of FIG. 25. FIG. 27 is a block diagram showing a tile-type display device according to one embodiment. The advantages and features of the present invention and the methods for achieving them will become clear by referring to the embodiments described below in detail together with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below but may be implemented in various different forms. These embodiments are provided merely to ensure that the disclosure of the present invention is complete and to fully inform those skilled in the art of the scope of the invention, and the present invention is defined only by the scope of the claims. When elements or layers are referred to as being "on" another element or layer, this includes cases where another layer or element is interposed directly on or in the middle of another element. Throughout the specification, the same reference numerals refer to the same components. Shapes, sizes, ratios, angles, numbers, etc., disclosed in the drawings for describing embodiments are exemplary and therefore the invention is not limited to the depicted details. Although terms such as "first," "second," etc., are used to describe various components, it goes without saying that these components are not limited by these terms. These terms are used merely to distinguish one component from another. Therefore, it goes without saying that the first component mentioned below may also be the second component within the technical scope of the present invention. The features of each of the various embodiments of the present invention may be combined or combined with one another, either partially or wholly, and may technically enable various interlocking and operation. Each embodiment may be implemented independently of one another or may be implemented together in an associated relationship. Specific embodiments will be described below with referen