KR-102963154-B1 - CIRCUIT FOR GENERATING REFERENCE VOLTAGE AND DISPLAY DEVICE INCLUDING THE SAME

KR102963154B1KR 102963154 B1KR102963154 B1KR 102963154B1KR-102963154-B1

Abstract

A reference voltage generating circuit according to an embodiment and a display device including the same are disclosed. The reference voltage generating circuit according to an embodiment includes: a first external power line connected to a power line that applies a pixel driving voltage to a plurality of pixels; a second external power line connected to a power line to which the reference voltage is applied; a current sensing circuit that senses a current value flowing through the first external power line; and a voltage generating circuit that applies a reference voltage to the second external power line, wherein the polling interval of the reference voltage is varied by a delay time calculated based on the sensed current value and outputs the result.

Inventors

이상욱
박태화
김정재

Assignees

엘지디스플레이 주식회사

Dates

Publication Date: 20260511
Application Date: 20221121

Claims (19)

A first external power wiring connected to a power line that applies a pixel driving voltage to a plurality of pixels; A second external power wiring connected to a power line to which a reference voltage is applied to the plurality of pixels; A current sensing circuit for sensing the current value flowing through the first external power wiring; and A reference voltage generation circuit comprising a voltage generation circuit that applies a reference voltage to the second external power wiring, and outputs a voltage by varying the polling interval of the reference voltage by a delay time calculated based on the sensed current value.
In paragraph 1, The above current sensing circuit is, A current sensor connected to the first external power wiring above; and A reference voltage generating circuit including an ADC (Analog-Digital Converter) connected to the above current sensor.
In paragraph 2, The above current sensor is a reference voltage generating circuit including a shunt resistor.
In paragraph 1, One cycle of the above reference voltage is divided into a first section and a second section, and The above voltage generation circuit is, An operational amplifier that outputs a control voltage determined according to the input target voltage; A switch TFT driven by the above control voltage and outputting a reference voltage of a predetermined level to a first node; A first output element connected between the first node and ground, and determining the level of the reference voltage by a first control signal during the first interval; A second output element connected between the first node and the output node, and varying the polling interval of the reference voltage by a delay time according to the second control signal during the second interval; A level selection element that outputs the above first control signal; and A reference voltage generating circuit including a delay selection element that outputs the second control signal.
In paragraph 4, The above first output element is, A first resistor connected between the first node and the second node; A first switch connecting the second node and the third node or the second node and the fourth node; A second resistor connected between the third node and the ground; and A reference voltage generating circuit comprising a third resistor connected between the fourth node and the ground.
In paragraph 5, The above-mentioned first switch is, Connecting the second node and the third node according to the high level voltage of the first control signal, A reference voltage generating circuit that connects the second node and the fourth node according to the low level voltage of the first control signal.
In paragraph 5, The above second output element is, A fourth resistor connected between the first node and the fifth node; A second switch connecting the fifth node and the output node or the first node and the output node; and A reference voltage generating circuit including a capacitor connected between the output node and the ground.
In Paragraph 7, The above second switch is, Connecting the fifth node and the output node according to the high level voltage of the second control signal, A reference voltage generating circuit that connects the first node and the output node according to the low level voltage of the second control signal.
In paragraph 1, A reference voltage generating circuit further comprising a constant current source circuit that divides a polling interval of a reference voltage varied by the above delay time into a predetermined number of intervals and compensates the voltage for each divided interval.
In Paragraph 9, The above constant current source circuit is, An operational amplifier that outputs a control voltage determined according to the input target voltage; A switch TFT driven by the above control voltage to connect the first node and the second external power wiring; and A reference voltage generating circuit comprising a resistor connected between a power line to which a driving voltage is applied and the first node.
In Paragraph 10, The above constant current source circuit is, A reference voltage generation circuit that compensates for the reference voltage by adjusting the input target voltage in each of the sections divided into the aforementioned predetermined number, thereby varying the current flowing through the resistor.
A display panel comprising a plurality of pixels connected to a first power line to which a pixel driving voltage is applied and a second power line to which a reference voltage is applied; First external power wiring connected to the first power line above; Second external power wiring connected to the second power line above; A current sensing circuit for sensing the current value flowing through the first external power wiring; and A display device comprising a voltage generation circuit that applies a reference voltage to the second external power wiring, and outputs a voltage by varying the polling interval of the reference voltage by a delay time calculated based on the sensed current value.
In Paragraph 12, The above current sensing circuit is, A current sensor connected to the first external power wiring above; and A display device including an ADC (Analog-Digital Converter) connected to the above current sensor.
In Paragraph 13, The above current sensor is a display device including a shunt resistor.
In Paragraph 12, One cycle of the above reference voltage is divided into a first section and a second section, and The above voltage generation circuit is, An operational amplifier that outputs a control voltage determined according to the input target voltage; A switch TFT driven by the above control voltage and outputting a reference voltage of a predetermined level to a first node; A first output element connected between the first node and ground, and determining the level of the reference voltage by a first control signal during the first interval; A second output element connected between the first node and the output node, and varying the polling interval of the reference voltage by a delay time according to the second control signal during the second interval; A level selection element that outputs the above first control signal; and A display device comprising a delay selection element that outputs the second control signal.
In paragraph 15, The above first output element is, A first resistor connected between the first node and the second node; A first switch connecting the second node and the third node or the second node and the fourth node; A second resistor connected between the third node and the ground; and A display device comprising a third resistor connected between the fourth node and the ground.
In Paragraph 16, The above second output element is, A fourth resistor connected between the first node and the fifth node; A second switch connecting the fifth node and the output node or the first node and the output node; and A display device comprising a capacitor connected between the output node and the ground.
In Paragraph 12, A display device further comprising a constant current source circuit that divides a polling interval of a reference voltage varied by the above delay time into a predetermined number of intervals and compensates the voltage for each divided interval.
In Paragraph 18, The above constant current source circuit is, An operational amplifier that outputs a control voltage determined according to the input target voltage; A switch TFT driven by the above control voltage to connect the first node and the second external power wiring; and A display device comprising a resistor connected between a power line to which a driving voltage is applied and the first node.

Description

Circuit for generating reference voltage and display device including the same The present invention relates to a reference voltage generation circuit and a display device including the same. Display devices include Liquid Crystal Displays (LCDs), Electroluminescence Displays, Field Emission Displays (FEDs), and Plasma Display Panels (PDPs). Electroluminescent display devices are classified into inorganic light-emitting displays and organic light-emitting displays depending on the material of the light-emitting layer. Active matrix type organic light-emitting displays reproduce input images using self-luminous elements, such as Organic Light Emitting Diodes (OLEDs). Organic light-emitting displays have the advantages of fast response speed, high luminous efficiency, brightness, and high viewing angle. Some of the display devices, such as liquid crystal displays or organic light-emitting displays, include a display panel comprising a plurality of subpixels, a driving unit that outputs a driving signal for driving the display panel, and a power supply unit that generates power to be supplied to the display panel or the driving unit. The driving unit includes a gate driving unit that supplies gate signals, such as scan signals and light emission control signals, to the display panel, and a data driving unit that supplies data signals to the display panel. When driving signals, such as gate signals and data signals, are supplied to a plurality of subpixels formed on a display panel, the selected subpixel transmits light or emits light directly, thereby displaying an image. At this time, when driving the EM duty of the display device, the reference voltage level varies depending on the active area and the blank area due to the current flowing through the subpixel. That is, the reference voltage rises in the active area and drops in the blank area. In the areas where the reference voltage drops, namely the top, middle, and bottom areas of the display panel, the brightness becomes higher than the surrounding areas, causing a horizontal band phenomenon. Since the reference voltage must be the same across all areas of the display panel, a compensation method is applied that raises the voltage only in the regions within the panel where the reference voltage experiences an IR drop. However, depending on the shape of the display panel, complete compensation is not achieved for the remaining uncompensated regions where the reference voltage rises. Therefore, depending on the shape of the display panel, various methods are required to ensure complete compensation for the entire area, including the region where the reference voltage rises after the IR drop. FIG. 1 is a block diagram showing a display device according to an embodiment of the present invention. Figure 2 is a drawing showing the arrangement structure of the pixel array illustrated in Figure 1. FIGS. 3a to 3c are drawings for comparing and explaining the reference voltage compensation principle according to an embodiment. FIG. 4 is a diagram showing a reference voltage generation circuit according to an embodiment of the present invention. Figure 5 is a diagram showing the current sensing circuit illustrated in Figure 4. Figure 6 is a diagram showing the voltage generation circuit illustrated in Figure 4. Figure 7 is a waveform diagram showing the driving signal of the voltage generation circuit illustrated in Figure 6. FIGS. 8a and 8b are circuit diagrams showing the operation of the voltage generation circuit illustrated in FIG. 6. FIGS. 9 to 12d are drawings for explaining the principle of calculating delay time according to an embodiment. Figure 13 is a diagram showing the constant current source circuit illustrated in Figure 4. FIG. 14 is a diagram illustrating the principle of compensating a reference voltage according to an embodiment. FIGS. 15 to 16 are drawings showing the results of a reference voltage generation simulation according to an embodiment. The advantages and features of the present invention and the methods for achieving them will become clear by referring to the embodiments described below in detail together with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below but may be implemented in various different forms. These embodiments are provided merely to ensure that the disclosure of the present invention is complete and to fully inform those skilled in the art of the scope of the invention, and the present invention is defined only by the scope of the claims. The shapes, sizes, ratios, angles, numbers, etc. disclosed in the drawings for explaining embodiments of the present invention are exemplary, and therefore the present invention is not limited to the depicted details. Throughout the specification, the same reference numerals refer to the same components. Furthermore, in describing the present invention, if it is determined that a detailed description of related known technolo