KR-102963369-B1 - Power semiconductor device and method of fabricating the same

KR102963369B1KR 102963369 B1KR102963369 B1KR 102963369B1KR-102963369-B1

Abstract

A power semiconductor device according to one embodiment of the present invention may include a silicon carbide (SiC) semiconductor layer, a trench in which the semiconductor layer is etched, a gate in which a portion of the region is embedded within the trench and another portion extends over the semiconductor layer, a shield region surrounding a lower region of the trench, a well region located in contact with a first side of the trench and an upper surface of the semiconductor layer within the semiconductor layer, a source region located within the well region, and a shield connection extending from the upper surface of the semiconductor layer to the shield region while in contact with a second side opposite the first side.

Inventors

이주환

Assignees

현대모비스 주식회사

Dates

Publication Date: 20260512
Application Date: 20221024

Claims (15)

Semiconductor layer of silicon carbide (SiC); A trench in which the above semiconductor layer has been etched; A gate having a portion of the region embedded within the trench and another portion of the region extending over the semiconductor layer; A shield area covering the lower region of the above trench; A well region located in contact with the first side of the trench and the upper surface of the semiconductor layer within the semiconductor layer; A source region located in contact with the upper sidewall of the trench within the well region; and It includes a shield connection portion extending from the upper surface of the semiconductor layer to the shield region while in contact with a second side opposite to the first side, and A power semiconductor device in which another part of the gate extends to cover the upper surface of the source region and the well region in its entirety.
In claim 1, the gate is A recess gate embedded in the above trench and forming a vertical channel in the above well region when operating power is applied; and A power semiconductor device characterized by including a planar gate located on the semiconductor layer to be connected to the recess gate and forming a horizontal channel separated from the vertical channel in the well region when an operating power supply is applied.
In claim 2, the planar gate is A power semiconductor device characterized by being connected to a portion of the upper surface of the above-mentioned recess gate adjacent to the source region and extending to cover the source region and the well region.
In claim 1, the shield region is A power semiconductor device characterized by having both sides positioned symmetrically while protruding more than the two sides of the trench in both directions of the trench.
In claim 1, the shield region is A first shield region containing impurities of a first concentration; and A power semiconductor device characterized by including a second shield region surrounding the first shield region and containing impurities of a second concentration lower than the first concentration.
In claim 1, the shield connection portion A first impurity region connected to the shield region and formed in a shape protruding from the shield region in the second lateral direction; A second impurity region connected to the upper region of the first impurity region and extending to the upper surface of the semiconductor layer; and A power semiconductor device characterized by including a third impurity region located in contact with the upper surface of the semiconductor layer within the second impurity region and containing impurities at a higher concentration than the first and second impurity regions.
In claim 1, A power semiconductor device characterized by further including a JFET region located between the well region and the shield region within the semiconductor layer.
In claim 1, the semiconductor layer silicon carbide (SiC) substrate; and A power semiconductor device characterized by including a silicon carbide epitaxial layer grown on the silicon carbide substrate.
In claim 8, the silicon carbide epitaxial layer A power semiconductor device characterized by including a field stopper and a drift region located above the field stopper.
In claim 1, A drain electrode located below the semiconductor layer; and A power semiconductor device characterized by further including a source electrode located on the gate and the semiconductor layer to be connected to the shield connection portion.
A step of forming a shield region by injecting impurities of a second conductivity type opposite to the first conductivity type into a semiconductor layer of silicon carbide (SiC) having a first conductivity type; A step of etching the semiconductor layer to form a trench extending to the upper region of the shield region; A step of forming a shield connection connecting the shield region and the upper surface of the semiconductor layer by injecting impurities of the second conductivity type into one side of the trench; A step of forming a well region spaced apart from the shield region by injecting the second conductivity type impurities into one side opposite the trench; A step of forming a source region by injecting impurities of the first conductivity type into the well region; and The method includes the step of forming a gate such that some regions are buried within the trench and other regions extend over the semiconductor layer, wherein The above source region is formed in contact with the upper side wall of the trench, and A method for manufacturing a power semiconductor device in which another part of the gate extends to cover the upper surface of the source region and the well region in its entirety.
In claim 11, the step of forming the shield region A method for manufacturing a power semiconductor device characterized by forming a double shield structure in which an impurity region having a first concentration is surrounded by an impurity region having a second concentration lower than the first concentration.
In claim 11, the step of forming the trench A method for manufacturing a power semiconductor device characterized by etching the semiconductor layer up to a position where the lower region of the trench is wrapped by the shield region.
In claim 11, the step of forming the shield connection portion A step of forming a first impurity region connected to the shield region and protruding only in one direction from the shield region; A step of forming a second impurity region that is connected to the first impurity region and extends to the upper surface of the semiconductor layer; and A method for manufacturing a power semiconductor device characterized by including the step of forming a third impurity region within the second impurity region in contact with the upper surface of the semiconductor layer.
In claim 14, the third impurity region is A method for manufacturing a power semiconductor device characterized by being formed at a higher concentration than the impurity concentration of the second impurity region.

Description

Power semiconductor device and method of fabricating the same The present invention relates to a semiconductor device, and more specifically, to a power semiconductor device for switching power transmission and a method for manufacturing the same. Power semiconductor devices are semiconductor devices that operate in high-voltage and high-current environments. These power semiconductor devices are used in fields requiring high-power switching, such as power conversion, power converters, and inverters. Examples of power semiconductor devices include Insulated Gate Bipolar Transistors (IGBTs) and Metal Oxide Semiconductor Field Effect Transistors (MOSFETs). These power semiconductor devices fundamentally require voltage withstand characteristics for high voltage, and recently, high-speed switching operation is additionally required. Accordingly, power semiconductor devices utilizing silicon carbide (SiC) instead of conventional silicon (Si) are being researched. Silicon carbide (SiC) is a wide-gap semiconductor material with a higher bandgap than silicon, allowing it to maintain stability even at high temperatures. Furthermore, silicon carbide has a much higher dielectric breakdown field than silicon, enabling stable operation even at high voltages. Therefore, silicon carbide exhibits characteristics that allow for operation at high temperatures, possessing a higher breakdown voltage than silicon while maintaining excellent heat dissipation. To increase the channel density of power semiconductor devices using such silicon carbide, trench-type gate structures with a vertical channel structure are being studied. FIG. 1 is a diagram schematically showing the structure of a power semiconductor device according to one embodiment of the present invention. FIG. 2 is a diagram exemplarily showing the formation of a channel in the power semiconductor device of FIG. 1. FIGS. 3a to 3f are schematic drawings illustrating a method for manufacturing a power semiconductor device of FIG. 1 according to an embodiment of the present invention. Hereinafter, embodiments of the present invention will be described in detail with reference to the attached drawings. However, the present invention is not limited to the embodiments disclosed below but can be implemented in various different forms. The following embodiments are provided to ensure that the disclosure of the present invention is complete and to fully inform those skilled in the art of the scope of the invention. Additionally, for convenience of explanation, the size of at least some components in the drawings may be exaggerated or reduced. Identical reference numerals in the drawings refer to identical elements. Unless otherwise defined, all terms used herein have the same meaning as commonly understood by those skilled in the art. In the drawings, the sizes of layers and regions are exaggerated for illustrative purposes and are provided to describe the general structures of the invention. Identical reference numerals represent identical components. When one component, such as a layer, region, or substrate, is referred to as being "on" another component, it is understood that it is directly on top of the other component, or that there may also be other interposed components between them. On the other hand, when one component is referred to as being "directly on" another component, it is understood that there are no intermediate interposed components. FIG. 1 is a schematic diagram showing the structure of a power semiconductor device according to one embodiment of the present invention, and FIG. 2 is a diagram exemplarily showing the formation of a channel in the power semiconductor device of FIG. 1. Referring to FIGS. 1 and 2, a power semiconductor device may include a drain electrode (110), a semiconductor layer (120), a gate (130), an insulating film shield region (140), a shield connection (150), a well region (160), a source region (170), a JFET region (180), and a source electrode (180). The semiconductor layer (120) may include one or more semiconductor material layers. For example, the semiconductor layer (120) may include one or multiple epitaxial layers. The semiconductor layer (120) may include one or multiple epitaxial layers on a semiconductor substrate. For example, the semiconductor layer (120) may include a silicon carbide (SiC) substrate. Alternatively, the semiconductor layer (120) may include at least one epitaxial layer of silicon carbide. Silicon carbide (SiC) has a wider bandgap than silicon, so it can maintain stability even at high temperatures compared to silicon. Furthermore, silicon carbide has a much higher dielectric breakdown electric field than silicon, so it can operate stably even at high voltages. Therefore, a power semiconductor device using silicon carbide as the semiconductor layer (120) has a higher breakdown voltage compared to the case using silicon, has excellent heat dissipation characteristics, and can exhibit stable operation cha