KR-102963444-B1 - PIXEL CIRCUIT AND PIXEL DRIVING APPARATUS

Abstract

The present embodiment relates to pixel circuit and pixel driving device technology, and provides a hybrid method combining a Pulse Width Modulation (PWM) method, which supplies a ramp voltage as the gate voltage of a transistor placed within the pixel and turns off the LED when the gate voltage becomes equal to the threshold voltage, and a Pulse Amplitude Modulation (PAM) method, which determines the starting voltage of the ramp voltage according to the grayscale value of the pixel, thereby providing a technology for selectively using two LEDs arranged in parallel.

Inventors

• 김원연
• 전병관

Assignees

• 주식회사 엘엑스세미콘

Dates

Publication Date

20260511

Application Date

20211221

Claims (20)

1. A first path circuit comprising a first transistor and a second transistor arranged in series between a driving high voltage and a driving low voltage, wherein a first node is formed between the first transistor and the second transistor; and A second path circuit comprising a third transistor and a fourth transistor and a first LED arranged in series between the driving high voltage and the driving low voltage, a fifth transistor and a sixth transistor and a second LED arranged in parallel with the third transistor, the fourth transistor, and the first LED, wherein the gates of the third transistor and the fifth transistor are electrically connected to the first node, and only one of the fourth transistor and the sixth transistor is selected to emit light, and only one of the first LED and the second LED is light-emitting. A pixel circuit in which a ramp voltage that increases or decreases over time is supplied to the gate of the second transistor, and the starting voltage of the ramp voltage is determined according to the grayscale value of the pixel.
2. In paragraph 1, A pixel circuit in which the gate-source voltage of the second transistor increases or decreases according to the ramp voltage, and the first LED or the second LED is turned off at the point where it becomes equal to the threshold voltage of the second transistor.
3. In paragraph 1, The control time for the above pixel is divided into initialization time, program time, and light emission control time, and During the above program time, an initial voltage according to the grayscale value of the pixel is written to the pixel, and A pixel circuit in which the starting voltage is set according to the initial voltage at the beginning of the above light emission control time.
4. In paragraph 3, A pixel circuit in which a capacitor is placed between the gate and the data line of the second transistor, and the initial voltage is written to the capacitor during the program time.
5. In paragraph 4, A pixel circuit in which the data voltage supplied to the above data line is changed to a constant voltage at the beginning of the above light emission control time, and thereafter the voltage level increases or decreases at a constant slope.
6. A first path circuit comprising a first transistor controlling the supply of a driving high voltage to a first node and a second transistor controlling the supply of a driving low voltage to the first node; and It includes a third transistor that controls the supply of the driving high voltage to the anode of the first LED, a fourth transistor disposed between the first LED and the third transistor, a fifth transistor that controls the supply of the driving high voltage to the anode of the second LED disposed in parallel with the first LED, a sixth transistor disposed between the second LED and the fifth transistor, and a seventh transistor that controls the supply of the driving low voltage to the cathodes of the first LED and the second LED, wherein the gates of the third transistor and the fourth transistor are electrically connected to the first node, and it includes a second path circuit in which only one of the fourth transistor and the sixth transistor is selected. When a driving high voltage is formed at the first node, the third transistor and the fifth transistor are turned on, and when only one of the fourth transistor and the sixth transistor is selected while the third transistor and the fifth transistor are turned on and the driving low voltage is supplied to the cathode of one of the first LED and the second LED, one of the first LED and the second LED emits light. A pixel circuit in which a ramp voltage that increases or decreases over time is supplied to the gate of the second transistor, and the starting voltage of the ramp voltage is determined according to the grayscale value of the pixel.
7. In paragraph 6, A pixel circuit further comprising a connection control transistor, one side of which is connected to the second transistor and the seventh transistor, and the other side of which is connected to the driving low voltage, and which controls the connection between the first path circuit and the second path circuit and the driving low voltage.
8. In Paragraph 7, It further includes an eighth transistor that controls the connection between the gate and drain of the second transistor, and A pixel circuit in which, when the above connection control transistor is turned off, the first transistor and the eighth transistor are turned on, and the gate-source voltage of the second transistor becomes equal to the threshold voltage of the second transistor.
9. In Paragraph 7, It further includes a ninth transistor that controls the connection between the gate and drain of the seventh transistor, and A pixel circuit in which, when the above connection control transistor is turned off, the third transistor and the ninth transistor are turned on, and the gate-source voltage of the seventh transistor becomes equal to the threshold voltage of the seventh transistor.
10. In paragraph 6, It further includes a first capacitor disposed between the gate and the data line of the second transistor, and A pixel circuit in which a threshold voltage is written to the gate-source of the second transistor and an initial voltage is written to the first capacitor, and then a data voltage that increases or decreases with a constant slope is supplied through the data line.
11. In paragraph 6, One side further includes a second capacitor connected to the gate of the seventh transistor, and After a threshold voltage is written to the gate-source of the seventh transistor, a reference voltage is input to the other side of the second capacitor, and A pixel circuit in which the magnitude of the current flowing to the first LED or the second LED is controlled by the above reference voltage.
12. In paragraph 6, A connection control transistor, one side of which is connected to the second transistor and the seventh transistor, and the other side of which is connected to the driving low voltage; An eighth transistor that controls the connection between the gate and drain of the second transistor; A ninth transistor that controls the connection between the gate and drain of the seventh transistor; A first capacitor disposed between the gate and the data line of the second transistor; A scan transistor that controls the connection between the first capacitor and the data line; and A pixel circuit further comprising a second capacitor, one side of which is connected to the gate of the seventh transistor and the other side to which a reference voltage is input.
13. In Paragraph 12, The control time for the above pixel is divided into initialization time, program time, and light emission control time, and A pixel circuit in which, at the initialization time, the first transistor, the second transistor, and the ninth transistor are turned on, and the scan transistor and the connection control transistor are turned off.
14. In Paragraph 13, A pixel circuit in which, at the program time following the initialization time, the eighth transistor, the ninth transistor, the scan transistor, and the connection control transistor are turned on, and the first transistor is turned off.
15. In Paragraph 14, The light emission control time following the above program time is divided into a plurality of sub-times, and In the first subtime among the above plurality of subtimes, A pixel circuit in which the first transistor, the scan transistor, the connection control transistor, and the seventh transistor are turned on, and the eighth transistor and the ninth transistor are turned off.
16. In paragraph 6, The first transistor, the second transistor, the third transistor, the fifth transistor, and the seventh transistor are, It is formed on a silicon backplane as a CMOS (Complementary Metal-Oxide-Silicon) type, and The first transistor above is a P-type transistor, and The pixel circuit in which the second transistor, the third transistor, the fifth transistor, and the seventh transistor are N-type transistors.
17. In paragraph 6, The first transistor, the second transistor, the third transistor, the fifth transistor, and the seventh transistor are, A pixel circuit formed on an oxide backplane as an NMOS (N-channel Metal-Oxide-Silicon) type or PMOS (P-channel Metal-Oxide-Silicon) type.
18. In Paragraph 12, In the display panel where the above pixel is arranged, n pixels in a first direction and m pixels in a second direction (where n and m are integers greater than 2) are arranged in a matrix form, and The gates of the scan transistors of the m pixels in the second direction are electrically connected to a single scan line that supplies a scan signal, and The gates of the fourth transistors of the m pixels in the second direction are electrically connected to a first selection line that supplies a first selection signal, and A pixel circuit in which the gates of the sixth transistors of the m pixels in the second direction are electrically connected to a second selection line that supplies a second selection signal.
19. In Paragraph 18, The gates of the fourth transistors of two or more pixels of the first direction are electrically connected in common to a first selection line, and A pixel circuit in which the gates of the sixth transistors of two or more pixels of the first direction are electrically connected in common to one second selection line.
20. A pixel comprising a first path circuit including a first transistor and a second transistor arranged in series between a driving high voltage and a driving low voltage, wherein a first node is formed between the first transistor and the second transistor and a first capacitor is arranged between the gate and a data line of the second transistor, and a second path circuit including a third transistor and a fourth transistor and a first LED arranged in series between the driving high voltage and the driving low voltage, and a fifth transistor and a sixth transistor and a second LED arranged in parallel with the third transistor, the fourth transistor, and the first LED, wherein the gates of the third transistor and the fifth transistor are electrically connected to the first node, and only one of the fourth transistor and the sixth transistor is selected so that only one of the first LED and the second LED emits light. A pixel driving device that supplies a data voltage to the data line such that a ramp voltage that increases or decreases over time is formed at the gate of the second transistor, and the starting voltage of the ramp voltage is determined according to the grayscale value of the pixel.

Description

Pixel Circuit and Pixel Driving Apparatus This embodiment relates to pixel circuit and pixel driving device technology. As the information age advances, various display devices capable of visualizing information are being developed. Liquid Crystal Displays (LCDs), Organic Light Emitting Diodes (OLEDs), and Plasma Display Panels (PDPs) are among the display devices that have been developed or are currently being developed. These display devices are evolving to properly display high-resolution images. However, the aforementioned display devices have the advantage of high resolution but the disadvantage of being difficult to scale up. For example, large OLED display devices developed to date are at the 80-inch (approximately 2m) and 100-inch (approximately 25m) level, so they are not suitable for making large display devices with a width exceeding 10m. Recently, interest in LED (Light Emitting Diode) display devices has been increasing as a solution to the problem of scaling up. In LED display device technology, a single large panel can be constructed by arranging modular LED pixels in the required number. Alternatively, in LED display device technology, a large panel structure can be formed by arranging unit panels composed of multiple LED pixels in the required number. In this way, LED display device technology makes it easy to implement large display devices by expanding and arranging LED pixels as needed. LED display devices offer advantages not only in terms of large size but also in diversifying panel sizes; LED display technology allows for various adjustments to the horizontal and vertical dimensions depending on the appropriate arrangement of LED pixels. Meanwhile, there are various methods for driving display panels in which LEDs are placed, the most representative of which are Pulse Amplitude Modulation (PAM) and Pulse Width Modulation (PWM). The PAM method supplies an analog voltage corresponding to the pixel's grayscale value to the pixel and controls the magnitude of the current flowing to the pixel differently according to the analog voltage; however, there is a problem in that it is difficult to implement low grayscale levels in display panels in which LEDs are placed. The PWM method adjusts the timing of the current supplied to the pixel according to the pixel's grayscale value; however, in the conventional active method, a comparator circuit had to be placed within the pixel, which resulted in a complex pixel structure and inconsistent accuracy depending on the offset of the comparator. In addition, there was a problem where the display panel on which the LEDs are placed had to be discarded or a separate repair process performed if there were defects in the LEDs or defective pixels during the transfer process. FIG. 1 is a configuration diagram of a display device according to one embodiment. FIG. 2 is a first example configuration diagram of a pixel according to one embodiment. FIG. 3a is a waveform diagram of the main signal, voltage, and current of a pixel circuit according to the first example when the first LED is used. FIG. 3b is a waveform diagram of the main signal, voltage, and current of the pixel circuit according to the first example when the second LED is used. FIG. 4 is a second example configuration diagram of a pixel according to one embodiment. FIG. 5a is a waveform diagram of the main signal, voltage, and current of a pixel circuit according to the second example when the first LED is used. FIG. 5b is a waveform diagram of the main signal, voltage, and current of the pixel circuit according to the second example when the second LED is used. FIG. 6 is a diagram showing configurations turned on at the initialization time of the second example when the first LED is used. FIG. 7 is a diagram showing configurations turned on at the program time of the second example when the first LED is used. FIG. 8 is a diagram showing configurations turned on at the first sub-time of the light emission control time of the second example when the first LED is used. FIG. 9 is a diagram showing configurations turned on at the second sub-time of the light emission control time of the second example when the first LED is used. FIG. 10 is a diagram showing configurations turned on during the sub-time when the LED is turned off during the light emission control time of the second example when the first LED is used. FIG. 11 is a diagram showing configurations turned on at the initialization time of the second example when the second LED is used. FIG. 12 is a diagram showing configurations turned on at the program time of the second example when the second LED is used. FIG. 13 is a diagram showing configurations turned on during the first sub-time of the light emission control time of the second example when the second LED is used. FIG. 14 is a diagram showing configurations turned on at the second sub-time of the light emission control time of the second example when the second LED is used. FIG. 15 is