KR-102963656-B1 - MEMORY SYSTEM INCLUDING MEMORY DEVICE AND OPERATING METHOD THEREOF

Abstract

The present invention relates to a memory system and provides a memory device that performs a program loop including a program operation and a program verification operation in stages on a selected memory block among a plurality of memory blocks; the memory device that updates the maximum program loop count by comparing the number of program loops performed when the program verification operation is a pass with the previous maximum program loop count and stores the result as program pass information for the selected memory block; and a controller that manages a bad block among the plurality of memory blocks based on the program pass information.

Inventors

• 정원진

Assignees

• 에스케이하이닉스 주식회사

Dates

Publication Date

20260512

Application Date

20201125

Claims (20)

1. A memory device that sequentially performs a program loop including a program operation and a program verification operation in a selected memory block among a plurality of memory blocks, updates the maximum program loop count by comparing the number of program loops performed when the program verification operation is a pass with the previous maximum program loop count, and stores the result as program pass information of the selected memory block; and It includes a controller that manages bad blocks among the plurality of memory blocks based on the above program path information, and If the number of executed program loops is less than a first threshold value, the memory device updates the maximum program loop number to the larger of the number of executed program loops and the previous maximum program loop number. Memory system.
2. delete
3. In paragraph 1, A memory system in which the controller compares the maximum number of program loops with a second threshold value, and if the maximum number of program loops is greater than or equal to the second threshold value, the controller designates the selected memory block as the bad block.
4. In paragraph 3, The above second threshold value is a memory system that is smaller than the above first threshold value by a set size.
5. In paragraph 1, A memory system in which, if the number of program loops performed above is greater than or equal to the first threshold value, the memory device transmits the address of the selected memory block as program fail information to the controller.
6. In paragraph 5, The above controller is a memory system that designates the selected memory block as the bad block based on the program fail information.
7. In paragraph 1, A memory system in which, when the program loop of a plurality of memory cells included in the selected memory block is completed, the memory device transmits the program path information to the controller.
8. In paragraph 1, A memory system in which the above program path information includes the address of the selected memory block and the maximum number of program loops.
9. At least one memory block including a plurality of memory cells; A check circuit that verifies whether a selected memory cell among the plurality of memory cells above passes or fails the program and outputs a pass signal and a fail signal; An update circuit that increases a count value in response to the above pass signal and fail signal, and updates the maximum count value by comparing the count value with the previous maximum count value; and It includes a storage circuit that stores the above-mentioned updated maximum count value as program path information of the above-mentioned at least one memory block, and A memory device in which the above update circuit compares the above count value with a first threshold value, and if the above count value is less than the first threshold value, the above update circuit updates the maximum count value with the larger value between the above count value and the previous maximum count value.
10. delete
11. In Paragraph 9, A memory device in which at least one memory block is designated as a bad block if the above-mentioned updated maximum count value is greater than or equal to a second threshold value that is smaller than the above-mentioned first threshold value by a set size.
12. In Paragraph 9, A memory device in which, if the above count value is greater than or equal to the above first threshold value, the above at least one memory block is designated as a bad block.
13. In Paragraph 9, The above update circuit is A counting unit that increases the count value in response to the above fail signal; A first comparison unit that outputs a first comparison signal by comparing the count value with the first threshold value in response to the above pass signal; and A memory device comprising a second comparison unit that outputs a second comparison signal by comparing the count value with the previous maximum count value in response to the pass signal and the first comparison signal.
14. In Paragraph 13, The above storage circuit is a memory device that stores the address of at least one memory block and the count value as program path information in response to the second comparison signal.
15. In Paragraph 13, The above storage circuit is a memory device that stores the address of at least one memory block as program fail information in response to the above first comparison signal.
16. A step of programming a selected memory cell among a plurality of memory cells included in at least one memory block and verifying whether the program passes or fails; A step of increasing the count value based on the above verification result, and updating the maximum count value by comparing the above count value with the previous maximum count value; and The method includes the step of managing at least one memory block as a bad block based on the above-mentioned updated maximum count value, and The step of updating the above maximum count value is If the above verification result indicates a program failure, a step of increasing the above count value; If the verification result above is a program pass, a step of comparing the count value with a first threshold value and the previous maximum count value; and If, as a result of the comparison above, the count value is less than the first threshold value and greater than or equal to the previous maximum count value, the step of storing the count value as the maximum count value is included. Method of operation of a memory system.
17. delete
18. In Paragraph 16, The step of managing the above-mentioned bad block is When the programming of the plurality of memory cells is completed, a step of comparing the updated maximum count value with a second threshold value; and A method of operating a memory system comprising the step of designating at least one memory block as a bad block if, as a result of the comparison above, the updated maximum count value is greater than or equal to the second threshold value.
19. In Paragraph 18, The above second threshold value is a method of operation for a memory system that is smaller than the above first threshold value by a set size.
20. In Paragraph 18, The step of managing the above-mentioned bad block is A method of operating a memory system further comprising the step of designating at least one memory block as a bad block if, as a result of the comparison above, the count value is greater than or equal to the first threshold value.

Description

Memory system including a memory device and method of operating the same The present invention relates to a memory device, and more specifically, to a memory device that manages bad blocks based on the number of program loops and a memory system including the same. Recently, the paradigm of the computing environment is shifting toward ubiquitous computing, which enables the use of computer systems anytime and anywhere. As a result, the use of portable electronic devices such as mobile phones, digital cameras, and laptop computers is surging. These portable electronic devices generally utilize memory systems that employ memory devices—in other words, data storage devices. Data storage devices are used as the primary or secondary memory of portable electronic devices. Data storage devices utilizing memory components have excellent stability and durability due to the absence of mechanical moving parts, and also offer the advantages of very fast information access speeds and low power consumption. Examples of data storage devices with these advantages include USB (Universal Serial Bus) memory devices, memory cards with various interfaces, and Solid State Drives (SSDs). FIG. 1 is a block diagram showing a data processing system including a memory system according to an embodiment of the present invention. FIG. 2 is a block diagram showing the memory device illustrated in FIG. 1. FIG. 3 is a block diagram showing the control logic illustrated in FIG. 2. FIG. 4 is a flowchart for explaining the operation of a memory system according to an embodiment of the present invention. Hereinafter, in order to provide a detailed explanation sufficient for a person skilled in the art to easily implement the technical concept of the present invention, the most preferred embodiment of the present invention will be described with reference to the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below but may be configured in various different forms; the embodiments provided are merely intended to ensure that the disclosure of the present invention is complete and to fully inform a person skilled in the art of the scope of the present invention. FIG. 1 is a block diagram showing a data processing system including a memory system according to an embodiment of the present invention. Referring to FIG. 1, the data processing system (100) may include a host (HOST, 110) and a memory system (120). For example, the host (110) may include portable electronic devices such as mobile phones, MP3 players, laptop computers, etc., and electronic devices such as desktop computers, game consoles, TVs, projectors, etc., i.e., wired and wireless electronic devices. Additionally, the host (110) includes at least one operating system (OS), and the operating system generally manages and controls the functions and operations of the host (110) and provides interaction between the host (110) and a user using the data processing system (100) or memory system (120). Here, the operating system supports functions and operations corresponding to the user's purpose and use, and, for example, can be classified into a general operating system and a mobile operating system according to the mobility of the host (110). The general operating system in the operating system can be classified into a personal operating system and an enterprise operating system according to the user's usage environment. For example, the personal operating system is a system specialized to support service provision functions for general users, and includes Windows and Chrome, etc., while the enterprise operating system is a system specialized to secure and support high performance, and may include Windows Server, Linux and Unix, etc. Additionally, the mobile operating system in the operating system is a system specialized to support mobility service provision functions and system power saving functions for users, and may include Android, iOS, Windows Mobile, etc. At this time, the host (110) may include multiple operating systems and may also execute the operating system to perform operations with the memory system (120) corresponding to the user request. The host (110) transmits a plurality of commands corresponding to user requests to the memory system (120), and accordingly, the memory system (120) can perform operations corresponding to the commands, that is, operations corresponding to user requests. The memory system (120) operates in response to a request from the host (110) and, in particular, can store data accessed by the host (110). In other words, the memory system (120) can be used as the main memory or secondary memory of the host (110). Here, the memory system (120) can be implemented as any one of various types of storage devices according to the host interface protocol connected to the host (110). For example, the memory system (120) can be implemented as a solid-state drive (SSD) integrated into a single semiconductor devi