KR-102963949-B1 - FILM FOR PACKAGE SUBSTRATE AND SEMICONDUCTOR PACKAGE COMPRISING THE SAME

KR102963949B1KR 102963949 B1KR102963949 B1KR 102963949B1KR-102963949-B1

Abstract

A film for a package substrate of the present disclosure comprises: a film substrate having an upper surface and a lower surface; an upper test line pattern extending on the upper surface of the film substrate; a lower test line pattern extending on the lower surface of the film substrate; a first test via pattern penetrating the film substrate and connecting the upper test line pattern and the lower test line pattern; and a second test via pattern penetrating the film substrate from the outside of the first test via pattern and connecting the upper test line pattern and the lower test line pattern; a test pattern comprising; and a test pad disposed between the first test via pattern and the second test via pattern.

Inventors

양경숙
임소영
정예정

Assignees

삼성전자주식회사

Dates

Publication Date: 20260511
Application Date: 20201130

Claims (10)

A film substrate having an upper surface and a lower surface; A test pattern comprising: an upper test line pattern extending on the upper surface of the film substrate; a lower test line pattern extending on the lower surface of the film substrate; a first test via pattern penetrating the film substrate and connecting the upper test line pattern and the lower test line pattern; and a second test via pattern penetrating the film substrate from the outside of the first test via pattern and connecting the upper test line pattern and the lower test line pattern; and A test pad disposed between the first test via pattern and the second test via pattern, comprising: a first test pad disposed outside the first test via pattern; and a second test pad disposed inside the second test via pattern and facing the first test pad; said test pad; A film for a package substrate comprising, wherein the first test pad and the second test pad are disposed adjacent to each other at the outer edge of the film substrate.
In Article 1, The above upper test line pattern is, A first upper test line pattern connecting the first test pad and the first test via pattern; and A second upper test line pattern connecting the second test pad and the second test via pattern; A film for a package substrate characterized by including
In Article 2, The widths of the first upper test line pattern and the second upper test line pattern are, A film for a package substrate characterized by being 10 micrometers to 20 micrometers in size.
In Article 2, The pitch between the first upper test line patterns and the pitch between the second upper test line patterns are, A film for a package substrate characterized by being 20 micrometers to 40 micrometers in size.
In Article 1, The first test pad and the second test pad above are, A film for a package substrate characterized by being extended in a direction perpendicular to the extended direction of the film substrate and arranged symmetrically with respect to a central axis crossing between the first test pad and the second test pad.
In Article 1, The above-mentioned first test pad includes a plurality of first test pads having different sizes, and The above second test pad includes a plurality of second test pads having different sizes, and A film for a package substrate, characterized in that the length of the plurality of first test pads and the plurality of second test pads in the direction perpendicular to the direction in which the film substrate is extended is 140 micrometers to 300 micrometers.
A film substrate having an upper surface and a lower surface, comprising an input area, an output area, a chip area between the input area and the output area, and a test area disposed outside the output area; A redistribution pattern comprising: an upper redistribution line pattern extending on the upper surface of the film substrate; a lower redistribution line pattern extending on the lower surface of the film substrate; and a redistribution via pattern penetrating the film substrate and connecting the upper redistribution line pattern and the lower redistribution line pattern; A test pattern comprising: an upper test line pattern extending on the upper surface of the film substrate; a lower test line pattern extending on the lower surface of the film substrate; a first test via pattern penetrating the film substrate and connecting the upper test line pattern and the lower test line pattern; and a second test via pattern penetrating the film substrate from the outside of the first test via pattern and connecting the upper test line pattern and the lower test line pattern; and A test pad positioned on the test area of the film substrate and disposed between the first test via pattern and the second test via pattern, comprising: a first test pad disposed outside the first test via pattern; and a second test pad disposed inside the second test via pattern and facing the first test pad; A film for a package substrate comprising, wherein the first test pad and the second test pad are disposed adjacent to each other at the outer edge of the film substrate.
In Article 7, The above upper test line pattern is, A first upper test line pattern connecting the first test pad and the first test via pattern; and A second upper test line pattern disposed on the outer side of the first upper test line pattern and connecting the second test pad and the second test via pattern; Includes, A film for a package substrate characterized in that the signal flow directions of the first upper test line pattern and the second upper test line pattern are opposite.
In Article 7, The first test pad and the second test pad are rectangular in shape, and Among the lengths of the first test pad and the second test pad, the first length in the direction parallel to the direction in which the film substrate is extended is, Among the lengths of the first test pad and the second test pad, the second length in the direction perpendicular to the direction in which the film substrate is extended is smaller than the length of the first test pad and the second test pad, and The first test pad comprises a plurality of first test pads of different sizes, and the second test pad comprises a plurality of second test pads of different sizes. A film for a package substrate characterized in that the second length of the plurality of first test pads and the plurality of second test pads is 140 micrometers to 300 micrometers.
A film for a package substrate included in a semiconductor package, wherein the film for the package substrate comprises: a film substrate having an upper surface and a lower surface, and including an input region, an output region, a chip region between the input region and the output region, and a test region disposed outside the output region; a redistribution pattern comprising: an upper redistribution line pattern extending on the upper surface of the film substrate; a lower redistribution line pattern extending on the lower surface of the film substrate; and a redistribution via pattern penetrating the film substrate and connecting the upper redistribution line pattern and the lower redistribution line pattern; a test pattern comprising: an upper test line pattern extending on the upper surface of the film substrate; a lower test line pattern extending on the lower surface of the film substrate; a first test via pattern penetrating the film substrate and connecting the upper test line pattern and the lower test line pattern; and a second test via pattern penetrating the film substrate outside the first test via pattern and connecting the upper test line pattern and the lower test line pattern. A film for a package substrate comprising: a test pad positioned on the test area of the film substrate and disposed between the first test via pattern and the second test via pattern, the test pad comprising: a first test pad disposed outside the first test via pattern; and a second test pad disposed inside the second test via pattern and facing the first test pad; and a film for a package substrate comprising a test pad; and A semiconductor chip disposed on the chip region of the above film substrate; A semiconductor package comprising, wherein the first test pad and the second test pad are disposed adjacent to each other at the outer edge of the film substrate.

Description

Film for package substrate and semiconductor package comprising the same The technical concept of the present disclosure relates to a semiconductor package, and more specifically, to a semiconductor package comprising a film for a package substrate. In accordance with the trend toward miniaturization and lightweighting of electronic products, a Chip-On-Film (COF) package may be provided as a high-density semiconductor chip mounting technology. The Chip-On-Film package may include a semiconductor chip bonded to a substrate via flip-chip bonding, and redistribution patterns connected to the semiconductor chip and densely arranged on the substrate. Additionally, the substrate for manufacturing the Chip-On-Film package may include test pads for testing the signal transmission characteristics of the semiconductor chip. FIG. 1 is a cross-sectional view of a film for a package substrate according to an exemplary embodiment of the present disclosure. FIG. 2 is a plan view of a test area of a film for a package substrate according to an exemplary embodiment of the present disclosure. Figure 3 is an enlarged view of the area marked 'A' in Figure 2. FIG. 4 is a plan view of a test area of a film for a package substrate according to an exemplary embodiment of the present disclosure. FIG. 5 is a cross-sectional view of a semiconductor package according to an exemplary embodiment of the present disclosure. Figure 6 is a plan view of the test area of a film for a package substrate according to a comparative example. Figure 7 is an enlarged view of area 'B' in Figure 6. Figure 8 is a photograph showing the test area after the test of the film for the package substrate according to the comparative example has been performed. FIG. 9 is a flowchart showing the flow of a method for manufacturing, testing, and individualizing a semiconductor package according to an exemplary embodiment of the present disclosure. FIG. 10 is a flowchart showing the flow of a method for manufacturing a semiconductor package according to an exemplary embodiment of the present disclosure. FIGS. 11 to 16 are drawings showing each step of a method for manufacturing, testing, and individualizing a semiconductor package according to an exemplary embodiment of the present disclosure. Hereinafter, exemplary embodiments of the present disclosure will be described in detail with reference to the attached drawings. FIG. 1 is a cross-sectional view of a film (10) for a package substrate according to an exemplary embodiment of the present disclosure. A film (10) for a package substrate according to an exemplary embodiment of the present disclosure may be a film constituting a Chip-On-Film (COF) package. For example, the film (10) for a package substrate may be a film configured to mount a semiconductor chip (20). Referring to FIG. 1, a film (10) for a package substrate according to an exemplary embodiment of the present disclosure may include a film substrate (110), a redistribution pattern (120), an input pad (130), an output pad (140), a chip bonding pad (150), a passivation layer (160), a test pattern (220), a test pad (230), etc. The film substrate (110) of the film (10) for the package substrate may be a film for mounting a semiconductor chip (20). In an exemplary embodiment, the film substrate (110) may include an insulating material. For example, the film substrate (110) may include a material of polyimide or an epoxy resin. Additionally, the film substrate (110) may be a flexible film having flexibility. In an exemplary embodiment, the film substrate (110) may have an upper surface (110a) and a lower surface (110b). The upper surface (110a) of the film substrate (110) may be one side of the film substrate (110) on which a semiconductor chip (20) is mounted and a test pad (230) is placed. Additionally, the lower surface (110b) of the film substrate (110) may be one side of the film substrate (110) opposite to the upper surface (100a). In an exemplary embodiment, the film substrate (110) may include a chip region (CS), an input region (IS), an output region (OS), and a test region (TS). The chip region (CS) may be a region of the film substrate (110) on which a semiconductor chip (20) is mounted. For example, the chip region (CS) may be formed in the central part of the film substrate (110). The input area (IS) is positioned on one side of the chip area (CS) and may be an area of the film substrate (110) for signal input. For example, the input area (IS) of the film substrate (110) may be an area of the film substrate (110) connected to a printed circuit board (PCB) and receiving a signal from the printed circuit board. The output region (OS) is positioned on the other side of the chip region (CS) and may be a region of the film substrate (110) for signal output. For example, the output region (OS) of the film substrate (110) may be a region of the film substrate (110) connected to a display panel and transmitting a signal to the display panel. A test ar