KR-102964051-B1 - PARALLEL CONVERTER SYSTEM AND OPERATING METHOD THEREOF

Abstract

A parallel converter system and a method of operating the same are disclosed. A parallel converter system according to one aspect of the present invention comprises a plurality of buck converters connected in parallel and a controller for controlling the plurality of buck converters, wherein the buck converters include a high-side switch and a low-side switch, and the controller determines whether another buck converter is operating when the target buck converter is initially operated, and if another buck converter is operating, maintains the duty cycle of the low-side switch included in the target buck converter at a preset value for a predetermined period to prevent reverse current from occurring in the target buck converter.

Inventors

• 김동은

Assignees

• 주식회사 경신

Dates

Publication Date

20260513

Application Date

20230912

Claims (12)

1. Multiple buck converters connected in parallel; and It includes a controller that controls the plurality of buck converters above, and The above buck converter includes a high-side switch and a low-side switch, and The controller determines whether another buck converter is operating during the initial operation of the target buck converter, and if another buck converter is operating, maintains the duty cycle of the low-side switch included in the target buck converter at a preset value for a predetermined period to prevent reverse current from occurring in the target buck converter. The controller gradually increases the duty cycle of the high-side switch included in the target buck converter from a preset initial value during the predetermined period, and The above setting value is set to a value smaller than the duty cycle in the case where the low-side switch included in the target buck converter operates complementarily to the high-side switch included in the target buck converter, and A parallel converter system characterized by the above controller controlling the target buck converter such that the low-side switch included in the target buck converter is turned on at a time after a preset set time has elapsed from the point in time when the high-side switch included in the target buck converter is turned off during the above predetermined period.
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4. In Article 1, A parallel converter system characterized in that the above-mentioned predetermined period is from the point in time when the target buck converter starts operating until the point in time when the output voltage of the target buck converter reaches the target voltage.
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6. In Article 1, A parallel converter system characterized by the controller changing the duty ratio of the low-side switch included in the target buck converter according to the duty ratio of the high-side switch included in the target buck converter so that the low-side and high-side switches included in the target buck converter operate complementarily after the predetermined time.
7. As a method of operation for a parallel converter system, A step of determining whether another buck converter connected in parallel to the target buck converter is operating during the initial operation of the target buck converter; and The method includes the step of maintaining the duty cycle of a low-side switch included in the target buck converter at a preset value for a predetermined period to prevent reverse current from occurring in the target buck converter when another buck converter is operating, The method further includes the step of gradually increasing the duty cycle of the high-side switch included in the target buck converter from a preset initial value during the aforementioned predetermined period. The above setting value is set to a value smaller than the duty cycle in the case where the low-side switch included in the target buck converter operates complementarily to the high-side switch included in the target buck converter, and The above-mentioned maintaining step is, A method of operating a parallel converter system characterized by including the step of controlling the target buck converter such that the low-side switch included in the target buck converter is turned on at a time after a preset set time has elapsed from the point in time when the high-side switch included in the target buck converter is turned off during the above-mentioned predetermined period.
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10. In Article 7, A method of operating a parallel converter system, characterized in that the above-mentioned predetermined period is from the point in time when the target buck converter starts operating until the point in time when the output voltage of the target buck converter reaches the target voltage.
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12. In Article 7, After the above-mentioned maintenance step, A method of operating a parallel converter system characterized by further including the step of changing the duty ratio of a low-side switch included in the target buck converter according to the duty ratio of a high-side switch included in the target buck converter so that the low-side and high-side switches included in the target buck converter operate complementarily.

Description

Parallel Converter System and Operating Method Thereof The present invention relates to a parallel converter system and a method of operating the same, and more specifically, to a parallel converter system composed of a plurality of buck converters connected in parallel and a method of operating the same. Parallel converter systems, in which multiple converters are connected in parallel and share the power required by a load, are widely used. Such parallel converter systems offer various advantages, including the ease of increasing processing power, the ability to reduce current ripple when implemented using an interleaving method, and the ability to maintain normal operation by utilizing other converters even if one converter fails. Meanwhile, when another converter starts operating while one converter in a parallel converter system is already in operation, a reverse current may occur in the starting converter, potentially damaging surrounding components. To prevent this, relays are conventionally applied to the output terminals of each converter in the parallel converter system; however, the application of these relays increases the overall size and cost of the parallel converter system. Consequently, there is a need for a technology that can effectively prevent reverse current without the use of relays. The background technology of the present invention is disclosed in Korean Registered Patent Publication No. 10-1538017 (July 14, 2015). FIG. 1 is a configuration diagram showing a parallel converter system according to one embodiment of the present invention. Figure 2 is a timing diagram of a conventional parallel converter system. Figure 3 is an example diagram illustrating the reverse current occurring in a buck converter included in a parallel converter system. Figure 4 is a configuration diagram showing a conventional parallel converter system. FIG. 5 is a timing diagram relating to a parallel converter system according to one embodiment of the present invention. FIG. 6 is a flowchart showing the operation method of a parallel converter system according to one embodiment of the present invention. Hereinafter, a parallel converter system and its operation method according to an embodiment of the present invention will be described in detail with reference to the attached drawings. In this process, the thickness of lines or the size of components depicted in the drawings may be exaggerated for clarity and convenience of explanation. Furthermore, the terms described below are defined considering their functions in the present invention, and these may vary depending on the intention or convention of the user or operator. Therefore, the definitions of these terms should be based on the content throughout this specification. FIG. 1 is a configuration diagram showing a parallel converter system according to an embodiment of the present invention, FIG. 2 is a timing diagram regarding a conventional parallel converter system, FIG. 3 is an example diagram for explaining a reverse current occurring in a buck converter included in a parallel converter system, and FIG. 4 is a configuration diagram showing a conventional parallel converter system. Referring to FIG. 1, a parallel converter system according to one embodiment of the present invention may include a plurality of buck converters (10) and a controller (20). A parallel converter system according to one embodiment of the present invention may include various additional components in addition to the components shown in FIG. 1, or may omit some of the components. The buck converter (10) can convert (step down) the input voltage generated from the power source (30) connected to the input terminal and output it to the load (40) connected to the output terminal. The buck converter (10) may be a non-isolated DC-DC converter, but is not limited thereto. The buck converter (10) may include an inductor (11), a capacitor (12), a pair of switching elements (13, 14), a driver IC (15), and a current sensor (not shown). One end of the inductor (11) may be connected to a power source (30) and the other end may be connected to a load (40). One end of the capacitor (12) may be connected to the inductor (11) and the load (40) and the other end may be connected to ground. A pair of switching elements (13, 14) may include a high-side switch (13) and a low-side switch (14). The high-side switch (13) and the low-side switch (14) may be implemented as n-channel type MOSFETs, but are not limited thereto. A power supply (30) may be connected to the drain terminal of the high-side switch (13), an inductor (11) may be connected to the source terminal of the high-side switch (13), and a driver IC (15) may be connected to the gate terminal of the high-side switch (13). The high-side switch (13) may be turned on or turned off according to a Pulse Width Modulation (PWM) signal output from the driver IC (15). The source terminal of the inductor (11) and the high side switch (13) is connec