KR-102964137-B1 - High electron mobility transistor and method of manufacturing the same

KR102964137B1KR 102964137 B1KR102964137 B1KR 102964137B1KR-102964137-B1

Abstract

A high electron mobility transistor (HEMT) and a method for manufacturing it are disclosed. The disclosed high electron mobility transistor (HEMT) comprises a channel layer, a barrier layer disposed on the channel layer and inducing a 2-dimensional electron gas (2DEG) in the channel layer, and an etch stop layer disposed on the barrier layer; A T-shaped gate supporting insulating layer (hereinafter, supporting insulating layer) configured to be disposed on the etch stop layer and having a recess region, an opening region that overlaps with the recess region and the opening region has an extended opening pattern portion having a width extended compared to the rest of the portion, disposed on the etch stop layer exposed by the recess region to penetrate the opening region, and supported by the supporting insulating layer, and having a lower support portion and an upper head portion disposed thereon, an insulating passivation layer formed to cover the supporting insulating layer and the T-shaped gate and formed to cover the surface of the etch stop layer and the contact layer exposed by the recess region through the extended opening pattern portion, and a source electrode and a drain electrode spaced apart from the T-shaped gate and electrically connected to the channel layer through at least the contact layer.

Inventors

심재필
이일형
장현철
송인선
김규태
고유민

Assignees

(재)한국나노기술원

Dates

Publication Date: 20260512
Application Date: 20251224

Claims (20)

Channel layer; A barrier layer disposed on the channel layer and inducing 2DEG (2-dimensional electron gas) in the channel layer; An etch stop layer disposed on the above barrier layer; A contact layer disposed on the above etching stop layer and having a recess region; A T-shaped gate supporting insulating layer (hereinafter, supporting insulating layer) disposed on the above contact layer and configured to have an opening region that overlaps with the above recess region, wherein the opening region has an expanded opening pattern portion having a width expanded compared to the remaining portion; A T-shaped gate disposed on the etch stop layer exposed by the recess region to penetrate the opening region, supported by the supporting insulating layer, and having a lower support portion and an upper head portion disposed thereon; An insulating passivation layer formed to cover the support insulating layer and the T-shaped gate, and formed to cover the surface of the etch stop layer and the contact layer exposed by the recess region through the expanded opening pattern portion; and A high electron mobility transistor (HEMT) comprising a source electrode and a drain electrode spaced apart from the above T-type gate and electrically connected to the channel layer through at least the contact layer.
In Article 1, A high electron mobility transistor (HEMT) in which at least one of the channel layer and the barrier layer comprises a III-V group compound semiconductor.
In Article 1, The above supporting insulating layer comprises at least one of an oxide, a nitride, and a nitride, in a high electron mobility transistor (HEMT).
In Article 1, The above supporting insulating layer is a high electron mobility transistor (HEMT) having a thickness in the range of 10 to 100 nm.
In Article 1, The channel layer, the barrier layer, the etch stop layer, and the contact layer constitute a mesa structure, and The above-mentioned extended aperture pattern portion includes a first extended aperture pattern portion adjacent to each of the two ends of the mesa structure along the length direction of the T-type gate, in a high electron mobility transistor (HEMT).
In Article 5, The first extended aperture pattern portion is a high electron mobility transistor (HEMT) having a width greater than that of both ends along the length direction of the T-type gate.
In Article 5, The above first expanded aperture pattern portion is a high electron mobility transistor (HEMT) having a structure in which the width expands at least partially as it moves toward the outer direction of the high electron mobility transistor (HEMT).
In Article 1, The channel layer, the barrier layer, the etch stop layer, and the contact layer constitute a mesa structure, and The above-mentioned extended aperture pattern portion comprises one or more second extended aperture pattern portions disposed within the active region between the two ends of the mesa structure, and is a high electron mobility transistor (HEMT).
In Article 8, The above second extended aperture pattern portion is a high electron mobility transistor (HEMT) having a width greater than the corresponding portion of the recess area.
In Article 8, The above second expanded opening pattern portion is provided in plurality, and The above plurality of second extended aperture pattern portions are high electron mobility transistors (HEMTs) arranged at equal or unequal intervals.
In Article 1, A high electron mobility transistor (HEMT) formed such that the insulating passivation layer in the region where the expanded opening pattern portion is not formed covers the upper surface of the etch stop layer, the side surface of the contact layer, the side surface of the T-shaped gate, and the lower surface of the supporting insulating layer within the recess region.
A step of forming a stacked structure in which a channel layer, a barrier layer that induces 2DEG in the channel layer, an etch stop layer, and a contact layer are sequentially arranged on a substrate; A step of forming a T-shaped gate supporting insulating layer (hereinafter, supporting insulating layer) covering the stacked structure on the substrate; A step of patterning the above-mentioned supporting insulating layer to form an opening region in the area where a T-shaped gate is to be formed, wherein the opening region is formed to have an expanded opening pattern portion having a width expanded compared to the remaining portion; A step of forming a resist pattern for forming a T-shaped gate on the contact layer exposed by the support insulating layer and the opening region, wherein the resist pattern is formed to have a resist opening that exposes a portion of the contact layer; A step of performing etching on the contact layer portion through the resist opening to form a recess area in the contact layer that overlaps with the opening area; A step of forming a T-shaped gate having a lower support portion and an upper head portion disposed thereon, which is disposed on the etch stop layer exposed by the recess region, penetrating the opening region through the resist opening, supported by the supporting insulating layer; Step of removing the above resist pattern; and A method for manufacturing a high electron mobility transistor (HEMT), comprising the step of forming an insulating passivation layer to cover the surface of the etching stop layer and the contact layer exposed by the recess region by the inflow of a deposition source into the recess region through the extended opening pattern portion while covering the support insulating layer and the T-type gate.
In Article 12, A method for manufacturing a high electron mobility transistor (HEMT) in which at least one of the channel layer and the barrier layer comprises a III-V group compound semiconductor.
In Article 12, A method for manufacturing a high electron mobility transistor (HEMT) in which the above-mentioned supporting insulating layer comprises at least one of an oxide, a nitride, and a nitride.
In Article 12, A method for manufacturing a high electron mobility transistor (HEMT) having a thickness of 10 to 100 nm in the range of the above supporting insulating layer.
In Article 12, The channel layer, the barrier layer, the etch stop layer, and the contact layer constitute a mesa structure, and A method for manufacturing a high electron mobility transistor (HEMT) comprising a first expanded opening pattern portion that is in contact with each of the two ends of the mesa structure along the length direction of the T-type gate.
In Article 16, A method for manufacturing a high electron mobility transistor (HEMT) in which the first extended opening pattern portion has a width greater than that of both ends along the length direction of the T-type gate.
In Article 16, A method for manufacturing a high electron mobility transistor (HEMT) having a structure in which the first expanded aperture pattern portion has a width that expands at least partially as it moves toward the outer direction of the high electron mobility transistor (HEMT).
In Article 12, The channel layer, the barrier layer, the etch stop layer, and the contact layer constitute a mesa structure, and A method for manufacturing a high electron mobility transistor (HEMT) comprising one or more second expanded aperture pattern portions disposed within an active region between the two ends of the mesa structure.
In Article 19, A method for manufacturing a high electron mobility transistor (HEMT) in which the second expanded aperture pattern portion has a width greater than the corresponding recess area portion.

Description

High electron mobility transistor and method of manufacturing the same The present invention relates to a transistor, a method for manufacturing the same, and a device including a transistor, and more specifically, to a high electron mobility transistor, a method for manufacturing the same, and an electronic device including a high electron mobility transistor. A high electron mobility transistor (HEMT) may include materials (semiconductors) with different energy bandgaps and/or semiconductors with different electrical polarization characteristics. In a HEMT, materials with different energy bandgaps can induce a two-dimensional electron gas (2DEG) in a semiconductor layer joined thereto, and a semiconductor layer with a relatively large polarization can induce a 2DEG in another semiconductor layer joined thereto. The 2DEG can have very high electron mobility and can be used as a channel in the HEMT. In the fabrication of compound semiconductor-based HEMTs, it may be required to apply a T-type gate structure. Various methods for creating T-type gates have been proposed in the fabrication of conventional InP or GaAs-based HEMTs. According to existing technology, for the fabrication of InP or GaAs-based HEMTs, an electron beam (E-beam) resist pattern for manufacturing a T-type gate is formed on an n+ InGaAs surface that has undergone an ohmic process. Subsequently, a channel recess is etched by wet etching, a gate metal is deposited, and the resist pattern is removed by lift-off. However, in this case, because the adhesion at the interface between the electron beam resist pattern and the n+ InGaAs is weak, the wet etching solution penetrates into the interface during the channel recess wet etching process, making it difficult to ensure reproducibility. Furthermore, since there is no structure to support the lower side of the T-type gate, miniaturization of the gate width is difficult, and there are structural instability issues. Since device characteristics capable of operating at ultra-high frequencies can be secured through gate width miniaturization, the existing method has limitations in fabricating ultra-high frequency communication devices. Recently, a method utilizing an insulating film has been proposed to improve the adhesion of the electron beam resist and to stably realize a fine gate width. In this method, an insulating film is deposited on an n+ InGaAs surface where an ohmic process has been completed, an electron beam resist pattern is formed thereon, the insulating film is etched using a reactive ion etching (RIE) process, a recess wet etching is performed to expose the channel layer, a T-shaped gate metal is deposited, and a lift-off process is performed. By applying this process, the space where the insulating film is opened by the dry etching process of the RIE method does not expand due to the recess etching process, thereby enabling the realization of a fine T-shaped gate. At the same time, by supporting the T-shaped gate from the side, stable operation without gate collapse is possible, which is an advantage. However, since passivation of the channel surface in the recess region is impossible during the passivation process, there are problems regarding the degradation of electrical characteristics and reliability (long-term reliability) caused by increased leakage current to the channel surface in the recess region. To passivate the channel surface in the recess region, the passivation process must be performed after removing all the insulating film used for T-type gate formation; however, this method may not be applicable because the removal process causes severe damage to the already exposed recess channel surface, leading to device performance degradation. Meanwhile, in addition to the passivation process mentioned above, some metal material of the deposited T-type gate metal is diffused toward the channel through an additional process of heat treatment at a temperature of about 250°C or higher to improve the characteristics of the Schottky diode and enhance the DC (direct current) and RF (radio frequency) performance of the device. However, this additional process has the disadvantage of making the process more complex and increasing manufacturing time and cost. FIG. 1 is a plan view illustrating a high electron mobility transistor (HEMT) according to one embodiment of the present invention. Figure 2 is a cross-sectional view showing the cross-sectional structure along the A-A', B-B', and C-C' lines of Figure 1, respectively. Figure 3 is a cross-sectional view showing a HEMT device after forming an insulating passivation layer on the structure of Figure 2. FIG. 4 is a perspective view for explaining a HEMT according to one embodiment of the present invention. Figure 5 is a cross-sectional view showing a HEMT according to a comparative example. Figure 6 is a scanning electron microscope (SEM) cross-sectional image showing a HEMT prepared according to a comparative example. FIG. 7 is a p