KR-102964514-B1 - DISPLAY DEVICE

KR102964514B1KR 102964514 B1KR102964514 B1KR 102964514B1KR-102964514-B1

Abstract

The present invention relates to a display device capable of realizing high resolution. The present invention can realize high resolution by providing a storage capacitor that overlaps with a thin-film transistor. The storage electrode included in the storage capacitor has a hollow region, thereby maintaining the capacitance of the storage capacitor appropriately and improving current uniformity. Furthermore, since the storage electrode is positioned between the gate electrode and the signal line, signal interference can be minimized.

Inventors

연득호
오금미
고선욱

Assignees

엘지디스플레이 주식회사

Dates

Publication Date: 20260513
Application Date: 20200702

Claims (17)

A first thin-film transistor comprising: an active layer disposed on a substrate and including a channel region, a drain region, and a source region; a gate electrode that overlaps the channel region with a gate insulating film in between; a source electrode that contacts the source region through a source contact hole of an interlayer insulating film disposed on the gate electrode; and a drain electrode that contacts the drain region through a drain contact hole of the interlayer insulating film; It is equipped with a capacitor that overlaps with the first thin-film transistor, and The above capacitor is provided with a storage electrode having a hollow region to surround the outer region of the channel region, and A display device having the above-mentioned hollow region, wherein the storage electrode is disposed between the drain contact hole and the source contact hole.
In Article 1, A display device in which the hollow region of the storage electrode and the storage electrode overlap with the gate electrode.
In Article 1, A display device in which the hollow region of the storage electrode is circular, elliptical, or square in shape.
In Article 1, The above storage electrode is First and second electrode patterns parallel to the longitudinal direction of the active layer and facing each other with the hollow region in between, A display device having third and fourth electrode patterns that are parallel to the width direction of the active layer and face each other with the hollow region in between.
In Article 1, Further comprising a signal line disposed on the above substrate, The above storage electrode is A display device positioned between the above signal line and the above gate electrode.
In Article 1, The above interlayer insulating film includes a first interlayer insulating film disposed between the gate electrode and the storage electrode, and a second interlayer insulating film disposed between the storage electrode and the source electrode or the drain electrode. The storage electrode is a display device disposed between the source and drain electrodes, respectively, and the gate electrode.
In Article 1, A second thin-film transistor connected to the first thin-film transistor and having a channel width smaller than the channel width of the first thin-film transistor; A display device further comprising a light-emitting element connected to the first thin-film transistor.
In Article 1, A display device disposed on the above substrate and further comprising a gate driver including the first thin-film transistor and the capacitor.
In Article 1, A display device wherein the first thin-film transistor is disposed in an active area where an image is implemented, or disposed in the active area and a non-active area where the image is not implemented.
A switching transistor disposed on a substrate; A driving transistor comprising an active layer connected to the switching transistor and including a channel region, a drain region, and a source region; a gate electrode that overlaps the channel region with a gate insulating film in between; a source electrode that contacts the source region through a source contact hole in an interlayer insulating film disposed on the gate electrode; and a drain electrode that contacts the drain region through a drain contact hole in the interlayer insulating film; A light-emitting element connected to the above-mentioned driving transistor; It is equipped with a storage capacitor that overlaps with the above-mentioned driving transistor, and The above storage capacitor is provided with a storage electrode having a hollow region to surround the outer region of the channel region, and A display device having the above-mentioned hollow region, wherein the storage electrode is disposed between the drain contact hole and the source contact hole.
In Article 10, A display device in which the hollow region of the storage electrode and the storage electrode overlap with the gate electrode.
In Article 10, The above storage electrode is First and second electrode patterns parallel to the longitudinal direction of the active layer and facing each other with the hollow region in between, A display device having third and fourth electrode patterns that are parallel to the width direction of the active layer and face each other with the hollow region in between.
In Article 10, It further comprises a signal line electrically connected to either of the switching transistor and the driving transistor, and The above storage electrode is A display device positioned between the above signal line and the above gate electrode.
In Article 13, The above interlayer insulating film includes a first interlayer insulating film disposed between the gate electrode and the storage electrode, and a second interlayer insulating film disposed between the storage electrode and the source electrode or the drain electrode. The storage electrode is a display device disposed between the source and drain electrodes, respectively, and the gate electrode.
In Article 10, A display device in which the channel width of the switching transistor is narrower than the channel width of the driving transistor.
In Article 10, A gate driver disposed on the above substrate and further comprising a plurality of scan transistors and a plurality of scan capacitors, and A display device having a second hollow region such that an electrode included in at least one of the plurality of scan capacitors surrounds the outer region of the channel region of any one of the plurality of scan transistors.
In Article 1, A display device in which, among the patterns of the storage electrode forming the hollow region, both ends of a pattern parallel to the width direction of the channel region and overlapping with the boundary between the channel region and the drain region or the boundary between the channel region and the source region are located inside the drain contact hole and the source contact hole with respect to the length direction of the channel region.

Description

Display Device The present invention relates to a display device, and more particularly to a display device capable of realizing high resolution. Video display devices, which display various information on a screen, are a core technology of the information and communication era and are evolving in a direction that is thinner, lighter, more portable, and higher in performance. Accordingly, flat panel displays, which can reduce the weight and volume that are disadvantages of cathode ray tubes (CRTs), are gaining attention. Flat panel display devices include Liquid Crystal Display Devices (LCDs), Plasma Display Panels (PDPs), Organic Light Emitting Display Devices (OLEDs), and Electrophoretic Display Devices (EDs). This flat panel display device implements an image through a plurality of subpixels arranged in a matrix form. Each of these plurality of subpixels is equipped with a pixel driving circuit comprising at least one transistor and a storage capacitor. Recently, as the resolution of display devices increases, the size of each subpixel must be reduced. However, since a separate area occupied by a storage capacitor must be provided for each subpixel, there are limitations in implementing high-resolution display devices. FIG. 1 is a block diagram showing a display device according to the present invention. Figure 2 is a plan view showing a thin-film transistor included in each subpixel shown in Figure 1. FIG. 3 is a cross-sectional view showing a thin-film transistor cut along line "I-I'" in FIG. 2. FIG. 4 is a plan view for explaining in detail the storage electrode shown in FIG. 2. FIG. 5 is a cross-sectional view showing the arrangement relationship of the first gate electrode, storage electrode, and signal line shown in FIG. 4. FIG. 6 is a cross-sectional view showing an organic light-emitting display device to which the thin-film transistor shown in FIG. 4 is applied. Figure 7 is a plan view showing the switching transistor illustrated in Figure 6. FIG. 8 is a cross-sectional view showing a thin-film transistor cut along line "II-II'" in FIG. 3 and a switching transistor cut along line "III-III'" in FIG. 7. FIG. 9a is a plan view showing a thin-film transistor of a comparative example, and FIG. 9b and FIG. 9c are drawings showing the characteristics of a thin-film transistor of a comparative example. FIG. 10a is a plan view showing a thin-film transistor of the present invention, and FIG. 10b and FIG. 10c are drawings showing the characteristics of a thin-film transistor of the present invention. Figure 11 is a circuit diagram showing the gate driver illustrated in Figure 1. Hereinafter, embodiments according to the present invention will be described in detail with reference to the attached drawings. FIG. 1 is a block diagram showing a display device according to the present invention. The display device illustrated in FIG. 1 includes a display panel (10) and a panel driving unit that drives the display panel (10). The panel driving unit includes a data driving unit (20), a gate driving unit (40A, 40B), and a timing controller (30). The timing controller (30) generates data control signals and gate control signals that control the driving timing of the data driving unit (20) and the gate driving unit (40A, 40B), respectively, and supplies them to the data driving unit (20) and the gate driving unit (40A, 40B). The timing controller (30) processes image data and supplies it to the data driving unit (20). The data driving unit (20) is controlled by a data control signal supplied from the timing controller (30), and converts the image data supplied from the timing controller (30) into an analog data signal and supplies it to the data line (DL) of the display panel (10). The gate driver (40A, 40B) is implemented as a GIP (Gate in panel) circuit that is directly formed in the form of a thin-film transistor on a non-active area (RNA, LNA) on the display panel (10). The gate driver (40A, 40B) is placed in a non-display area (NA) on at least one side of the left and right sides of the display panel (10). These gate drivers (40A, 40B) output a gate signal while shifting the level of the gate voltage in response to a gate control signal supplied from the timing controller (30). The gate drivers (40A, 40B) output a gate signal through the gate lines (GL). The display panel (10) includes an active area (AA) that implements a screen on which an input image is displayed, and a non-active area (NA) located on at least one side of the active area (AA). The non-active area (NA) is an area where the input image is not displayed, and where subpixels (SP) are not placed, and signal lines and gate drivers (40A, 40B) are placed. In the active region (AA), subpixels (SP) connected to mutually intersecting data lines (DL) and gate lines (GL) are arranged in a matrix form. The subpixels (SP) each have at least one thin-film transistor and a storage capacitor electrically connected to the thin-film transistor. At least one th