KR-20260062315-A - High-power semiconductor package with minimal heat dissipation structure using heterogeneous materials

KR20260062315AKR 20260062315 AKR20260062315 AKR 20260062315AKR-20260062315-A

Abstract

The high-power semiconductor package (100) having a heterogeneous material minimal heat dissipation structure of the present invention comprises: an insulating substrate (110) having a circuit pattern (112) capable of circuit connection with the outside, a cavity (113) with an open top, and one or more communication holes (114) communicating with the outside in the lower direction of the cavity; one or more heat dissipation parts (120) composed of a material having thermal conductivity and disposed in each of the one or more communication holes; one or more first semiconductor devices (130) disposed in each of the upper surfaces of the one or more heat dissipation parts and each connected to the circuit pattern; and one or more second semiconductor devices (140) disposed in the bottom surface of the insulating substrate within the cavity and each connected to the circuit pattern. The first semiconductor device is composed of a heat-generating device, and the second semiconductor device is composed of a non-heat-generating device. The heat dissipation part comprises a first heat dissipation part (121) disposed in a portion of the communication hole and exposed to the cavity, with the first semiconductor device disposed on the exposed surface, and the first heat dissipation part It includes a second heat dissipation part (122) that is integrated and disposed in another section within the communication hole and exposed to the lower part of the insulating substrate, and the second heat dissipation part is made of a material with a higher thermal conductivity than the first heat dissipation part.

Inventors

민병석
황상용

Assignees

주식회사 멤스팩

Dates

Publication Date: 20260507
Application Date: 20241029

Claims (7)

An insulating substrate having a circuit pattern capable of circuit connection with the outside, a cavity with an open top, and one or more communication holes communicating with the outside in the downward direction of the cavity, and One or more heat dissipation members, each disposed in one or more of the above-mentioned communication holes and composed of a material having thermal conductivity, and One or more first semiconductor elements each disposed on the upper surface of the one or more heat dissipation portions and each connected to the circuit pattern, and It includes one or more second semiconductor elements disposed on the bottom surface of the insulating substrate within the cavity and each connected to the circuit pattern, and The first semiconductor device is composed of a heating element, and the second semiconductor device is composed of a non-heating element. The heat dissipation unit comprises a first heat dissipation unit disposed in a portion of the communication hole and exposed to the cavity, with the first semiconductor device disposed on the exposed surface, and a second heat dissipation unit disposed in another portion of the communication hole in a state integrated with the first heat dissipation unit and exposed to the lower part of the insulating substrate. A high-power semiconductor package having a heterogeneous material minimal heat dissipation structure, characterized in that the second heat dissipation member is composed of a material having a higher thermal conductivity than the first heat dissipation member.
In claim 1, A high-power semiconductor package having a heterogeneous material minimal heat dissipation structure, characterized in that the heat dissipation portion is a clad metal in which the first heat dissipation portion is composed of molybdenum (Mo) or tungsten (W) and the second heat dissipation portion is composed of copper (Cu).
In claim 1, The above-mentioned connecting port has a multi-stage stepped shape having the widest opening surface on the lower surface of the insulating substrate, or has a shape that becomes wider as it approaches the lower surface of the insulating substrate. A high-power semiconductor package having a heterogeneous material minimal heat dissipation structure, characterized in that the heat dissipation portion has a shape corresponding to the above-mentioned communication hole.
In claim 3, The above insulating substrate includes a plurality of insulating layers composed of ceramic material, and The above high-power semiconductor package further includes a fixing part for fixing the heat dissipation part to the insulating substrate, and A high-power semiconductor package having a heterogeneous material minimal heat dissipation structure, characterized in that the above-mentioned fixing portion includes a fixing metal pattern that is fixedly disposed between the plurality of insulating layers so as to be exposed to the above-mentioned communication opening and soldered to the heat dissipation portion.
In claim 4, A high-power semiconductor package having a heterogeneous material minimal heat dissipation structure, characterized in that the above circuit pattern further includes a surface mount pattern formed on the lower surface of the insulating substrate to enable connection with other external components.
In claim 1, A high-power semiconductor package having a heterogeneous material minimal heat dissipation structure, characterized in that the first semiconductor device is attached to the upper surface of the first heat dissipation portion by means of a silver sintering paste using silver-containing epoxy.
In claim 1, A high-power semiconductor package having a heterogeneous material minimal heat dissipation structure, characterized in that the first semiconductor device is a transmitting communication device that generates a lot of heat for transmission, and the second semiconductor device is a receiving communication device that does not generate heat when receiving.

Description

High-power semiconductor package with minimal heat dissipation structure using heterogeneous materials This invention relates to a high-power semiconductor package, and more specifically, to a high-power semiconductor package having a heterogeneous material minimal heat dissipation structure that can efficiently dissipate heat generated from a semiconductor device having high power density while enabling miniaturization and lightweighting by using heterogeneous materials. In semiconductor packaging, there are packages that require an internal space that is empty, vacuum-filled, or filled with a special gas atmosphere. This is primarily the case for packages used in special environments, such as space, or for various sensing semiconductor devices. In such cases, the most commonly used type of package is the ceramic package. Conventional ceramic packages are manufactured by stacking multiple green sheets to form a cavity-shaped package. When stacking each layer, via holes are processed, and a metal circuit is printed and patterned to form a circuit pattern (metal pattern). Then, the ceramic and the metal pattern are simultaneously sintered at a high temperature to form the package. However, these ceramic packages mainly use alumina as the package material, but since alumina has a thermal conductivity of about 30 W/mK, it is not very good, so it has the disadvantage of being difficult to use as a package for semiconductor devices that generate heat. Metal packages are used to overcome the thermal characteristics of ceramic packages as described above. A metal package is formed by processing a copper-based alloy (e.g., CuW) with excellent thermal conductivity to create a cavity, and then mounting a semiconductor device inside it. However, since the body of a metal package is composed of metal, which is an electrical conductor, it requires the cumbersome task of insulating the circuit lines from one another. Meanwhile, metal packages require a substrate with patterned circuits to provide electrical insulation for the area where semiconductor devices are mounted. However, since conventional PCBs have poor thermal conductivity, an Insulated Circuit Board (DBC) with printed circuits formed on high-performance ceramics is used. In this case, the ceramic DBC used is a high-performance insulating substrate with a thermal conductivity of 100 W/mK or higher, such as high-purity ceramic or alumina nitride (AlN) substrates, which are thin and have excellent thermal conductivity. Additionally, metal packages must form lead pins for electrical signal input and output with the outside; since the package body is constructed of metal, a separate insulation process is also required. While the metal package described above has the advantages of excellent thermal conductivity and airtightness, it has the disadvantages of being heavy and having very high material and processing costs. Additionally, metal packages are difficult to use as surface mounts like ceramic packages, and because most lead wires are implemented in a spread-arm style, they are often manufactured as butterfly or feedthrough packages. Meanwhile, with the recent rapid advancement of high speed, large capacity, and high integration of electronic devices, power devices applied to automobiles, industrial equipment, and home appliances must also achieve high power; consequently, high-power semiconductor packages that incorporate high-power semiconductors into semiconductor packages are becoming commonplace. Furthermore, high-power semiconductor packages are facing demands to achieve miniaturization and weight reduction. In particular, the trend toward miniaturization of high-power semiconductor packages is giving rise to problems related to heat generation due to high power density. This heat generation caused by high power density can degrade product quality and shorten product lifespan. Therefore, there is a need for technology capable of efficiently dissipating heat generated by semiconductor devices with high power density. FIG. 1 is a schematic perspective view illustrating the configuration relationship of a high-power semiconductor package having a heterogeneous material minimal heat dissipation structure according to one embodiment of the present invention, and Figure 2 is a schematic cross-sectional view taken along line AA with the components of the high-power semiconductor package shown in Figure 1 combined. The present invention will be described in more detail below with reference to the attached drawings. Prior to this, terms and words used in this specification and claims should not be interpreted as being limited to their ordinary or dictionary meanings. Instead, based on the principle that the inventor may appropriately define the concepts of terms to best describe their invention, they must be interpreted in a meaning and concept consistent with the technical spirit of the present invention. Furthermore, unless otherwise defined, technical and scie