KR-20260062444-A - HIGHLY RELIABLE MICRO-LIGHT EMITTING DIODE AND MANUFACTURING METHOD THEREOF
Abstract
The present invention provides a micro LED that provides high EQE efficiency while reducing size by depositing and forming a stress recovery passivation layer with particles having an energy of 50W to 3000W on the top or side of an etched mesa structure, thereby recovering crystal structure defects and stress relaxation within the active layer.
Inventors
- 곽준섭
- 김태경
Assignees
- 한국에너지공과대학교
Dates
- Publication Date
- 20260507
- Application Date
- 20241029
Claims (12)
- Substrate; A first semiconductor layer stacked on the upper surface of the above substrate; A first electrode pad formed on the upper part of the first semiconductor layer; An active layer stacked on top of the first semiconductor layer; A second semiconductor layer stacked on top of the above active layer; A second electrode pad formed on the second semiconductor layer; and A stress recovery passivation layer comprising, by means of the above second semiconductor layer and etching, a first passivation layer having a first energy deposited on a part of the upper surface and on the side surface of a mesa structure in which the active layer and the second semiconductor layer are stacked, thereby recovering the stress relaxation of the active layer caused by etching. Micro LED.
- In paragraph 1, The above stress recovery passivation layer is, Comprising one or more of SiO₂, Si x Ny , SiO x Ny , AlN, Al x Oy , ZnO, MgO, NiO, Sn x Oy , Ga x Oy , In x Oy , yttria-stabilized zirconia (YSZ), or GaO x Ny Micro LED.
- In paragraph 1, The particle having the first energy mentioned above is, A particle having an energy of 50W to 3000W generated by one or more of DC plasma, pulsed DC plasma, RF plasma, LF plasma, DC-RF plasma, ion beam eradiation, and electron beam eradiation Micro LED.
- In paragraph 1, The above stress recovery passivation layer is, A second passivation layer further comprising a second passivation layer deposited with particles having a second energy on top of the first passivation layer, Micro LED.
- In paragraph 4, The particle having the second energy mentioned above is, A particle having an energy of 50W to 3000W generated by one or more of DC plasma, pulsed DC plasma, RF plasma, LF plasma, DC-RF plasma, ion beam eradiation, and electron beam eradiation Micro LED.
- In paragraph 1, The third passivation layer further comprises a particle having the first energy deposited and formed on the side of the mesa structure in the lower part of the first passivation layer to recover stress relaxation of the active layer caused by etching. Micro LED.
- Substrate; A first semiconductor layer stacked on the upper surface of the above substrate; A first electrode pad formed on the upper part of the first semiconductor layer; An active layer stacked on top of the first semiconductor layer; A second semiconductor layer stacked on top of the above active layer; A second electrode pad formed on the second semiconductor layer; and By means of the second semiconductor layer and etching, the active layer and the second semiconductor layer are stacked to form a mesa structure, and The above mesa structure, Having the shape of a polygon with pentagons or more, or a circle, Micro LED
- Substrate; A first semiconductor layer stacked on the upper surface of the above substrate; A first electrode pad formed on the upper part of the first semiconductor layer; An active layer stacked on top of the first semiconductor layer; A second semiconductor layer stacked on top of the above active layer; A second electrode pad formed on the second semiconductor layer; and The structure comprises a passivation layer formed on a portion of the upper part and a side of the inverted mesa structure in which the active layer and the second semiconductor layer are stacked, and a portion of the upper part of the first semiconductor layer exposed by the above second semiconductor layer and etching, and The above inverted mesa structure is, A side formed to have a downward slope of 80 to 130 degrees with respect to the upper surface of the inverted mesa structure, Micro LED.
- A step of sequentially growing a first semiconductor layer, an active layer, and a second semiconductor layer on the upper surface of a substrate; A step of forming a mesa structure including the first semiconductor layer, the active layer, and the second semiconductor layer by etching; and The method includes the step of forming a stress recovery passivation layer on a portion of the upper part and the side and the exposed upper part of the first semiconductor layer of the mesa structure by applying a mask having a first electrode pad and a second electrode pad pattern. The step of forming the stress recovery passivation layer is a step of depositing and forming a first passivation layer using particles having a first energy to recover stress relaxation of the active layer by etching on a part of the upper surface and the side surface of the mesa structure. Micro LED manufacturing method,
- In Paragraph 9, The particle having the first energy in the step of forming the stress recovery passivation layer is, A particle having an energy of 50W to 3000W generated by one or more of DC plasma, pulsed DC plasma, RF plasma, LF plasma, DC-RF plasma, ion beam eradiation, and electron beam eradiation Micro LED manufacturing method,
- In Paragraph 9, The step of forming the stress recovery passivation layer described above After depositing the first passivation layer, the method further comprises the step of forming a second passivation layer on top of the first passivation layer using particles having an energy of 50W to 3000W. Micro LED manufacturing method
- In Paragraph 9, The step of forming the stress recovery passivation layer described above is: The method further comprises the step of depositing a third passivation layer on the side of the mesa structure prior to the formation of the first passivation layer to recover stress relaxation of the active layer by etching with particles having the first energy. Micro LED manufacturing method.
Description
Highly reliable micro-light emitting diode and manufacturing method thereof The present invention relates to a micro light-emitting diode, and more specifically, to a micro light-emitting diode that achieves high reliability characteristics by controlling stress on the side of a mesa etching or through lattice recrystallization, and a method for manufacturing the same. The biggest problem with micro-LEDs is that as the size decreases, light emission diminishes, leading to a sharp decline in external quantum efficiency and a rapid deterioration in reliability. This issue resulting from the shrinking size of micro-LEDs is reported to be primarily caused by dry etching damage during mesa etching or isotropic etching processes. Specifically, it has recently been revealed that this is due to strain relaxation issues occurring during mesa or isotropic etching processes. Figure 1 is a diagram showing micro-Raman mapping of the active region after performing mesa etching on a micro LED of size 60 x 60 μm². Figure 2 is a diagram showing micro-Raman mapping of the active region after performing mesa etching on a micro LED of size 40 x 40 μm². Figure 3 is a graph showing the change in EQE according to the reduction in size of the micro LED. Figure 4 is a graph showing the STEM image and X-ray diffraction analysis results of the active layer and the passivation layer, on which a passivation layer ( SiO2 ) was deposited by applying PECVD and the sputtering of the present invention after mesa etching. FIG. 5 is a partial cross-sectional view of a micro LED of the first embodiment of the present invention. FIG. 6 is a process diagram showing a method for manufacturing a micro LED that complements stress relaxation in the mesa region of the first embodiment of the present invention. FIG. 7 is a partial cross-sectional view of a micro LED of a second embodiment of the present invention. FIG. 8 is a process diagram illustrating a method for manufacturing a micro LED that complements stress relaxation in the mesa region of the second embodiment of the present invention. FIG. 9 is a partial cross-sectional view of a micro LED of the third embodiment of the present invention. FIG. 10 is a process diagram illustrating a method for manufacturing a micro LED that complements stress relaxation in the mesa region of the third embodiment of the present invention. FIG. 11 is a plan view of a stress relaxation prevention mesa structure of an embodiment of the present invention. FIG. 12 is a partial cross-sectional view of a micro LED having a stress relaxation prevention inverse mesa structure according to an embodiment of the present invention. FIG. 13 is a plan view of an inverted mesa structure that prevents stress relaxation according to an embodiment of the present invention. Figure 14 is a partial cross-sectional view and TEM image of a micro LED before and after the deposition of a passivation layer following mesa etching. Figure 15 is a graph showing the electrical characteristics of a micro LED to which a high-energy plasma power deposition method was applied. Figure 16 is a graph showing the external quantum efficiency (EQE) characteristics of a micro LED using a high-energy plasma power deposition method. Figure 17 is a graph showing the external quantum efficiency (EQE) characteristics of a micro LED using a high-energy plasma power deposition method. The terms used herein are for describing the embodiments and are not intended to limit the invention. In this specification, the singular form includes the plural form unless specifically stated otherwise in the text. As used herein, "comprises" and/or "comprising" do not exclude the presence or addition of one or more other components or steps mentioned in the description. As used herein, terms such as “examples,” “examples,” “aspects,” “examples,” etc., are not to be interpreted as implying that any described aspect or design is superior or more advantageous than other aspects or designs. Furthermore, the term 'or' refers to an inclusive or rather an exclusive or. That is, unless otherwise noted or is clear from the context, the expression 'x uses a or b' refers to any one of the natural inclusive permutations. Additionally, singular expressions (“a” or “an”) used in this specification and claims should generally be interpreted to mean “one or more” unless otherwise stated or it is clear from the context that they relate to the singular form. The terms used in the following description have been selected as common and universal in the relevant technical field, but other terms may exist depending on technological development and/or changes, conventions, preferences of the skilled technician, etc. Therefore, the terms used in the following description should not be understood as limiting the technical concept, but as illustrative terms to explain the embodiments. In addition, in specific cases, there are terms arbitrarily selected by the applicant, and in such cases, their det