KR-20260062826-A - Packaging Substrate

KR20260062826AKR 20260062826 AKR20260062826 AKR 20260062826AKR-20260062826-A

Abstract

An embodiment relates to a packaging substrate, comprising: a glass wafer (20); a plurality of vias (25) disposed on the glass wafer (20); a copper electrode (40) disposed on the vias (25) or on the surface of the glass wafer (20); and an insulating layer (30) covering the vias (25) or the copper electrode (40). The above packaging substrate (100) contains P and Zn in the leached impurities, and the content of the leached impurities is the analysis value obtained by adding 70 mol% nitric acid to the packaging substrate (100) and pre-treating the graphite block at 200 degrees Celsius for 16 hours to prepare an analysis solution, and analyzing the analysis solution using an ICP-MS instrument (Nexlon 2000 model manufactured by Perkin Elmer) according to the KS M 0025:2008 test method, and the content of P (based on mass) is 1,500 ppb or less, and the content of Zn (based on mass) is 500 ppb or less. The packaging substrate of the embodiment can provide a packaging substrate with improved thermal stability, electrical stability, electrical conductivity, etc., by having a low content of leached impurities or having a content ratio of a specific impurity among these impurities within a certain range.

Inventors

김성진
김진철

Assignees

앱솔릭스 인코포레이티드

Dates

Publication Date: 20260507
Application Date: 20250905
Priority Date: 20241029

Claims (10)

glass wafer, A plurality of vias disposed on the glass wafer; A copper electrode disposed on the via or the surface of the glass wafer; and A packaging substrate comprising an insulating layer surrounding the above via or the above copper electrode; and The above packaging substrate contains P and Zn in the elution impurities, and The content of the above-mentioned eluted impurities is the analytical value obtained by preparing an analytical solution by adding 70 mol% nitric acid to the packaging substrate and pre-treating it in a graphite block at 200 degrees Celsius for 16 hours, and analyzing the analytical solution using an ICP (inductively coupled plasma)-MS instrument (Nexlon 2000 model manufactured by Perkin Elmer) in accordance with the KS M 0025:2008 test method. The content of the above P (on a mass basis) is 1,500 ppb or less, and A packaging substrate having a Zn content (by mass) of 500 ppb or less.
In paragraph 1, A seed layer is further included under the copper electrode above, and The above seed layer comprises copper and titanium, and The above insulating layer comprises a polymer resin and inorganic particles, and The above inorganic particles include silica, A packaging substrate comprising any one selected from the group consisting of epoxy resin, acrylic resin, urethane resin, and combinations thereof.
In paragraph 1, The above packaging substrate is in the shape of a polyhedron overall, and A packaging substrate having a cut surface in which two or more faces of the above polyhedron are exposed.
In paragraph 1, The above glass wafer is a packaging substrate that is a borosilicate-based plate glass.
In paragraph 4, The above-mentioned leaching impurities further include Si and B, and A packaging substrate in which the ratio of the content of Si to the content of B (based on mass) is 1:5 to 7.
In paragraph 4, The analysis values of the above-mentioned leached impurities further include B intensity and F intensity, and A packaging substrate in which the intensity ratio of the F peak based on the B peak is 50 or less.
In paragraph 4, The above-mentioned elution impurities further include B and Ti, and A packaging substrate in which the ratio of the content of B to the content of Ti (based on mass) is 1:50 to 70.
In paragraph 1, The above-mentioned leaching impurities further contain Al, and A packaging substrate having an Al content (by mass) of 900 ppb or less.
In paragraph 1, The above-mentioned leaching impurities further include B, and A packaging substrate in which the ratio of the content of B (based on mass) to the content of Zn (based on mass) is 1:2 to 5.
In paragraph 6, A packaging substrate in which the ratio of the content of B (based on mass) to the content of P (based on mass) is 1:5 to 30.

Description

Packaging Substrate An exemplary embodiment relates to a packaging substrate, etc. In the manufacture of electronic components, the process of forming circuits on a semiconductor wafer is called the Front-End (FE) process, and the process of assembling the formed wafer so that it can be used in an actual product is called the Back-End (BE) process. The packaging process is included in the Back-End process. The four core technologies of the semiconductor industry that have enabled the rapid development of electronic products in recent years are semiconductor technology, semiconductor packaging technology, manufacturing process technology, and software technology. While semiconductor technology is evolving into various forms, such as sub-micron and nano-scale linewidths, over ten million cells, high-speed operation, and significant heat dissipation, the technology to perfectly package them is not yet sufficiently supporting this. Consequently, the electrical performance of semiconductors is sometimes determined by packaging technology and the resulting electrical connections rather than by the performance of the semiconductor technology itself. Ceramic or resin materials are used for packaging substrates. In the case of ceramic substrates, such as silicon substrates, it is difficult to mount high-performance, high-frequency semiconductor devices due to high resistance or dielectric constant. In the case of resin substrates, it is possible to mount relatively high-performance, high-frequency semiconductor devices. However, there are limitations in reducing the wiring pitch. Recently, glass substrates can be applied as substrates for high-end packaging. By forming through-holes in the glass substrate and applying conductive materials to these through-holes, the wiring length between the device and the motherboard can be shortened, and excellent electrical characteristics can be achieved. Related prior art includes Korean Publication No. 10-2023-0038664, etc. FIG. 1 is a conceptual diagram illustrating the structure of a packaging substrate according to one embodiment in cross-section. Hereinafter, embodiments are described in detail with reference to the attached drawings so that those skilled in the art can easily implement them. However, embodiments may be implemented in various different forms and are not limited to the embodiments described herein. Throughout the specification, similar parts are denoted by the same reference numerals. Throughout this specification, the term “combination thereof” included in the Markush-type expression means one or more mixtures or combinations selected from the group consisting of the components described in the Markush-type expression, and means including one or more selected from the group consisting of said components. Throughout this specification, terms such as “first,” “second,” or “A,” “B” are used to distinguish identical terms from one another. Additionally, singular expressions include plural expressions unless the context clearly indicates otherwise. In this specification, “~system” may mean that the compound contains a compound corresponding to “~” or a derivative of “~”. In this specification, the meaning that B is located on A means that B is located in direct contact with A or that B is located on A with another layer located between them, and is not interpreted as being limited to B being located in contact with the surface of A. In this specification, the meaning of being connected to B on A means that A and B are directly connected or connected through other components between A and B, and unless otherwise specifically stated, it is not interpreted as being limited to a direct connection between A and B. In this specification, singular expressions are interpreted to include singular or plural forms as interpreted in context unless otherwise specified. Packaging substrates serve to support semiconductor devices by arranging various materials, such as supports, electrodes, and insulators, in a predetermined shape. Additionally, they act as a medium connecting the semiconductor devices to the power supply and rectify the current delivered to the devices, thereby improving the stability of electronic equipment. Depending on the design, the position or thickness of the electrodes (including the form of vertical and horizontal electrodes) of the packaging substrate may be changed, but it has a basic form in which an electrically conductive pattern (electrode) is formed on a support substrate and an insulating layer is disposed thereon. Recently, packaging substrates are being designed with increasingly fine lines and integrated forms. To achieve this, while it is important to form electrodes precisely and accurately, managing impurities is also becoming more critical. For example, if a specific element placed in region A easily diffuses into region B and affects the function of region B, the performance of the packaging substrate may degrade. Therefore, the infl