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KR-20260062971-A - Display device and method of manufacturing the same, and electronic device

KR20260062971AKR 20260062971 AKR20260062971 AKR 20260062971AKR-20260062971-A

Abstract

A display device capable of suppressing the degradation of characteristics of a second transistor in the manufacturing process of a display device is provided. The display device comprises a circuit board having a plurality of light-emitting elements installed thereon. The circuit board has a first layer comprising a plurality of first transistors and a second layer bonded on the first layer comprising a plurality of second transistors, electrodes of a plurality of light-emitting elements, and a plurality of wirings. A plurality of second transistors are installed apart from the bonding surface between the first layer and the second layer. An electrode is installed on the side opposite to the bonding surface among the two sides of the second layer.

Inventors

  • 타무라 카즈히로

Assignees

  • 소니 세미컨덕터 솔루션즈 가부시키가이샤

Dates

Publication Date
20260507
Application Date
20240830
Priority Date
20230905

Claims (20)

  1. A circuit board having a plurality of light-emitting elements installed thereon, and The above circuit board is, A first layer comprising a plurality of first transistors, and A second layer bonded on the first layer, comprising a plurality of second transistors, electrodes of the plurality of light-emitting elements, and a plurality of wirings. having, A plurality of the above-mentioned second transistors are installed apart from the junction surface of the first layer and the second layer, and The electrode is installed on the side opposite to the bonding surface among the two sides of the second layer, Display device.
  2. In paragraph 1, A plurality of the above-mentioned second transistors are installed on at least one layer of the junction surface, Display device.
  3. In paragraph 1, The first transistor above is a metal oxide semiconductor field effect transistor (MOSFET), and The second transistor mentioned above is a thin-film transistor, Display device.
  4. In paragraph 3, The above thin film transistor is an oxide semiconductor thin film transistor, Display device.
  5. In paragraph 3, The gate electrode of the second transistor is installed in front of the thin film semiconductor layer of the second transistor when viewed from the opposite side of the second layer. Display device.
  6. In paragraph 5, Of the two sides of the above thin film semiconductor layer, the side that becomes the gate electrode side is flat. Display device.
  7. In paragraph 3, The gate electrode of the second transistor is installed behind the thin film semiconductor layer of the second transistor when viewed from the opposite side of the second layer, and The above second layer further includes a light-blocking layer, and The light-blocking layer is installed between a plurality of the second transistors and the electrodes, Display device.
  8. In paragraph 3, On the circuit board above, a plurality of pixel circuits are installed corresponding to each of a plurality of pixels, and At least some of the plurality of the pixel circuits comprises at least one first transistor and at least one second transistor, Display device.
  9. In paragraph 8, The first layer further includes a plurality of first bonding electrodes, and The second layer further includes a plurality of second bonding electrodes, and The first bonding electrode and the second bonding electrode are bonded at the bonding surface to form a bonding portion, and At least one junction is installed for each of the above pixels, Display device.
  10. In paragraph 1, On the circuit board above, a plurality of pixel circuits are installed corresponding to each of a plurality of pixels, and The pixel circuit included in a predetermined area of the display area comprises at least one first transistor and at least one second transistor. Display device.
  11. In paragraph 1, On the circuit board above, a plurality of pixel circuits are installed corresponding to each of a plurality of pixels, and A plurality of the above pixel circuits include a plurality of first pixel circuits included in a first area of the display area and a plurality of second pixel circuits included in a second area of the display area, and The first pixel circuit comprises at least two first transistors, and The second pixel circuit comprises at least one first transistor and at least one second transistor, and One first transistor included in the first pixel circuit and one second transistor included in the second pixel circuit have the same function and are connected to a common wiring. Display device.
  12. In paragraph 1, The circuit board further has a first insulating thin film installed between the first layer and the second layer, The first layer further includes a plurality of first bonding electrodes, and The second layer further includes a plurality of second bonding electrodes, and The first bonding electrode and the second bonding electrode are bonded at the bonding surface by breaking the first insulating thin film, Display device.
  13. In paragraph 1, One or both of the first layer and the second layer further include dummy wiring, The above dummy wiring is installed adjacent to the joint surface, Display device.
  14. In paragraph 1, The above first layer further includes a first dummy wiring, and The above second layer further includes a second dummy wiring, and The first dummy wiring and the second dummy wiring are installed adjacent to the joint surface, and The first dummy wiring and the second dummy wiring are joined together. Display device.
  15. In paragraph 1, The second layer comprises a second insulating thin film having barrier properties, and The second insulating thin film is installed between a plurality of the second transistors and the electrodes. Display device.
  16. In paragraph 1, The portion between the above electrode and the adjacent electrode is connected to the same plane to form a flat plane. Display device.
  17. An electronic device having a display device as described in paragraph 1.
  18. A process for forming a first layer including a plurality of first transistors, and A process of forming a second layer on a substrate comprising a plurality of second transistors, electrodes of a plurality of light-emitting elements, and a plurality of wirings, and A process of bonding the first layer and the second layer, and A process of removing the above substrate from the second layer Equipped with, The process of forming the second layer above is, A process of forming a third layer comprising electrodes of a plurality of the above-mentioned light-emitting elements on the substrate, and A process of forming a fourth layer including a plurality of the above-mentioned wirings on the third layer, and A process of forming the second layer by forming a fifth layer including a plurality of the second transistors on the fourth layer. including, Method of manufacturing a display device.
  19. In Paragraph 18, The first layer further includes a plurality of first bonding electrodes, and The second layer further includes a plurality of second bonding electrodes, and The process of forming the second layer further includes the process of forming a sixth layer comprising a plurality of the second bonding electrodes on the fifth layer, and In the above bonding process, the first bonding electrode and the second bonding electrode are bonded. Method of manufacturing a display device.
  20. In Paragraph 19, The process further includes forming an insulating thin film on at least one of the first layer and the second layer, and In the above bonding process, the first layer and the second layer are overlapped with the insulating thin film in between, and then crystal grain growth is caused in the constituent material of the first bonding electrode and the constituent material of the second bonding electrode by heat treatment, and the portion of the insulating thin film located between the first bonding electrode and the second bonding electrode is fractured, thereby bonding the first bonding electrode and the second bonding electrode. Method of manufacturing a display device.

Description

Display device and method of manufacturing the same, and electronic device The present disclosure relates to a display device, a method for manufacturing the same, and an electronic device. In the technical field of display devices, active research is being conducted not only on light-emitting elements but also on circuit boards (backplanes) for driving light-emitting elements. As a circuit board, it has been proposed to have a configuration in which a first layer including a plurality of first transistors and a second layer including a plurality of second transistors are stacked in sequence. For example, Patent Document 1 discloses a circuit board having a configuration in which a first device layer (first layer) including a plurality of first transistors and a second device layer (second layer) including a plurality of second transistors are stacked in sequence, wherein the first transistor has a semiconductor layer in a channel forming region and the second transistor has an oxide semiconductor layer in a channel forming region. FIG. 1 is a schematic diagram of a display device relating to a first embodiment of the present disclosure. Figure 2 is a diagram of a pixel circuit. FIG. 3 is a cross-sectional view of a display device according to a first embodiment of the present disclosure. Figure 4 is a cross-sectional view of a circuit board. FIGS. 5A and FIGS. 5B are cross-sectional views illustrating an example of a process for forming a first layer. FIGS. 6b, FIGS. 6B, and FIGS. 6c are cross-sectional views illustrating an example of a process for forming a second layer, respectively. FIGS. 7A, FIGS. 7B, and FIGS. 7C are cross-sectional views illustrating an example of a process for forming a second layer. FIGS. 8a and FIGS. 8b are cross-sectional views illustrating an example of a process for forming a second layer. FIGS. 9a and 9b are cross-sectional views illustrating an example of a bonding process between a first layer and a second layer. FIG. 10 is a schematic diagram of a display device relating to a second embodiment of the present disclosure. Figure 11 is a diagram of a pixel circuit. Figure 12 is a cross-sectional view of a circuit board. FIG. 13 is a cross-sectional view of a circuit board relating to a modified example. FIG. 14 is a cross-sectional view of a circuit board relating to a modified example. FIG. 15 is a cross-sectional view of a circuit board relating to a modified example. FIG. 16 is a cross-sectional view of a circuit board relating to a modified example. FIG. 17 is a cross-sectional view showing a modified example of a circuit board. FIG. 18 is a schematic diagram of the display area (pixel array). FIG. 19 is a cross-sectional view of a circuit board relating to a modified example. FIG. 20 is an enlarged cross-sectional view of the joint portion between the first layer and the second layer. FIG. 21 is a cross-sectional view of a circuit board relating to a modified example. FIG. 22 is a cross-sectional view of a circuit board relating to a modified example. FIG. 23a is a plan view of the dummy wiring of the first example. FIG. 23b is a plan view of the dummy wiring of the second example. FIG. 23c is a plan view of the dummy wiring of the third example. FIG. 24 is an enlarged cross-sectional view of the second transistor. FIG. 25 is an enlarged cross-sectional view of a circuit board relating to a modified example. FIG. 26 is an enlarged cross-sectional view of a circuit board relating to a modified example. FIGS. 27a, FIGS. 27b, FIGS. 27c, FIGS. 27d, and FIGS. 27E are cross-sectional views illustrating variations of the process for forming the second layer. FIG. 28 is an enlarged cross-sectional view of an electrode with respect to a modified example. FIGS. 29a and FIGS. 29b are cross-sectional views illustrating variations of the process for forming the second layer, respectively. FIGS. 30a, FIGS. 30b, and FIGS. 30c are conceptual diagrams for explaining the relationship between a normal (LN) passing through the center of the light-emitting part, a normal (LN') passing through the center of the lens member, and a normal (LN”) passing through the center of the wavelength selection part, respectively. FIG. 31 is a conceptual diagram for explaining the relationship between a normal (LN) passing through the center of the light-emitting part, a normal (LN') passing through the center of the lens member, and a normal (LN”) passing through the center of the wavelength selection part. FIGS. 32a and FIGS. 32b are conceptual diagrams for explaining the relationship between the normal (LN) passing through the center of the light-emitting part, the normal (LN') passing through the center of the lens member, and the normal (LN”) passing through the center of the wavelength selection part, respectively. FIG. 33 is a conceptual diagram for explaining the relationship between the normal (LN) passing through the center of the light-emitting part, the normal (LN') passing through the center of