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KR-20260063049-A - Micro VCSELs and Micro VCSEL Arrays with Maximized Heat Dissipation Characteristics

KR20260063049AKR 20260063049 AKR20260063049 AKR 20260063049AKR-20260063049-A

Abstract

A micro VCSEL and a micro VCSEL array with maximized thermal dissipation characteristics are disclosed. According to one aspect of the present embodiment, a micro VCSEL and a micro VCSEL array are provided, which improve efficiency by maximizing heat dissipation characteristics.

Inventors

  • 이건화
  • 최영희

Assignees

  • 한국광기술원

Dates

Publication Date
20260507
Application Date
20241030

Claims (15)

  1. A first reflector comprising a plurality of DBR (Distributed Bragg Reflector) pairs; A second reflector comprising a plurality of DBR pairs; A cavity layer located between the first reflection portion and the second reflection portion, wherein a hole generated in either the first reflection portion or the second reflection portion and an electron generated in the other one recombine; An oxide film layer positioned between the cavity layer and the first or second reflection part, determining the characteristics of the laser to be output and the diameter of the opening; A contact layer that contacts the second reflector and enables power to be supplied to the second reflector; A first metal layer that is implemented in direct contact with the above contact layer, and allows power to be supplied to the above contact layer while simultaneously being bonded to a substrate; A second metal layer that contacts the first reflector and enables power to be supplied to the first reflector; and A passivation layer that protects the first reflective portion, the second reflective portion, the cavity layer, the oxide film layer, the contact layer, and a portion of the second metal layer from the outside. A micro VCSEL chip characterized by including
  2. In paragraph 1, The above contact layer is, A micro VCSEL chip characterized by contacting the second reflector at the bottom of the second reflector with respect to the vertical direction.
  3. In paragraph 1, The first metal layer above is, A micro VCSEL chip characterized by enabling the micro VCSEL chip to be bonded to a substrate.
  4. In paragraph 1, The first metal layer above is, A micro VCSEL chip characterized by being implemented with pre-set components.
  5. In paragraph 4, The above-mentioned pre-set components are, Micro VCSEL chip characterized by being AuSn, PdIn, InSn, NiSn, AgSn, or AgIn.
  6. In paragraph 1, The above second metal layer is, A micro VCSEL chip characterized by being implemented in titanium (Ti), platinum (Pt), or gold (Au).
  7. Substrate; A first power line formed on a substrate; A second power line formed on a substrate at a predetermined distance from the first power line; A micro VCSEL chip of any one of claims 1 to 6 formed on the first power line above; and An interconnect that electrically connects the second power line and the micro VCSEL chip. A micro VCSEL array including
  8. A first reflector comprising a plurality of DBR (Distributed Bragg Reflector) pairs; A second reflector comprising a plurality of DBR pairs; A plurality of cavity layers located between the first reflection portion and the second reflection portion, wherein a hole generated in either the first reflection portion or the second reflection portion and an electron generated in the other one recombine; One or more tunnel junction layers formed between each cavity layer; One or more oxide film layers located between the cavity layer and the first reflection part or the second reflection part, determining the characteristics of the laser to be output and the diameter of the opening; A contact layer that contacts the second reflector and enables power to be supplied to the second reflector; A first metal layer that is implemented in direct contact with the above contact layer, and allows power to be supplied to the above contact layer while simultaneously being bonded to a substrate; A second metal layer that contacts the first reflector and enables power to be supplied to the first reflector; and A passivation layer that protects the first reflective portion, the second reflective portion, the cavity layer, the oxide film layer, the contact layer, and a portion of the second metal layer from the outside. A micro VCSEL chip characterized by including
  9. In paragraph 8, The above contact is, A micro VCSEL chip characterized by contacting the second reflector at the bottom of the second reflector with respect to the vertical direction.
  10. In paragraph 8, The first metal layer above is, A micro VCSEL chip characterized by enabling the micro VCSEL chip to be bonded to a substrate.
  11. In paragraph 8, The above second metal layer is, A micro VCSEL chip characterized by being formed on the upper part of the first reflection portion based on the vertical direction.
  12. In paragraph 8, The first metal layer above is, Micro VCSEL chip characterized by being bonded while exposed to a preset temperature.
  13. In Paragraph 12, The above-mentioned preset temperature is, A micro VCSEL chip characterized by a temperature within a preset error range based on 280℃.
  14. Substrate; A first power line formed on a substrate; A second power line formed on a substrate at a predetermined distance from the first power line; A micro VCSEL chip of any one of claims 8 to 13 formed on the first power line above; and An interconnect that electrically connects the second power line and the micro VCSEL chip. A micro VCSEL array including
  15. In a method for manufacturing a micro VCSEL array, A formation process in which a first power line and a second power line are formed on a substrate; A bonding process in which a micro VCSEL chip is bonded onto the first power line; and A second formation process in which an interconnect and a passivation layer are formed on the above micro VCSEL chip. A method for manufacturing a micro VCSEL array characterized by including

Description

Micro VCSELs and Micro VCSEL Arrays with Maximized Heat Dissipation Characteristics The present invention relates to a micro VCSEL and a micro VCSEL array with maximized heat dissipation characteristics. The content described in this section merely provides background information regarding an embodiment of the present invention and does not constitute prior art. Generally, semiconductor laser diodes include edge-emitting laser diodes (EELs, hereinafter abbreviated as 'EEL') and vertical cavity surface-emitting laser diodes (VCSELs, hereinafter abbreviated as 'VCSEL'). Since EELs have a resonant structure oriented parallel to the stacking plane of the device, they oscillate the laser beam in a direction parallel to the stacking plane, whereas VCSELs have a resonant structure oriented perpendicular to the stacking plane of the device, thereby oscillating the laser beam in a direction perpendicular to the stacking plane of the device. Compared to EELs, VCSELs have a shorter optical gain length, enabling low power consumption and high-density integration, which is advantageous for mass production. Additionally, VCSELs can generate a laser beam in a single longitudinal mode and can be tested on a wafer. Furthermore, because VCSELs are capable of high-speed modulation and can generate a circular beam, coupling with optical fibers is easy and two-dimensional planar arrays are possible. VCSELs have primarily been used as light sources within optical devices for optical communication, optical interconnects, and optical pickups. However, recently, the scope of VCSEL application has expanded to include light sources within image forming devices such as LiDAR, facial recognition, motion recognition, and Augmented Reality (AR) or Virtual Reality (VR) devices. As VCSELs are utilized in such diverse fields, there is a need to manufacture VCSEL chips or VCSEL arrays appropriately according to their specific applications. Typically, VCSEL arrays are manufactured by producing VCSEL chips through a separate process and transferring them to a substrate. In this process, adhesives have traditionally been used to transfer the VCSEL chips to the substrate; however, these adhesives act as a hindrance to the VCSEL chips' ability to dissipate heat through the substrate. Consequently, this leads to a degradation in the heat dissipation characteristics of the VCSEL chips and causes a decrease in the operating efficiency of the chips themselves. FIG. 1 is a cross-sectional view of a micro VCSEL array according to one embodiment of the present invention. FIG. 2 is a cross-sectional view of a micro VCSEL according to a first embodiment of the present invention. FIG. 3 is a cross-sectional view of a micro VCSEL according to a second embodiment of the present invention. FIG. 4 is a circuit diagram between a switch and a plurality of micro VCSELs according to one embodiment of the present invention. FIG. 5 is a circuit diagram between a switch and a plurality of micro VCSELs according to another embodiment of the present invention. FIGS. 6 to 8 are drawings illustrating the process of manufacturing a micro VCSEL array according to one embodiment of the present invention. Embodiments of the present invention are described below with reference to the attached drawings so that those skilled in the art can easily implement the invention. However, the present invention may be embodied in various different forms and is not limited to the embodiments described herein. Furthermore, in order to clearly explain the present invention in the drawings, parts unrelated to the explanation have been omitted, and similar parts throughout the specification are denoted by similar reference numerals. Throughout the specification, when a part is described as being "connected" to another part, this includes not only cases where they are "directly connected" but also cases where they are "electrically connected" with other elements interposed between them. Furthermore, when a part is described as "including" a component, this means that, unless specifically stated otherwise, it does not exclude other components but may include additional components, and it should be understood that this does not preclude the existence or addition of one or more other features, numbers, steps, actions, components, parts, or combinations thereof. The following examples are detailed descriptions to aid in understanding the present invention and are not intended to limit the scope of the present invention. Accordingly, inventions within the same scope that perform the same function as the present invention will also fall within the scope of the present invention. In addition, each component, process, procedure, or method included in each embodiment of the present invention may be shared within a scope that is not technically contradictory to one another. FIG. 1 is a cross-sectional view of a micro VCSEL array according to one embodiment of the present invention. Referring to FIG. 1,