KR-20260063082-A - ARTIFICIAL NEURAL NETWORK DEVICE AND METHOD FOR OPERATING THE SAME
Abstract
An artificial neural network device and a method of operating the same are provided. The artificial neural network device may include: a synapse element; an integrator that outputs a first voltage by integrating a current generated when an input pulse voltage is applied to the synapse element into a voltage; a ramp generator that generates a ramp signal based on the first voltage and a second voltage output from a digital-to-analog converter; and an output circuit that stores the output of the ramp generator and transmits the result of the output to the outside.
Inventors
- 양상혁
- 김현수
- 이병근
- 김도원
Assignees
- 현대자동차주식회사
- 기아 주식회사
- 광주과학기술원
Dates
- Publication Date
- 20260507
- Application Date
- 20241030
Claims (20)
- Synaptic element; An integrator that outputs a first voltage by integrating the current generated when an input pulse voltage is applied to the above synapse element into a voltage; A ramp generator that generates a ramp signal based on the first voltage and a second voltage output from a digital-to-analog converter; and Includes an output circuit that stores the output of a lamp generator and transmits the result of the output to the outside. Artificial neural network device.
- In paragraph 1, The above synapse element is, An artificial neural network device comprising a resistive random access memory (RRAM) cross-bar array structure.
- In paragraph 1, The above lamp generator is, An artificial neural network device that outputs both a ramp signal modified for an activation function and a ramp signal for implementing an analog-to-digital converter for learning.
- In paragraph 1, The above output circuit is an artificial neural network device comprising a counter and a serializer.
- In paragraph 1, The above lamp generator is, A comparator that outputs a pulse signal by comparing the first voltage and the second voltage; and An artificial neural network device comprising an asynchronous logic circuit that asynchronously generates the ramp signal using a pulse signal provided from the comparator.
- In paragraph 5, The above lamp generator is, A counter that outputs a digital signal increasing by 1 in binary using an asynchronous signal generated from the above asynchronous logic circuit; and An artificial neural network device further comprising a digital-to-analog converter that receives a digital signal representing the binary number of the above counter and converts it into an analog voltage signal.
- In paragraph 5, An artificial neural network device in which the output pulse signal of the above comparator is input to the counter of the above output circuit.
- In paragraph 1, An artificial neural network device in which the first voltage includes a fixed value and the second voltage includes a changing value.
- An integrator that outputs a first voltage by integrating the current generated when an input pulse voltage is applied to a synapse element into a voltage; A comparator that compares the first voltage above with a second voltage output from a digital-to-analog converter; A first counter that receives an inverted signal for a first signal of a first output node among two output nodes of the comparator, and calculates the number of comparisons corresponding to the case where the first voltage is greater than the second voltage relative to the total number of comparisons for the first voltage and the second voltage; and A serializer for serializing the output of the first counter above Artificial neural network device.
- In Paragraph 9, A first logic gate that performs an AND logic operation on the signals of the two output nodes of the above comparator and outputs a second signal; An asynchronous logic circuit that receives the second signal and generates a third signal, a fourth signal, and a fifth signal; and An artificial neural network device further comprising a second counter that generates a digital output changing the output voltage of the digital-to-analog converter.
- In Paragraph 10, An artificial neural network device in which the third signal, the fourth signal, and the fifth signal each sequentially operate the second counter, the digital-to-analog converter, and the comparator.
- In Paragraph 11, An artificial neural network device in which the third signal changes the digital output of the second counter, and the digital output of the second counter is input to the digital-to-analog converter to change the output voltage of the digital-to-analog converter.
- In Paragraph 11, An artificial neural network device in which the fourth signal is generated by a delay circuit at a later time than when the third signal is generated, and the rising edge of the fourth signal activates the digital-to-analog converter to change the second voltage.
- In Paragraph 11, An artificial neural network device in which the rising edge of the fifth signal occurs after the second voltage of the digital-to-analog converter has changed, and the rising edge of the fifth signal compares the first voltage and the second voltage.
- In Paragraph 14, An artificial neural network device in which the total number of comparisons between the first voltage and the second voltage is determined by the resolution of the analog-to-digital converter or the resolution of the activation function.
- In paragraph 15, An artificial neural network device that recognizes the number of comparisons by calculating the number of falling edges of the second signal using a third counter.
- In Paragraph 16, An artificial neural network device in which the operation of the comparator, the asynchronous logic circuit, and the digital-to-analog converter is stopped when the output of the third counter reaches a predetermined total number of comparisons.
- In Paragraph 10, The above asynchronous logic circuit is, A pulse signal generation circuit that generates a pulse signal according to a predefined activation signal; and It further includes a second logic gate that receives the output signal of the pulse signal generation circuit as a first input, receives the second signal as a second input, performs an OR logic operation, and outputs a sixth signal. The above-mentioned sixth signal is input to the first delay gate, and after a predetermined delay time, the seventh signal is output from the first delay gate, and An artificial neural network device in which the above-mentioned sixth signal is input to a second delay gate, and an eighth signal is output from the second delay gate after a predetermined delay time.
- In Paragraph 18, The above asynchronous logic circuit is, A first flip-flop that receives a third voltage through the D terminal, receives the sixth signal through the clock terminal, and outputs a ninth signal; A second flip-flop that receives the ninth signal through the D terminal, receives the seventh signal through the clock terminal, and outputs the tenth signal; and An artificial neural network device further comprising a fourth flip-flop that receives the 10th signal through the D terminal, receives the 8th signal through the clock terminal, and outputs the 5th signal.
- In Paragraph 19, The above asynchronous logic circuit is, A third logic gate that receives the ninth signal as a first input, receives the inverted signal of the tenth signal as a second input, performs an AND logic operation, and outputs the third signal; and An artificial neural network device further comprising a fourth logic gate that receives the above-mentioned 10th signal as a first input, receives the inverted signal of the above-mentioned 5th signal as a second input, performs an AND logic operation, and outputs the above-mentioned 4th signal.
Description
Artificial Neural Network Device and Method for Operating the Same The disclosed content relates to an artificial neural network device and a method of operation thereof, more specifically, to a device that implements an artificial neural network system mimicking the human brain in hardware and a method of operation thereof. An artificial neural network system may be composed of circuits that mimic a human neural network when performing 'learning' or 'reasoning' operations that require the processing of large-scale artificial intelligence data. Specifically, the artificial neural network system may include a synapse portion that stores and processes input signals, and a neuron circuit that receives analog signals generated at the synapse, converts them into a digital domain, and transmits them. Activation functions can be implemented digitally. However, this approach utilizes the output of an analog-to-digital converter, which can lead to high computational energy consumption and occupy a significant amount of integrated circuit space. To address this, methods using probabilistic neurons to implement activation functions without converters have emerged; however, probabilistic neurons have not resolved the trade-off between computational time and accuracy. In particular, they have limitations in that they cannot be applied to weight transfer-based training methods (ex-situ training), which require high-computational accuracy converters necessary for artificial neural networks. FIG. 1 is a drawing for explaining an artificial neural network device according to one embodiment. FIG. 2 is a drawing for explaining an artificial neural network device according to one embodiment. FIG. 3 is a drawing for explaining an artificial neural network device according to one embodiment. FIG. 4 is a diagram illustrating the operation of an artificial neural network device according to one embodiment. FIG. 5 is a drawing for explaining an artificial neural network device according to one embodiment. FIG. 6 is a drawing for explaining an artificial neural network device according to one embodiment. FIG. 7 is a drawing for explaining an artificial neural network device according to one embodiment. FIG. 8 is a drawing for explaining an artificial neural network device according to one embodiment. FIG. 9 is a diagram illustrating the operation method of an artificial neural network device according to one embodiment. FIGS. 10 and FIGS. 11 are drawings for illustrating an artificial neural network device according to one embodiment. Embodiments of the present invention are described below with reference to the attached drawings so that those skilled in the art can easily implement them. However, the present invention may be embodied in various different forms and is not limited to the embodiments described herein. Furthermore, in order to clearly explain the present invention in the drawings, parts unrelated to the explanation have been omitted, and similar parts throughout the specification are denoted by similar reference numerals. Throughout the specification and claims, when a part is described as "comprising" a certain component, this means that, unless specifically stated otherwise, it does not exclude other components but may include additional components. Terms including ordinal numbers, such as first, second, etc., may be used to describe various components, but said components are not limited by said terms. Such terms are used solely for the purpose of distinguishing one component from another. FIG. 1 is a drawing for explaining an artificial neural network device according to one embodiment. Referring to FIG. 1, an artificial neural network device (1) according to one embodiment may include a synaptic device (10), an integrator (20), a ramp generator (30), and an output circuit (40). The synapse device (10) may include a cross-bar array structure such as resistive random access memory (RRAM). The structure is such that vertical and horizontal lines intersect in a grid pattern, and an RRAM cell is located at each intersection point, and the RRAM cell may include a resistive material inserted between two electrodes. Depending on the voltage applied between the two electrodes, the RRAM cell may have a high resistance state and a low resistance state. A synapse may refer to a connection between neurons, and RRAM may be adopted as a synapse device to store and adjust weights during the learning and inference process of an artificial neural network. The integrator (20) can integrate the current generated when an input pulse voltage is applied to the synapse element (10) into a voltage. Specifically, the integrator (20) can generate an output signal corresponding to a voltage by integrating the current received as an input signal from the synapse element over time. To this end, the integrator (20) may include an operational amplifier (op-amp) for amplifying or processing the input signal with a predetermined gain. Additionally