KR-20260063092-A - Fabrication method of display panel using selective annealing techniques

Abstract

A method for manufacturing a display panel using a selective annealing process in one embodiment of the present invention is characterized by comprising: a step of providing a substrate for forming a pixel circuit of a display panel on a stage; a step of recognizing the location of an area to be formed of a driving TFT among the active matrix areas where the pixel circuit is located on the substrate in an alignment unit; and a step of crystallizing by irradiating a laser at the area to be formed of the driving TFT, where the location is recognized, in a laser irradiation device.

Inventors

• 문국철
• 한원희
• 백기현

Assignees

• 주식회사 에이피에스

Dates

Publication Date

20260507

Application Date

20241030

Claims (8)

1. In a method for manufacturing a display panel, A step of providing a substrate for forming a thin film transistor (TFT) pixel circuit of a display panel on a stage; A step of recognizing the location of an area where a driving TFT is to be formed among the active matrix areas where a pixel circuit is located on the substrate in an alignment unit; and A method for manufacturing a display panel using a selective annealing process, comprising the step of crystallizing by irradiating a laser at a region where a driving TFT is to be formed, the position of which is recognized in the laser irradiation device.
2. In paragraph 1, In the step of recognizing the above location, A method for manufacturing a display panel using a selective annealing process, characterized by recognizing a key on the substrate provided above, calculating the location of the area where the driving TFT is to be formed, and providing the location where the driving TFT is to be formed to the laser irradiation device.
3. In paragraph 1, A method for manufacturing a display panel using a selective annealing process, characterized in that the pixel circuit is composed of 7 TFTs as an LTPO circuit, and includes one LTPS TFT (low-temperature polycrystalline silicon transistor: T1) and 6 oxide TFTs (oxide transistors: T2 to T7).
4. In paragraph 3, A method for manufacturing a display panel using a selective annealing process, characterized in that the above LTPS TFT is an NMOS driving TFT.
5. In paragraph 1, In the step of crystallizing by irradiating the above laser, A method for manufacturing a display panel using a selective annealing process, characterized by using a spot beam and selectively performing laser annealing when the laser irradiates the area where the driving TFT is to be formed.
6. In paragraph 1, In the step of crystallizing by irradiating the above laser, A method for manufacturing a display panel using a selective annealing process, characterized by using a line beam when the laser irradiates the area where the driving TFT is to be formed and selectively performing laser annealing.
7. In paragraph 1, In the step of crystallizing by irradiating the above laser, A method for manufacturing a display panel using a selective annealing process, characterized by controlling the movement speed of a stage on which the substrate is placed so that it moves slower than a preset reference speed in a selected area where laser irradiation is performed.
8. In paragraph 6, A method for manufacturing a display panel using a selective annealing process, characterized by adjusting the movement speed of a stage on which the substrate is placed so that it moves faster than a preset reference speed in a non-selected area.

Description

Fabrication method of display panel using selective annealing techniques The present invention relates to a method for manufacturing a display panel using a selective annealing process, and more particularly to a method for manufacturing a display panel using a selective annealing process that can reduce process costs and reduce driving power by selectively forming a predetermined LTPS TFT without an additional process when forming an LTPS TFT in an LTPO driving circuit. Flat panel displays (FPDs) are employed in various electronic devices such as mobile phones, tablets, laptop computers, as well as televisions and monitors. Examples of FPDs include liquid crystal displays (LCDs), plasma display panels (PDPs), organic light emitting diode (OLEDs), and electrophoretic displays (EPDs). The pixels of FPDs are arranged in a matrix form and controlled by an array of pixel circuits. Some of the driving circuits that provide signals to control the array of pixel circuits are implemented using TFTs on the same substrate as the array of pixel circuits. The substrate on which the pixel circuits and driving circuits are formed is referred to as the TFT backplane. The TFT backplane is a key component of an FPD, functioning as a series of switches to control the current flowing to each individual pixel. Until recently, there were two main TFT backplane technologies: one using TFTs with an amorphous silicon (a-Si) active layer, and another using TFTs with a polycrystalline silicon (poly-Si) active layer. Generally, fabricating a TFT backplane using amorphous silicon TFTs is cheaper and easier than forming one using other types of TFTs. However, a-Si TFTs have low carrier mobility, making it difficult to form high-speed backplanes using a-Si TFTs for displays. To improve the mobility of a-Si TFTs, a-Si is heat-treated using a laser beam that anneales the Si layer to form a poly-Si active layer. The material from this process is generally referred to as low-temperature poly-Si, or LTPS (low-temperature poly-Si). The carrier mobility of LTPS TFTs is 100 times higher (>100 cm2/V·s) than that of a-Si TFTs. Even with a small profile, LTPS TFTs offer excellent carrier mobility and may therefore be an ideal choice for fabricating high-speed circuits within a limited space. However, despite the aforementioned advantages, initial threshold voltages may vary among LTPS TFTs within the backplane due to grain boundaries in the poly-Si semiconductor layer. Therefore, although LTPS circuits have been mainly used in AMOLED displays recently, LTPO is gaining attention as power consumption has become important. Although LTPO is attracting attention, general TFTs, which are not ideal TFTs, cannot satisfy all characteristics, so different types of TFTs are used depending on the role. Figure 1 is a diagram showing an example of the hysteresis characteristics of a generally ideal TFT (transistor). As shown in Figure 1, having the hysteresis characteristics of an ideal TFT means that the circuit operates with low leakage current, low-refresh-rate driving, large subthreshold swing, uniformity of low gray level, and an enhancement mode (VT > 0V) with a threshold voltage greater than 0. Therefore, to implement the ideal TFT of Fig. 1, an LTPO substrate is mainly used for the backplane of an AMOLED display. LTPO (Low-Temperature Polycrystalline Oxide) technology combines the advantages of LTPS (Low-Temperature Polycrystalline Silicon) and Oxide TFT (Oxide Thin Film Transistor), which can improve power efficiency and optimize the driving speed and resolution of the display. These LTPO substrates can efficiently regulate power in display environments requiring various driving speeds. In particular, they can dynamically adjust the screen refresh rate, allowing for rapid switching when a high refresh rate is required and maintaining a low refresh rate during static screens to save power. Therefore, LTPO is receiving high interest as it extends the battery life of mobile devices such as smartphones and smartwatches through dynamic refresh rate control based on the screen and high power efficiency. However, LTPO has the disadvantage of increasing process costs because it requires additional processing steps from LTPS. FIG. 1 is a diagram showing the hysteresis characteristics of a generally ideal TFT (transistor). FIG. 2 is a flowchart of a method for manufacturing a display panel using a selective annealing process according to an embodiment of the present invention. FIG. 3 is an LTPO pixel circuit diagram of the present invention. FIG. 4 is a diagram showing the hysteresis characteristics of the LTPS-driven TFT and oxide TFT of the present invention. FIG. 5 is a schematic diagram illustrating the region crystallized by the selective annealing process of the present invention. FIG. 6 is a diagram illustrating an example of irradiating a spot beam laser in the selective annealing process of the present invention. FIG. 7 is a diagram illustrating an exam