KR-20260064051-A - DISPLAY DEVICE

Abstract

The present specification relates to a display device capable of minimizing a threshold voltage deviation of a thin-film transistor according to position in a display area by utilizing a hydrogen degassing path. A display device according to one embodiment includes a display area and a display panel including first and second bezel areas, a gate driving circuit disposed in at least one of the first and second bezel areas and driving gate lines, and dummy holes disposed in the display area and at least one of the first and second bezel areas, wherein each of the gate lines includes a start end connected to the gate driving circuit in either the first and second bezel areas and an end end located in the other of the first and second bezel areas, and the dummy holes may have a density difference depending on the distance from the end end of each gate line.

Inventors

• 이정현
• 정찬용

Assignees

• 엘지디스플레이 주식회사

Dates

Publication Date

20260507

Application Date

20241031

Claims (20)

1. A display panel comprising a display area in which gate lines, data lines, and thin-film transistors are arranged, and first and second bezel areas located around the display area; A gate driving circuit disposed in at least one of the first and second bezel regions and driving the gate lines; It includes dummy holes disposed in at least one of the display area and the first and second bezel areas, and Each of the above gate lines includes a starting end connected to the gate driving circuit in either of the first and second bezel regions, and an end end located in the other of the first and second bezel regions. A display device in which the dummy holes have a density difference depending on the distance from the end of each gate line.
2. In claim 1, A display device further comprising dummy electrodes disposed in each of the above dummy holes.
3. In claim 1, The closer the distance to the end of each of the above gate lines, the higher the density of the above dummy holes, and A display device in which the density of the dummy holes is lower the closer the distance to the starting end of each gate line.
4. In claim 1, The above gate driving circuit is It is disposed in the first bezel area and connected to the starting end of each of the gate lines in the first bezel area, Each end of the above gate lines is a display device placed in the second bezel area.
5. In claim 1, The above gate driving circuit is A first gate driving circuit disposed in the first bezel region and connected to the starting end of each of the odd-numbered gate lines among the gate lines in the first bezel region; and It includes a second gate driving circuit disposed in the second bezel region and connected to the starting end of each of the even-numbered gate lines among the gate lines in the second bezel region, The end of each of the odd-numbered gate lines is positioned in the second bezel area, and The end of each of the above even-numbered gate lines is a display device positioned in the above first bezel area.
6. In claim 2, The above dummy holes A first type dummy hole superimposed on the end of each of the above gate lines, Second type dummy holes superimposed on each of the above gate lines, and A display device comprising at least one type of dummy hole among the third type dummy holes overlapped on each of the above data lines.
7. In claim 6, The above dummy electrodes A first dummy electrode placed in the first type dummy hole above, A second dummy electrode placed in the second type dummy hole, and A display device comprising at least one of the third dummy electrodes disposed in the third type dummy hole.
8. In claim 6, A display device in which each of the first type dummy hole and the second type dummy hole is disposed by penetrating a plurality of insulating layers stacked on each gate line.
9. In claim 7, A display device in which each of the first dummy electrode and the second dummy electrode is disposed on the uppermost insulating layer among a plurality of insulating layers stacked on each gate line and contacts the gate line through each of the first type dummy hole and the second type dummy hole.
10. In claim 6, The above-mentioned third type dummy hole is a display device disposed by penetrating a plurality of insulating layers stacked on each of the data lines.
11. In claim 7, A display device in which the third dummy electrode is disposed on the uppermost insulating layer among a plurality of insulating layers stacked on each data line and contacts the data line through the third type dummy hole.
12. In claim 7, The above dummy electrodes A display device having the same transparent conductive layer placed on the same layer as the pixel electrode connected to the above-mentioned thin-film transistor.
13. In claim 6, A display device further comprising fourth type dummy holes disposed between the end of each gate line and the gate driving circuit in at least one of the first and second bezel regions.
14. In claim 13, A fourth dummy electrode placed in the above-mentioned fourth type dummy hole, and A display device further comprising at least one fifth dummy electrode disposed below the above-mentioned fourth type dummy hole.
15. In claim 14, The above-mentioned fourth type dummy hole is disposed by penetrating a plurality of insulating layers stacked on the above-mentioned at least one fifth dummy electrode, and A display device in which the fourth dummy electrode is disposed on the uppermost insulating layer among the plurality of insulating layers and contacts the at least one fifth dummy electrode through the fourth type dummy hole.
16. In claim 14, The above-mentioned fourth dummy electrode is disposed on the same transparent conductive layer as the pixel electrode connected to the above-mentioned thin-film transistor, and A display device in which at least one fifth dummy electrode is disposed in the same metal layer as at least one electrode of the thin-film transistor.
17. In claim 16, The above thin-film transistor Light-blocking electrode disposed on a substrate, An active layer overlapped with the light-blocking electrode and the buffer layer between them, A gate electrode disposed between the above active layer and the gate insulating layer, It includes first and second source/drain electrodes respectively connected to the first and second connection regions of the active layer through the first and second contact holes of the interlayer insulating layer covering the gate insulating layer and the gate electrode, respectively. The above at least one fifth dummy electrode is A display device comprising at least one metal layer among a light-shielding metal layer identical to the light-shielding electrode, a gate metal layer identical to the gate electrode, and a source/drain metal layer identical to the first and second source/drain electrodes.
18. In claim 16, The above thin-film transistor Light-blocking electrode disposed on a substrate, An active layer overlapped with the light-blocking electrode and the buffer layer between them, A gate electrode disposed between the above active layer and the gate insulating layer, It includes first and second source/drain electrodes respectively connected to the first and second connection regions of the active layer through the first and second contact holes of the gate insulating layer, respectively, and The above at least one fifth dummy electrode is A display device comprising at least one metal layer among a light-shielding metal layer identical to the light-shielding electrode, a gate metal layer identical to the gate electrode, and a source/drain metal layer identical to the first and second source/drain electrodes.
19. In either claim 17 or claim 18, The above at least one fifth dummy electrode is, A display device comprising a hydrogen capture metal material included in at least one of the light-blocking metal layer, the gate metal layer, and the source/drain metal layer.
20. In claim 1, First passivation holes provided in the upper passivation layer in the above display area; and A display device further comprising at least one of a second passivation hole provided in the upper passivation layer located between the end of each gate line and the gate driving circuit in at least one of the first and second bezel regions.

Description

Display Device This specification relates to a display device having a hydrogen degassing path. The display device includes a thin film transistor as a switching element or driving element. Oxide semiconductor thin-film transistors, which utilize oxide semiconductor materials as the active layer in display devices, are widely used. Oxide semiconductor thin-film transistors have the advantages of higher mobility than amorphous silicon thin-film transistors, lower manufacturing costs than polycrystalline silicon thin-film transistors, and smaller off-current. Oxide semiconductor thin-film transistors are significantly affected by hydrogen flowing into the active layer, which can alter electrical characteristics such as threshold voltage. In a display device, due to the structural difference between the starting end of the gate line, which contacts the gate driving circuit in one bezel area, and the ending end, which does not contact the gate driving circuit in the other bezel area, the amount of hydrogen flowing into the gate line may increase from the starting end toward the ending end. Accordingly, the threshold voltage of the thin-film transistor in the display device may shift in the negative direction as the amount of hydrogen inflow increases closer to the end of the gate line compared to the start. The display device may experience a deviation in the threshold voltage of the thin-film transistor due to the difference in the amount of hydrogen inflow depending on the distance from the end of the gate line. FIG. 1 is a block diagram schematically illustrating the configuration of a display device according to one embodiment of the present specification. FIG. 2 is a diagram illustrating a single feeding driving method of a display device according to an embodiment of the present specification. FIG. 3 is a diagram illustrating an interlacing driving method of a display device according to one embodiment of the present specification. Figure 4 is a graph showing the threshold voltage deviation of a thin-film transistor according to the distance between the start and end of the gate line in a display device according to a comparative example. Figures 5a and 5b are graphs showing the voltage-current characteristic deviation of thin-film transistors adjacent to the start and end of the gate line in a display device according to a comparative example. FIG. 6 is a plan view illustrating a portion of the display area of a display device according to one embodiment of the present specification that is adjacent to the end of the gate line. FIG. 7 is a cross-sectional view illustrating a thin-film transistor structure along the line I-I' shown in FIG. 6. FIGS. 8a and 8b are cross-sectional views illustrating a dummy hole structure along the II-II' and III-III' lines shown in FIG. 6. FIGS. 9a to 9f are cross-sectional views illustrating a dummy hole structure along the line IV-IV' shown in FIG. 6. FIG. 10 is a graph showing the hydrogen formation energy by material used in a display device according to one embodiment of the present specification. FIG. 11 is a diagram illustrating a hydrogen diffusion path of a thin-film transistor in a display device according to one embodiment of the present specification. FIG. 12 is a diagram illustrating a hydrogen degassing path of a thin-film transistor according to one embodiment of the present specification. FIG. 13 is a plan view illustrating a portion of the display area of a display device according to one embodiment of the present specification that is adjacent to the gate line end. FIGS. 14a to 14f are cross-sectional views illustrating a passivation hole structure along the lines V-V', VI-VI', VII-VII', and VIII-VIII' shown in FIG. 13. FIGS. 15a and FIGS. 15b are a plan view and a cross-sectional view illustrating a thin-film transistor structure in a gate driving circuit of a display device according to one embodiment of the present specification. FIG. 16 is a plan view illustrating a portion of the display area of a display device according to one embodiment of the present specification that is adjacent to the gate line end. FIGS. 17a to 17c are cross-sectional views illustrating a dummy hole structure along the line IX-IX' and a passivation hole structure along the line X-X' shown in FIG. 16. FIG. 18 is a drawing illustrating a differential application structure of dummy hole density in a display device according to one embodiment of the present specification. FIGS. 19a to 19c are plan views illustrating parts of each of the first to third regions shown in FIG. 18. FIGS. 20a to 20c are graphs showing the voltage-current characteristics of a thin-film transistor in a display device according to one embodiment of the present specification. FIGS. 21a and FIGS. 21b are graphs showing the voltage-current characteristics of a thin-film transistor in a display device according to one embodiment of the present specification. The advantages and features of this specification an