KR-20260064176-A - SUBSTRATE, SEMICONDUCTOR PACKAGE INCLUDING THE SUBSTRATE AND MANUFACTURING METHOD FOR THE SUBSTRATE

KR20260064176AKR 20260064176 AKR20260064176 AKR 20260064176AKR-20260064176-A

Abstract

The present disclosure provides, as one embodiment, a substrate having a front and a rear surface that are opposite to each other and a first through-hole penetrating between the front and the rear surface; a wiring structure disposed on the front surface of the base substrate; one or more insulating films disposed on the rear surface of the base substrate and having a second through-hole extending from the first through-hole; a through-via that fills the first through-hole and is connected to the wiring structure and further fills a portion of the second through-hole; and a conductive pad that fills the remaining portion of the second through-hole and is connected to the through-via and extends onto one surface of the insulating film; wherein the surface of the through-via facing the conductive pad is recessed from one surface of the insulating film by 700 nm to 1100 nm.

Inventors

이원구
김용재
김현재
박지홍
유승관

Assignees

삼성전자주식회사

Dates

Publication Date: 20260507
Application Date: 20241031

Claims (10)

A base substrate having a front and a rear surface opposite each other and a first penetration portion penetrating between the front and the rear surface; A wiring structure disposed on the front surface of the above-mentioned base material; One or more insulating films disposed on the rear surface of the base substrate and having a second through-hole extending from the first through-hole; A through-via that fills the first through-hole and is connected to the wiring structure, and further fills a portion of the second through-hole; and A conductive pad that fills the remaining portion of the second penetration and is connected to the penetration via, and extends onto one surface of the insulating film; comprising One surface of the above-mentioned through-via facing the above-mentioned conductive pad is recessed by 700 nm to 1100 nm from one surface of the above-mentioned insulating film, Substrate.
In Article 1, The conductive pad comprises a first metal layer extending along one side of the insulating film, the wall of the second penetration portion, and one side of the penetration via, and a second metal layer disposed on the first metal layer. The region disposed on one side of the insulating film of the first metal layer and the region disposed on one side of the through via have a step difference. Substrate.
In Article 2, The thickness of the first metal layer on one side of the insulating film and the thickness on one side of the through via are 200 nm to 300 nm. Substrate.
In Article 1, The above insulating film comprises a first insulating film and a second insulating film disposed on the first insulating film, Substrate.
In Paragraph 4, The first insulating film comprises silicon oxide, and the second insulating film comprises silicon nitride, Substrate.
Substrate; and A plurality of semiconductor chips arranged side by side on the above substrate; comprising, The above substrate is, A base substrate having a front and a rear surface opposite each other and a first penetration portion penetrating between the front and the rear surface; A wiring structure disposed on the front surface of the above-mentioned base material; An insulating film disposed on the rear surface of the above-mentioned base material and having a second through-hole extending from the first through-hole; A through-via that fills the first through-hole and is connected to the wiring structure, and further fills a portion of the second through-hole; and A conductive pad that fills the remaining portion of the second penetration and is connected to the penetration via, and extends onto one surface of the insulating film; comprising One surface of the above-mentioned through-via facing the above-mentioned conductive pad is recessed 700 nm to 1100 nm from one surface of the above-mentioned insulating film, Semiconductor package.
A step of forming a through via that extends from the front of the base substrate toward a first rear side and is embedded in the base substrate; A step of removing the first rear surface of the base substrate to form a second rear surface and protruding the through via onto the second rear surface of the base substrate; A step of forming one or more insulating films on the second rear surface of the base substrate and on the region of the through via protruding onto the base substrate; A step of removing a portion of the insulating film and the through-via to expose the through-via; A step of further removing a portion of the through-via to cause one side of the through-via to be recessed from one side of the insulating film by 700 nm to 1100 nm; and A step comprising: forming a conductive pad on the through-via so as to extend onto one surface of the insulating film; Substrate manufacturing method.
In Article 7, In the step of recessing the through-via from one side of the insulating film, a portion of the through-via is removed by dry etching, Substrate manufacturing method.
In Article 7, The step of forming the conductive pad comprises: forming the first metal layer so as to extend along the surface of the insulating film and the surface of the through via; forming a photoresist film on the first metal layer; exposing and developing the photoresist film to form an open region; filling the open region of the photoresist film with the second metal layer; removing the photoresist film; and removing the region of the first metal layer that is not covered by the second metal layer. Substrate manufacturing method.
In Article 7, The step of forming one or more insulating films includes the step of forming a first insulating film, the step of forming a second insulating film on the first insulating film, and the step of forming a third insulating film on the second insulating film. The third insulating film is removed in the step of exposing the through-via, Substrate manufacturing method.

Description

Substrate, semiconductor package including the substrate and method for manufacturing the substrate The invention relates to a substrate, a semiconductor package including the substrate, and a method for manufacturing the substrate. In the semiconductor packaging industry, a 2.5D package structure is known in which multiple semiconductor chips are placed on an interposer substrate (e.g., a silicon interposer substrate) and then mounted on a printed circuit board. The interposer substrate connects the semiconductor chips to each other and acts as an intermediate substrate between the semiconductor chips and the printed circuit board, enabling high-speed signal transmission and high integration between the semiconductor chips. FIG. 1 is a cross-sectional view of a substrate according to one embodiment. Figure 2 is an enlarged view of area A of Figure 1. FIG. 3 is a cross-sectional view of a semiconductor package according to one embodiment. FIGS. 4 to 15 are manufacturing process diagrams of a substrate according to one embodiment. Hereinafter, various embodiments of the present disclosure are described in detail with reference to the attached drawings so that those skilled in the art can easily implement them. The present disclosure may be embodied in various different forms and is not limited to the embodiments described herein. To clearly explain the present disclosure, parts unrelated to the description have been omitted, and the same reference numerals are used for identical or similar components throughout the specification. Furthermore, the size and thickness of each component shown in the drawings are depicted arbitrarily for convenience of explanation, and thus the present disclosure is not necessarily limited to what is illustrated. Thicknesses have been enlarged in the drawings to clearly represent various layers and regions. Additionally, in the drawings, the thickness of some layers and regions has been exaggerated for convenience of explanation. Throughout the specification, when a part is described as being "connected" to another part, this includes not only cases where they are "directly connected," but also cases where they are "indirectly connected" with other members in between. In a similar vein, this includes not only cases where they are "physically connected," but also cases where they are "electrically connected." Furthermore, when it is said that a part, such as a layer, membrane, region, or plate, is "on" or "on" another part, this includes not only the case where it is "directly above" the other part, but also the case where there is another part in between. Conversely, when it is said that a part is "directly above" another part, it means that there is no other part in between. Also, saying that a part is "on" or "on" a reference part means that it is located above or below the reference part, and does not necessarily mean that it is located "on" or "on" in the direction opposite to gravity. Furthermore, throughout the specification, when a part is described as "including" a certain component, this means that, unless specifically stated otherwise, it does not exclude other components but may include additional components. Additionally, throughout the specification, "planar" means when the subject part is viewed from above, and "cross-sectional" means when the cross-section obtained by vertically cutting the subject part is viewed from the side. Furthermore, throughout the specification, numbers such as "first," "second," etc., are used to distinguish a component from other components that are identical or similar, and are not intended to specifically refer to a particular component. Accordingly, a component referred to as the first component in a specific part of this specification may be referred to as the second component in another part of this specification. Additionally, throughout the specification, a singular reference to any component includes a plural reference to such component unless specifically stated otherwise. Additionally, throughout the specification, references to one side and the other side are intended to distinguish between different sides and are not intended to be limited to a specific side. Accordingly, a side referred to as one side in a specific part of the specification may be referred to as the other side in another part of the specification. In addition, throughout the specification, references to directions such as top surface, upper side, upper, lower side, lower, etc., are provided to aid explanation and understanding based on the drawings. Hereinafter, a substrate of the present disclosure, a semiconductor package including a substrate, and a method for manufacturing a substrate will be described with reference to the drawings. FIG. 1 is a cross-sectional view of a substrate according to one embodiment. Figure 2 is an enlarged view of area A of Figure 1. The substrate (100) may include a base substrate (110), a wiring structure (120), a first protec