KR-20260064591-A - SEMICONDUCTOR ADHESIVE FILM COMPRISING A POLYURETHANE-BASED COMPOUND

Abstract

The present invention provides a semiconductor adhesive film having a base layer comprising a polyester-based compound, a conductive layer comprising a conductive polymer compound, and an adhesive layer comprising a polyurethane-based compound sequentially laminated.

Inventors

• 이지문
• 이규완
• 이창우
• 이정훈
• 장영훈
• 양승영

Assignees

• 율촌화학 주식회사

Dates

Publication Date

20260507

Application Date

20251028

Priority Date

20241030

Claims (12)

1. A base layer containing a polyester compound, A conductive layer comprising a conductive polymer compound and A semiconductor adhesive film having sequentially laminated adhesive layers containing a polyurethane-based compound.
2. In claim 1, A semiconductor adhesive film having an antistatic function, wherein the above polyester compound comprises one or more selected from the group consisting of polyethylene terephthalate (PET), polybutylene terephthalate (PBT), polytrimethylene terephthalate (PTT), polycyclohexylene dimethylene terephthalate (PCDT), and polycaprolactone (PCL).
3. In claim 1, A semiconductor adhesive film having an antistatic function, wherein the conductive polymer compound comprises one or more selected from the group consisting of poly(3,4-ethylenedioxythiophene): polystyrenesulfonic acid (PEDOT:PSS), polyaniline (PANI), polypyrrole (PPy), polythiophene (PT), poly(3-hexylthiophene) (P3HT), and poly(paraphenylene vinylene) (PPV).
4. In claim 3, The above conductive polymer compound is poly(3,4-ethylenedioxythiophene):polystyrenesulfonic acid (PEDOT:PSS), and A semiconductor adhesive film having an antistatic function, wherein the molar ratio of the above PEDOT to PSS is 1.5 to 2.3:1.
5. In claim 3, A semiconductor adhesive film having an antistatic function, wherein the conductive layer further comprises a cyclic amine-based compound.
6. In claim 5, A semiconductor adhesive film having an antistatic function, wherein the above-mentioned cyclic amine compound comprises one or more selected from the group consisting of aziridine, azetidine, pyrrolidine, piperidine, azepane, and azocane.
7. In claim 1, A semiconductor adhesive film in which the adhesive layer is formed from a polyurethane-based pressure-sensitive adhesive composition, and the polyurethane-based pressure-sensitive adhesive composition comprises a polyol-based compound, an isocyanate-based compound, a solvent, and a plasticizer.
8. In claim 7, The above polyol-based compound is a polyester polyol, and the semiconductor adhesive film.
9. In claim 8, A semiconductor adhesive film in which the main framework of the above polyester polyol is derived from terephthalic acid.
10. In claim 7, The above polyurethane-based pressure-sensitive adhesive composition is Based on 80 to 150 parts by weight of a polyol-based compound, 2 to 10 parts by weight of an isocyanate compound, 15 to 80 parts by weight of solvent and A semiconductor adhesive film comprising 10 to 35 parts by weight of a plasticizer.
11. In claim 1, The above semiconductor adhesive film is a semiconductor adhesive film having a dielectric loss of 0.02 to 0.1 under conditions of 25 ℃ and 10 GHz.
12. In claim 1, The above semiconductor adhesive film is a semiconductor adhesive film having a dielectric constant of 2.8 to 3.3 under conditions of 25 ℃ and 10 GHz.

Description

Semiconductor Adhesive Film Comprising a Polyurethane-Based Compound The present invention relates to a semiconductor adhesive film comprising a polyurethane-based compound. Recently, there has been an even greater demand for thinning and miniaturization of semiconductor devices and their packages. As wafer thicknesses decrease to 100 μm or less, various functions are being added to films used for protecting or securing wafers, in addition to their adhesive strength. For example, this includes preventing static electricity from being conducted on the wafer. This is essential, in particular, for reducing wafer damage that may occur during semiconductor processes. These films are designed to account for wafer surface non-uniformity and can prevent wafer breakage by enhancing durability against external stress. Furthermore, semiconductor adhesive films must maintain stable performance under various environmental conditions and be able to operate without deformation at high and low temperatures. In addition, as semiconductor wafers become thinner, electrostatic chucks (ESCs) are utilized to effectively secure them. An electrostatic chuck is a device used to secure wafers in the semiconductor manufacturing process; it fixes the wafer using electrical force and, unlike conventional methods such as physical clamps or vacuum suction, minimizes damage caused by contact and provides uniform fixing force. In particular, wafer fixing technology utilizing electrostatic chucks is effective in minimizing physical damage and providing uniform fixing force. However, since the wafer surface may be degraded by static electricity if the electrostatic chuck is fixed directly to the wafer, physical properties of the film that can adhere to the wafer while reacting with the electrostatic chuck are required. The adhesive film used in this process must generally be designed with a multilayer structure. Such a film must minimize the occurrence of burrs or bubbles that may arise during the semiconductor process, and it must be cleanly removed without residue after the precision processing of the wafer is completed. Research is needed on a semiconductor adhesive film that maintains these functions while enabling the wafer to adhere to the electrostatic chuck, and minimizes residue or foreign substances when the film is peeled off after wafer transfer. FIG. 1 is a drawing showing a semiconductor adhesive film according to one embodiment of the present invention. Figure 2 is the result of photographing the initial peeling after lamination in experiment 3. Figure 3 shows the results of photography at the time of peeling 7 days after lamination in experiment 3. Hereinafter, various embodiments of the present invention are described with reference to the accompanying drawings. The present invention is not limited to specific embodiments and should be understood to include various modifications, equivalents, and/or alternatives of the embodiments of the present invention. In relation to the description of the drawings, similar reference numerals may be used for similar components. In this document, expressions such as "have," "can have," "include," or "can include" refer to the existence of the relevant feature (e.g., numerical values, functions, actions, or components, etc.) and do not exclude the existence of additional features. In this document, expressions such as “A or B,” “at least one of A or/and B,” or “one or more of A or/and B” may include all possible combinations of items listed together. For example, “A or B,” “at least one of A and B,” or “at least one of A or B” may refer to cases including (1) at least one A, (2) at least one B, or (3) both at least one A and at least one B. As used in this document, the expression "configured to" may be replaced, depending on the context, with, for example, "suitable for," "having the capacity to," "designed to," "adapted to," "made to," or "capable of." The term "configured to" does not necessarily mean "specifically designed to." The terms used in this document are used merely to describe specific embodiments and are not intended to limit the scope of other embodiments. Singular expressions may include plural expressions unless the context clearly indicates otherwise. Terms used herein, including technical or scientific terms, may have the same meaning as generally understood by those skilled in the art described in this document. Terms used in this document that are defined in general dictionaries may be interpreted as having the same or similar meaning as they have in the context of the relevant technology, and are not to be interpreted in an ideal or overly formal sense unless explicitly defined in this document. In some cases, even terms defined in this document may not be interpreted to exclude the embodiments of this document. The embodiments disclosed in this document are presented for the purpose of explaining and understanding the disclosed technical content and are not intended