KR-20260064943-A - DISPLAY DEVICE AND ELECTRONIC DEVICE HAVING THE SAME

Abstract

The display device includes a display panel comprising subpixels, a scan driver connected to the subpixels through scan lines, a data driver connected to the subpixels through data lines, and a timing controller that controls the scan driver and the data driver, wherein the timing controller transmits a pre-stored register value to a processor, receives image data arranged in a sequence corresponding to the register value from the processor, and controls the data driver according to the image data.

Inventors

• 박세혁

Assignees

• 삼성디스플레이 주식회사

Dates

Publication Date

20260508

Application Date

20241030

Claims (19)

1. A display panel including subpixels; A scan driver connected to the above subpixels through scan lines; A data driver connected to the above subpixels through data lines; and A timing controller that controls the scan driver and the data driver, wherein A display device that transmits a pre-stored register value to a processor, receives image data arranged in a sequence corresponding to the register value from the processor, and controls the data driver according to the image data.
2. In Article 1, The above register value is a display device representing one of a first logic level and a second logic level.
3. In Article 2, The above subpixels form pixel rows, and One of the above pixel rows includes first subpixels and second subpixels, and The first subpixels are connected to a first scan line, the second subpixels are connected to a second scan line, and the register value is a display device having the first logic level.
4. In Article 2, The above subpixels form pixel rows, and The above pixel rows are each connected to the above scan lines, and the register value is a display device having the above second logic level.
5. In Article 2, The above subpixels form first pixel rows and second pixel rows arranged alternately with the first pixel rows, and The first pixel row and the second pixel row are connected to the data driver through the data lines, and When the above register value is at the above first logic level, A display device in which a first image data set corresponding to the first pixel sequences is received from the processor during a first period, and a second image data set corresponding to the second pixel sequences is received from the processor during a second period after the first period, and the first and second image data sets are included in the image data.
6. In Article 5, The first and second image data sets are received sequentially during a single frame period by a display device.
7. In Article 5, Each of the above subpixels is configured to emit light of any one of a first color, a second color, and a third color, and In each of the first pixel rows, the subpixels of the first color and the subpixels of the second color are alternately arranged, and A display device in which subpixels of the third color are arranged in each of the above second pixel rows.
8. In Article 7, A display device wherein the first image data set comprises first subpixel data corresponding to the first color subpixels and the second color subpixels, and the second image data set comprises second subpixel data corresponding to the third color subpixels.
9. In Article 5, The above data driver outputs data voltages corresponding to the image data to the data lines, and The above first pixel rows are each connected to first sub-data lines, and The above second pixel rows are each connected to second sub-data lines, and A display device further comprising a demultiplexer that selectively transmits the data voltages output through the data lines to the first sub-data lines and the second sub-data lines.
10. In Article 9, A display device in which the above demultiplexer unit transmits data voltages corresponding to the first image data set to the first sub-data lines and transmits data voltages corresponding to the second image data set to the second sub-data lines.
11. In Article 2, The above subpixels form pixel rows, and The above pixel rows are connected to the scan driver through the above scan lines, and When the above register value is at the above second logic level, An image data set corresponding to the pixel rows is received from the processor, and the image data set is included in the image data, and A display device comprising subpixel data that sequentially corresponds to subpixels arranged in each of the pixel rows, wherein the above image data set comprises subpixel data.
12. In Article 11, The above image data set is a display device that receives it during a single frame period.
13. In Article 1, The above timing controller further includes a register in which the register value is stored, A display device in which the above register value is pre-stored according to the driving mode of the above display panel.
14. A display device including subpixels; and It includes a processor that controls the above-mentioned display device, and The above display device transmits a pre-stored register value to the processor, receives image data arranged in a sequence corresponding to the register value from the processor, and drives the subpixels according to the image data.
15. In Article 14, The above register value is an electronic device representing one of a first logic level and a second logic level.
16. In Article 15, The above display device further includes a scan driver connected to the subpixels through scan lines, and The above subpixels form pixel rows, and One of the above pixel rows includes first subpixels and second subpixels, and The first subpixels are connected to a first scan line, the second subpixels are connected to a second scan line, and the register value is an electronic device having the first logic level.
17. In Article 15, The above display device further includes a scan driver connected to the subpixels through scan lines, and The above subpixels form pixel rows, and The above pixel rows are each connected to the above scan lines, and the register value is an electronic device having the above second logic level.
18. In Article 14, The above display device further includes a data driver connected to the subpixels through data lines, and The above subpixels form first pixel rows and second pixel rows arranged alternately with the first pixel rows, and The first pixel row and the second pixel row are connected to the data driver through the data lines, and When the above register value is at the above first logic level, An electronic device in which a first image data set corresponding to the first pixel sequences is received from the processor during a first period, and a second image data set corresponding to the second pixel sequences is received from the processor during a second period after the first period, and the first and second image data sets are included in the image data.
19. In Article 18, The above first and second image data sets are received sequentially during a single frame period by an electronic device.

Description

Display device and electronic device having the same The present invention relates to a display device and an electronic device including the same. With the advancement of information technology, the importance of display devices, which serve as a medium connecting users and information, is being highlighted. In response to this, the use of display devices such as Liquid Crystal Displays (LCDs), Organic Light Emitting Displays (OLEDs), and Plasma Displays (PDS) is increasing. The display device includes a display panel comprising pixels and a driving unit for driving the display panel. The driving unit includes a scan driving unit that sequentially provides scan signals to scan lines and a data driver that provides data signals to data lines. Each pixel can emit light with a brightness corresponding to a data signal provided through a corresponding data line in response to a scan signal provided through a corresponding scan line. Recently, as resolution increases, data drivers can be configured to add demultiplexers to output lines to output data signals in a time-division manner using a greater number of data lines than the output lines. This leads to a problem where power consumption increases due to the increased number of switching cycles required to output data signals. The above description is intended solely to aid in understanding the background technology regarding the technical concepts of the present invention, and therefore, it should not be understood as prior art known to those skilled in the art of the present invention. FIG. 1 is a block diagram showing an example of a display device and a processor included in an electronic device according to an embodiment of the present invention. Figure 2 is a block diagram showing an example of the display device of Figure 1. FIG. 3 is a circuit diagram showing an example of any one of the subpixels of FIG. 2. Figure 4 is a block diagram showing an example of part A of Figure 2. FIG. 5 is a block diagram showing an example of the data transmission unit and data reception unit of FIG. 4. FIG. 6 is a flowchart showing an example of the transmission and reception operation of the display device and processor of FIG. 1. FIG. 7 is a plan view showing an example of a display device to which the transmission and reception operation of FIG. 6 is applied. FIG. 8 is a timing diagram showing an example of image data received from the processor of FIG. 6. FIG. 9 is a timing diagram showing an example in which the display device of FIG. 7 operates according to the image data of FIG. 8. FIG. 10 is a flowchart showing another embodiment of the transmission and reception operation of the display device and processor of FIG. 1. FIG. 11 is a plan view showing an example of a display device to which the transmission and reception operation of FIG. 10 is applied. FIG. 12 is a timing diagram showing an example of image data received from the processor of FIG. 10. FIG. 13 is a timing diagram showing an example in which the display device of FIG. 11 operates according to the image data of FIG. 12. FIG. 14 is a schematic block diagram showing an example of an electronic device including a display device according to an embodiment of the present invention. Hereinafter, preferred embodiments according to the present invention will be described in detail with reference to the accompanying drawings. It should be noted that in the following description, only the parts necessary for understanding the operation according to the present invention are described, and the description of other parts is omitted to avoid obscuring the gist of the present invention. Furthermore, the present invention is not limited to the embodiments described herein and may be embodied in other forms. However, the embodiments described herein are provided merely to explain in detail sufficient for a person skilled in the art to easily implement the technical concept of the present invention. Throughout the specification, when a part is described as being "connected" to another part, this includes not only cases where they are "directly connected," but also cases where they are "indirectly connected" with other elements interposed between them. The terms used herein are intended to describe specific embodiments and are not intended to limit the invention. Throughout the specification, when a part is described as "comprising" a certain component, this means that, unless specifically stated otherwise, it does not exclude other components but may include additional components. "At least one of X, Y, and Z" and "at least one selected from the group consisting of X, Y, and Z" may be interpreted as one X, one Y, one Z, or any combination of two or more of X, Y, and Z (e.g., XYZ, XYY, YZ, ZZ). Here, "and/or" includes all combinations of one or more of such components. Herein, terms such as first, second, etc. may be used to describe various components, but these components are not limited to these terms. These term