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KR-20260065107-A - PIXEL OF A DISPLAY DEVICE, DISPLAY DEVICE AND ELECTRONIC DEVICE

KR20260065107AKR 20260065107 AKR20260065107 AKR 20260065107AKR-20260065107-A

Abstract

A pixel of a display device comprises a first transistor including a first gate connected to a first node, a first terminal receiving a first power supply voltage, and a second terminal connected to a second node; a first capacitor including a first electrode connected to a first node and a second electrode connected to a second node; a second capacitor including a first electrode receiving a first power supply voltage and a second electrode connected to a second node; a second transistor including a gate receiving a first gate signal, a first terminal connected to a data line, and a second terminal connected to a first node; a light-emitting element including an anode electrode and a cathode electrode receiving a second power supply voltage; and a third transistor including a gate receiving a first light-emitting signal, a first terminal connected to a second node, and a second terminal connected to an anode electrode. The third transistor is turned off while the second transistor is turned on in a first mode, and is turned on while the second transistor is turned on in a second mode.

Inventors

  • 심종식
  • 김아영
  • 양찬영
  • 이성규

Assignees

  • 삼성디스플레이 주식회사

Dates

Publication Date
20260508
Application Date
20241031

Claims (20)

  1. In the pixels of a display device, A first transistor comprising a first gate connected to a first node, a first terminal receiving a first power supply voltage, and a second terminal connected to a second node; A first capacitor comprising a first electrode connected to the first node and a second electrode connected to the second node; A second capacitor comprising a first electrode receiving the first power supply voltage and a second electrode connected to the second node; A second transistor comprising a gate receiving a first gate signal, a first terminal connected to a data line, and a second terminal connected to the first node; A light-emitting element comprising an anode electrode and a cathode electrode receiving a second power supply voltage; and A third transistor comprising a gate for receiving a first light-emitting signal, a first terminal connected to the second node, and a second terminal connected to the anode electrode, and A pixel of a display device characterized in that the third transistor is turned off while the second transistor is turned on in a first mode, and is turned on while the second transistor is turned on in a second mode.
  2. In Article 1, During the data writing interval of the first mode, the second electrode of the first capacitor is connected to the second capacitor and separated from the anode electrode, and A pixel of a display device characterized in that, during the data writing interval of the second mode, the second electrode of the first capacitor is connected to the second capacitor and the anode electrode.
  3. In Article 1, During the light emission period of the first mode, the first transistor generates a light emission current based on a voltage independent of the capacitance of the light-emitting element capacitor formed by the anode electrode and the cathode electrode, and A pixel of a display device characterized in that, during the light emission period of the second mode, the first transistor generates a light emission current based on a voltage reflecting the capacitance of the light-emitting element capacitor.
  4. A pixel of a display device according to claim 1, characterized in that, based on the same data voltage, the light-emitting current generated by the first transistor in the first mode is smaller than the light-emitting current generated by the first transistor in the second mode.
  5. In Article 1, The light emission current generated by the first transistor in the first mode is given by the mathematical formula " Determined by, The light emission current generated by the first transistor in the above second mode is given by the mathematical formula " It is determined by, A pixel of a display device characterized in that, where IEL is a luminescent current generated by the first transistor, K is a current coefficient, Cst is the capacitance of the first capacitor, Chold is the capacitance of the second capacitor, VDAT is a data voltage, VREF is a reference voltage, and Cel is the capacitance of the light-emitting element capacitor.
  6. In Article 1, A pixel of a display device characterized in that the first mode is a normal mode and the second mode is a High Brightness Mode (HBM).
  7. A pixel of a display device according to claim 1, characterized in that the first transistor is an NMOS (N-type Metal-Oxide-Semiconductor) transistor.
  8. A pixel of a display device according to claim 1, wherein the first transistor further comprises a second gate connected to the second node.
  9. In Article 1, A pixel of a display device characterized by further including a fourth transistor comprising a gate for receiving a second gate signal, a first terminal for receiving a reference voltage, and a second terminal connected to the first node.
  10. In Article 9, A pixel of a display device characterized by further including a fifth transistor comprising a gate for receiving a third gate signal, a first terminal for receiving an initialization voltage, and a second terminal connected to the anode electrode.
  11. In Article 10, A pixel of a display device characterized by further including a sixth transistor comprising a gate for receiving a second light-emitting signal, a first terminal for receiving the first power supply voltage, and a second terminal connected to the first terminal of the first transistor.
  12. In claim 11, the first, second, third, fourth, and fifth transistors are NMOS (N-type Metal-Oxide-Semiconductor) transistors, and A pixel of a display device characterized in that the above-mentioned sixth transistor is a PMOS (P-type Metal-Oxide-Semiconductor) transistor.
  13. A pixel of a display device according to claim 11, characterized in that the first, second, third, fourth, fifth, and sixth transistors are NMOS (N-type Metal-Oxide-Semiconductor) transistors.
  14. In claim 11, the first, second, fourth, and fifth transistors are NMOS (N-type Metal-Oxide-Semiconductor) transistors, and A pixel of a display device characterized in that the third and sixth transistors are PMOS (P-type Metal-Oxide-Semiconductor) transistors.
  15. In claim 11, the frame interval for the pixel of the display device is, An initialization section in which the first node and the second node are initialized; A compensation section in which the threshold voltage of the first transistor is stored in the first capacitor; A data writing section in which the data voltage is transmitted to the first node; and A pixel of a display device characterized by including a light-emitting section in which the light-emitting element emits light.
  16. In Article 15, In the first mode, the third transistor is turned off during the compensation section and the data writing section, and is turned on during the initialization section and the light emission section. A pixel of a display device characterized in that, in the second mode, the third transistor is turned off in the compensation section and turned on in the initialization section, the data writing section, and the light emission section.
  17. In Article 15, In the first mode, the third transistor is turned off during the compensation section and the data writing section, and is turned on during the initialization section and the light emission section. A pixel of a display device characterized in that, in the second mode above, the third transistor is turned on for the entire duration of the frame interval.
  18. In Article 15, A pixel of a display device characterized in that, in each of the first mode and the second mode, the fifth transistor is turned off in the compensation section, the data writing section, and the light emission section, and is turned on in the initialization section.
  19. In Article 15, In the first mode, the fifth transistor is turned off during the light emission section and turned on during the initialization section, the compensation section, and the data writing section, and A pixel of a display device characterized in that, in the second mode above, the fifth transistor is turned off in the compensation section, the data writing section, and the light emission section, and is turned on in the initialization section.
  20. In claim 15, the frame section is, A pixel of a display device characterized by further including an anode initialization section in which the anode electrode is initialized.

Description

Pixel of a display device, display device and electronic device The present invention relates to a display device, and more specifically, to a pixel of a display device, a display device, and an electronic device. A pixel of a display device may include a storage capacitor, a scan transistor that transmits a data voltage to the storage capacitor in response to a scan signal, a driving transistor that generates a light-emitting current based on the data voltage stored in the storage capacitor, and a light-emitting element that emits light based on the light-emitting current. Conventional pixel driving transistors are implemented as LTPS (Low-Temperature Polycrystalline Silicon) transistors, but recently, pixels in which the driving transistor is implemented as an oxide transistor are being developed to achieve high image quality. However, the oxide transistor has a larger current fluctuation with respect to voltage fluctuation compared to the LTPS transistor, and therefore, pixels in which the driving transistor is implemented as an oxide transistor may have higher brightness sensitivity with respect to voltage fluctuation compared to pixels in which the driving transistor is implemented as an LTPS transistor. FIG. 1 is a circuit diagram showing a pixel of a display device according to one embodiment of the present invention. FIG. 2 is a timing diagram for explaining an example of the operation of a pixel of a display device in a first mode. Figure 3 is a circuit diagram illustrating an example of pixel operation in the initialization period. Figure 4 is a circuit diagram illustrating an example of pixel operation in a compensation interval. FIG. 5 is a circuit diagram for explaining an example of pixel operation in the data writing section of the first mode. FIG. 6 is a circuit diagram illustrating an example of pixel operation in the light-emitting section of the first mode. FIG. 7 is a timing diagram to explain an example of the operation of a pixel of a display device in a second mode. FIG. 8 is a circuit diagram illustrating an example of pixel operation in the data writing section of the second mode. FIG. 9 is a circuit diagram illustrating an example of pixel operation in the light-emitting section of the second mode. Figure 10 is a diagram showing an example of the current of a Low-Temperature Polycrystalline Silicon (LTPS) transistor and the current of an oxide transistor according to the absolute value of the gate-source voltage. FIG. 11 is a drawing showing an example of the luminance in the first mode and the luminance in the second mode of a pixel according to embodiments of the present invention according to the data voltage. FIG. 12 is a timing diagram for explaining another example of operations in the first and second modes of a pixel of a display device according to one embodiment of the present invention. FIG. 13 is a timing diagram for explaining another example of operations in the first and second modes of a pixel of a display device according to one embodiment of the present invention. FIG. 14 is a timing diagram for explaining another example of operations in the first and second modes of a pixel of a display device according to one embodiment of the present invention. FIG. 15 is a circuit diagram for explaining an example of pixel operations in the anode initialization period of the first and second modes. FIG. 16 is a timing diagram for explaining another example of operations in the first and second modes of a pixel of a display device according to one embodiment of the present invention. FIG. 17 is a circuit diagram showing a pixel of a display device according to another embodiment of the present invention. FIG. 18 is a timing diagram for illustrating an example of operations in the first and second modes of a pixel of a display device according to another embodiment of the present invention. FIG. 19 is a circuit diagram showing a pixel of a display device according to another embodiment of the present invention. FIG. 20 is a timing diagram for illustrating an example of operations in the first and second modes of a pixel of a display device according to another embodiment of the present invention. FIG. 21 is a block diagram showing a display device according to embodiments of the present invention. FIG. 22 is a block diagram showing an electronic device including a display device according to embodiments of the present invention. FIG. 23 is a block diagram showing an example of an electronic device according to embodiments of the present invention. Hereinafter, preferred embodiments of the present invention will be described in more detail with reference to the attached drawings. Identical components in the drawings are given the same reference numerals, and redundant descriptions of identical components are omitted. FIG. 1 is a circuit diagram showing a pixel of a display device according to one embodiment of the present invention. Referring to FIG. 1, a pixel (100) according t