KR-20260065259-A - SEMICONDUCTOR DEVICE

Abstract

A semiconductor device according to one embodiment comprises a substrate, a bit line extending in a direction perpendicular to the substrate, a plurality of semiconductor patterns extending in a first direction with one end connected to the bit line, a plurality of word lines extending in a second direction intersecting the first direction and positioned intersecting the semiconductor patterns, a first electrode extending in the first direction with one end connected to the semiconductor patterns, and a support member fixing the other end of the first electrode, wherein the other end of the first electrode is located within the support member.

Inventors

• 박정민
• 김범종
• 정형석

Assignees

• 삼성전자주식회사

Dates

Publication Date

20260508

Application Date

20241101

Claims (10)

1. Substrate; A bit line extending in a direction perpendicular to the above substrate; A plurality of semiconductor patterns, one end of which is connected to the bit line and which extend in a first direction; A plurality of word lines extending in a second direction intersecting the first direction and positioned intersecting the semiconductor pattern; A first electrode having one end connected to the semiconductor pattern and extending in the first direction, and It includes a support member that fixes the other end of the first electrode, and The other end of the first electrode is a semiconductor device located within the support member.
2. In paragraph 1, A dielectric film surrounding the first electrode; and A semiconductor device further comprising a second electrode located on the dielectric film.
3. In paragraph 1, A semiconductor device in which the thickness of the support member in the first direction is 50 Å to 200 Å.
4. In paragraph 1, The width in the first direction of the area overlapping with the first electrode of the support member is, A semiconductor device that is wider in the first direction than the area that does not overlap with the first electrode of the support member.
5. In paragraph 1, The above support comprises a metal nitride, a metal oxide, or a metal carbide, and A semiconductor device in which the above metal is Si, Ti, Ta, Hf, Zr, or Sr.
6. In paragraph 1, The above support member is a semiconductor device that extends along a direction perpendicular to the substrate.
7. In paragraph 6, A semiconductor device comprising a plurality of support members spaced apart in the second direction.
8. In paragraph 1, A groove is located inside the first electrode, and The above groove is a semiconductor device capped by the above support.
9. In paragraph 1, The first electrode is a semiconductor device having a rod shape extending along a first direction.
10. In paragraph 1, A semiconductor device comprising a first electrode including a vertical portion extending in a direction perpendicular to a substrate and a pair of horizontal portions extending from the vertical portion in a first direction parallel to the substrate.

Description

Semiconductor Device The present disclosure relates to a semiconductor device. Technology is required to increase the integration density of semiconductor devices. In the case of two-dimensional semiconductor devices, the integration density is primarily determined by the area occupied by a unit memory cell, and the integration density in this aspect can be influenced by the level of fine pattern formation technology. However, since fine pattern formation technology requires expensive equipment, the integration density of 2D semiconductor devices is increasing but remains limited. Accordingly, 3D semiconductor memory devices equipped with memory cells arranged in 3D are being proposed. FIG. 1 briefly illustrates a cross-section of a semiconductor device according to one embodiment. Figures 2 and 3 show enlarged views of the area labeled A in Figure 1. Figure 4 is a cross-section taken along the line I-I' of Figure 3. Figure 5 is a cross-section taken along the line II-II' of Figure 4. Figure 6 is a cross-section taken along the line III-III' of Figure 3. FIG. 7 shows a cross-section identical to FIG. 5 for another embodiment. Figure 8 illustrates the same area as Figure 2 for a semiconductor device that does not include a support member. FIG. 9 shows a cross-section identical to FIG. 8 for another embodiment. FIG. 10 shows a cross-section identical to FIG. 9 for a semiconductor device according to one embodiment. FIGS. 11 to 14 briefly illustrate a method for manufacturing a semiconductor device according to one embodiment. FIG. 15 is a perspective view schematically showing a semiconductor device according to one embodiment. FIG. 16 is a cross-sectional view of a semiconductor device according to one embodiment. Embodiments of the present invention are described in detail with reference to the attached drawings so that those skilled in the art can easily implement the invention. However, the present invention may be embodied in various different forms and is not limited to the embodiments described herein. In the drawings, thicknesses have been enlarged to clearly represent various layers and regions. Throughout the specification, the same reference numerals have been used for similar parts. When a part such as a layer, film, region, or plate is described as being "on" another part, this includes not only cases where it is "immediately on" another part, but also cases where there is another part in between. Conversely, when a part is described as being "immediately on" another part, it means that there is no other part in between. Now, a semiconductor device according to an embodiment of the present invention will be described. FIG. 1 briefly illustrates a cross-section of a semiconductor device according to one embodiment. FIG. 2 and FIG. 3 illustrate an enlarged view of the area marked A in FIG. 1. FIG. 1 and FIG. 2 illustrate only the configuration of the first electrode (310) among the data storage patterns for convenience of explanation, while FIG. 3 illustrates the configuration of the first electrode (310), dielectric film (320), and second electrode (330) constituting the data storage pattern (DS). Referring simultaneously to FIG. 1 and FIG. 2, a semiconductor device (100) according to one embodiment may include memory cells arranged in three dimensions on a substrate (110). The memory cells may be arranged in a first direction (DR1), a second direction (DR2), and a third direction (DR3). The first direction (DR1) and the second direction (DR2) may be directions parallel to the substrate (110). For example, the second direction (DR2) may be a direction perpendicular to the first direction (DR1). The third direction (DR3) may be a direction perpendicular to the substrate (110). The memory cells may be stacked in the third direction (DR3). Each memory cell may be connected to one bit line (BL) and two word lines (WL). A bit line (BL) can be extended along a third direction (DR3). Memory cells stacked in the third direction (DR3) can be commonly connected to a single bit line (BL). A word line (WL) may be extended along a second direction (DR2). Memory cells arranged along the second direction (DR2) may be commonly connected to a single word line (WL). Multiple word lines (WL) may be arranged along a third direction (DR3). Each memory cell may be connected to two adjacent word lines (WL) arranged in the third direction (DR3). An interlayer insulating film (150) may be positioned between adjacent word lines (WL) in the third direction (DR3). The interlayer insulating film (150) may include an insulating material and may insulate the adjacent word lines (WL) in the third direction (DR3). The word lines (WL) of the layer above the interlayer insulating film (150) and the word lines (WL) of the layer below the interlayer insulating film (150) may be separated in the third direction (DR3) by the interlayer insulating film (150). The interlayer insulating film (150) may include at least one of a silicon nit