KR-20260065288-A - THIN FILM TRANSISTOR, METHOD FOR MANUFACTURING THE SAME, AND DISPLAY APPARATUS COMPRISING THE SAME

Abstract

One embodiment of the present invention provides a thin-film transistor comprising a gate electrode, an active layer, a source electrode, and a drain electrode, wherein the active layer includes a first channel portion overlapping with the source electrode, a second channel portion overlapping with the drain electrode, and a connecting portion connecting the first channel portion and the second channel portion, and the connecting portion is a conductive region. Furthermore, one embodiment of the present invention provides a method for manufacturing the thin-film transistor and a display device including the thin-film transistor.

Inventors

• 고영현
• 최성주
• 장재만
• 류지희

Assignees

• 엘지디스플레이 주식회사

Dates

Publication Date

20260508

Application Date

20241101

Claims (20)

1. Gate electrode; An active layer spaced apart from the gate electrode and overlapping at least partially with the gate electrode; Interlayer insulating film on the above active layer; A source electrode on the interlayer insulating film connected to the active layer; and A drain electrode on the interlayer insulating film, spaced apart from the source electrode and connected to the active layer; comprising The above active layer is, A first channel portion overlapping with the source electrode and the gate electrode; A second channel portion overlapping with the drain electrode and the gate electrode; and A connecting part connecting the first channel part and the second channel part; is included, The above connection is a thin-film transistor, which is a conductive region.
2. In paragraph 1, The above connection is a region doped with a dopant, and A thin-film transistor in which the dopant concentration of the above-mentioned connection portion is higher than the dopant concentration of the first channel portion and the dopant concentration of the second channel portion.
3. In paragraph 1, A thin-film transistor in which the above connection does not overlap with the source electrode and the drain electrode.
4. In paragraph 1, the active layer is, A first contact portion in contact with the source electrode; and A thin-film transistor further comprising a second contact portion in contact with the drain electrode.
5. In paragraph 4, The first channel portion is positioned between the connection portion and the first contact portion, and The second channel portion is a thin-film transistor disposed between the connection portion and the second contact portion.
6. In paragraph 1, The above connection portion overlaps with the gate electrode, a thin-film transistor.
7. In paragraph 1, A thin-film transistor in which at least a portion of the above connection does not overlap with the gate electrode.
8. In paragraph 1, The above gate electrode includes a first gate electrode and a second gate electrode, and The first gate electrode overlaps with the first channel portion and the source electrode, and A thin-film transistor in which the second gate electrode overlaps with the second channel portion and the drain electrode.
9. In paragraph 8, A thin-film transistor in which at least a portion of the above-mentioned connection does not overlap with the first gate electrode and the second gate electrode.
10. In paragraph 1, The above interlayer insulating film is a thin-film transistor disposed on the above connection portion.
11. In paragraph 1, A thin-film transistor in which at least a portion of the above-mentioned connection is exposed from the interlayer insulating film.
12. In paragraph 1, It further includes a capping layer disposed on the above-mentioned connection part, and The above capping layer is a thin-film transistor having reducing properties.
13. In Paragraph 12, A thin-film transistor in which the capping layer comprises at least one of titanium (Ti), molybdenum (Mo), aluminum (Al), indium (In), and zinc (Zn).
14. Gate electrode; An active layer spaced apart from the gate electrode and overlapping at least partially with the gate electrode; and A source electrode connected to the active layer; comprising, The above active layer is, A channel portion overlapping with the source electrode and the gate electrode; A contact portion in contact with the source electrode; and A connection portion that does not overlap with the source electrode; including, The above channel portion is positioned between the above connection portion and the above contact portion, and The above connection is a thin-film transistor, which is a conductive region.
15. In Paragraph 14, The above connection is a region doped with a dopant, and A thin-film transistor in which the dopant concentration of the above-mentioned connection portion is higher than the dopant concentration of the first channel portion and the dopant concentration of the second channel portion.
16. Step of forming a gate electrode on a substrate; A step of forming an active layer on the gate electrode that is spaced apart from the gate electrode and overlaps at least partially with the gate electrode; A step of forming an interlayer insulating film having a contact hole on the active layer; A step of forming a source electrode and a drain electrode on the interlayer insulating film; and A step of selectively conductive the active layer using the source electrode and the drain electrode as a mask; comprising Method for manufacturing a thin-film transistor.
17. In Paragraph 16, A method for manufacturing a thin-film transistor, wherein, in the step of selectively conductiveizing the active layer, a region of the active layer that does not overlap with either the source electrode or the drain electrode is conductive to form a connection part.
18. In Clause 16, in the step of selectively conductive the active layer, The region of the active layer that overlaps with the source electrode is not conductive and becomes a first channel portion, and A method for manufacturing a thin-film transistor in which the region of the active layer that overlaps with the drain electrode is not conductive and becomes a second channel portion.
19. In Paragraph 16, A method for manufacturing a thin-film transistor, wherein the step of selectively conductiveizing the active layer is performed by dopant doping.
20. A display device comprising a thin-film transistor according to any one of claims 1 to 14.

Description

Thin film transistor, method for manufacturing the same, and display apparatus comprising the same The present invention relates to a thin-film transistor, a method for manufacturing the same, and a display device including a thin-film transistor. Since thin film transistors can be manufactured on glass or plastic substrates, they are widely used as switching or driving elements in display devices such as liquid crystal display devices or organic light-emitting devices. Thin-film transistors can be classified according to the material constituting the active layer into amorphous silicon thin-film transistors in which amorphous silicon is used as the active layer, polycrystalline silicon thin-film transistors in which polycrystalline silicon is used as the active layer, and oxide semiconductor thin-film transistors in which oxide semiconductor is used as the active layer. Among these, oxide semiconductor thin-film transistors (TFTs), which possess high mobility and exhibit a large resistance change depending on oxygen content, have the advantage of easily achieving desired physical properties. Manufacturing costs are low because the oxide forming the active layer can be deposited at relatively low temperatures during the manufacturing process. Furthermore, due to the inherent properties of oxides, oxide semiconductors are transparent, making them advantageous for realizing transparent displays. High-resolution display devices contain a large number of thin-film transistors. In order to accommodate a large number of thin-film transistors within a given area, the size of the thin-film transistors must be reduced. However, when the size of the thin-film transistors is reduced, the channel length also shortens, which can lead to reduced driving stability of the transistors or characteristic variations among multiple transistors, thereby degrading the display quality of the display device. For thin-film transistors to operate stably, the channel needs to have an effective channel length greater than a specific value. In the case of coplanar thin-film transistors, controlling the conductive region is important to secure the channel length. In thin-film transistors, a phenomenon in which the conductive region penetrates into the channel may occur. If the length of the conductive region penetrating the channel is inconsistent, the effective channel length of the thin-film transistors becomes inconsistent, which can lead to characteristic variations among the transistors. In particular, when the effective channel length is inconsistent in short-channel thin-film transistors, the characteristic variations between the transistors become significant, posing difficulties in the manufacturing of large-area panels. Therefore, to manufacture high-resolution display devices with excellent display quality, it is necessary to increase the integration density of thin-film transistors by shortening the channel length of the thin-film transistors, and at the same time ensure characteristic uniformity among the thin-film transistors. FIG. 1 is a plan view of a thin-film transistor according to one embodiment of the present invention. Figure 2 is a cross-sectional view taken along I-I' of Figure 1. FIG. 3 is a circuit diagram of a thin-film transistor according to one embodiment of the present invention. FIG. 4 is a plan view of a thin-film transistor according to another embodiment of the present invention. Figure 5 is a cross-sectional view taken along II-II' of Figure 4. FIG. 6 is a cross-sectional view of a thin-film transistor according to another embodiment of the present invention. FIG. 7 is a cross-sectional view of a thin-film transistor according to another embodiment of the present invention. FIG. 8 is a cross-sectional view of a thin-film transistor according to another embodiment of the present invention. FIG. 9 is a cross-sectional view of a thin-film transistor according to another embodiment of the present invention. FIGS. 10a to 10e are schematic cross-sectional views illustrating a method for manufacturing a thin-film transistor according to one embodiment of the present invention. FIG. 11 is a schematic diagram of a display device according to another embodiment of the present invention. Figure 12 is a circuit diagram for any pixel of Figure 11. Fig. 13 is a plan view of the pixel of Fig. 12. Figure 14 is a cross-sectional view taken along III-III' of Figure 13. The advantages and features of the present invention and the methods for achieving them will become clear by referring to the embodiments described below in detail together with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below but may be implemented in various different forms. These embodiments are intended to ensure that the disclosure of the present invention is complete and to enable those skilled in the art to easily understand the invention. The shapes, sizes, ratios, angles, numbers, etc. di