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KR-20260065452-A - STORAGE DEVICE, OPERATION METHOD THEREOF AND COMPUTER SYSTEM INCLUDING THE STORAGE DEVICE

KR20260065452AKR 20260065452 AKR20260065452 AKR 20260065452AKR-20260065452-A

Abstract

A storage device according to one embodiment of the present invention includes a non-volatile memory device for storing data, a storage interface connected to a host device, and a storage controller that receives a command from the host device through the storage interface and controls the memory device in response to the command. When the storage controller receives a command sequence from the host device that includes, in order, a first write command indicating a first write operation, a second write command indicating a second write operation, and a flush command indicating a flush operation, at least a reference number of times, the first write command is executed as a sequential write to record the first write data in a first memory area of the memory device, and the second write command is executed as a random write to record the second write data in a second memory area of the memory device.

Inventors

  • 이상걸
  • 이슬기

Assignees

  • 삼성전자주식회사

Dates

Publication Date
20260508
Application Date
20241224
Priority Date
20241101

Claims (20)

  1. A non-volatile memory device for storing data; A storage interface connected to a host device; and A storage controller that receives a command from the host device through the interface and controls the memory device in response to the command; A storage device, wherein the above storage controller receives a command sequence from the host device, which includes in order a first write command instructing a first write operation, a second write command instructing a second write operation, and a flush command instructing a flush operation, at least a reference number of times, executes the first write command as a sequential write to record first write data in a first memory area of the memory device, and executes the second write command as a random write to record second write data in a second memory area of the memory device.
  2. In paragraph 1, A storage device in which the capacity of the first write data is greater than the capacity of the second write data.
  3. In paragraph 1, A storage device in which the first write data is snapshot data generated by a recall function enabled in an operating system installed in the non-volatile memory device and loaded into the host device, and the second write data is metadata.
  4. In paragraph 3, The above non-volatile memory device provides a recall space including the first memory region and the second memory region, and The above recall space is a storage device defined in a system partition where the operating system of the host device is installed.
  5. In paragraph 4, A storage device in which, if the remaining capacity of the above system partition is less than a predetermined minimum free capacity, the storage controller writes the first write data and the second write data to a buffer area different from the first memory area and the second memory area in response to the command sequence received from the host device.
  6. In paragraph 4, A storage device wherein the storage controller writes one bit each of the first write data and the second write data to each of the plurality of memory cells included in the buffer area.
  7. In paragraph 6, A storage device in which the storage controller transfers and writes the first write data and the second write data written in the buffer area to a data area different from the buffer area according to a predetermined migration policy.
  8. In paragraph 1, A storage device wherein the storage controller records 2 bits or more of data in each of a plurality of first memory cells disposed in the first memory area and records 1 bit of data in each of a plurality of second memory cells disposed in the second memory area.
  9. In paragraph 1, A storage device in which the above flush operation is an operation of moving data stored in a Random Access Memory (RAM) device different from the memory device to the memory device.
  10. A step of receiving a command sequence including a first write command, a second write command, and a flush command from a host device; A step of comparing the number of receptions of the above command sequence with a predetermined reference number; If the number of receptions of the above command sequence is greater than or equal to the reference number, a step of comparing the remaining capacity of the system partition where the operating system is installed in the memory device with the minimum free capacity; and A method of operating a storage device, comprising the step of: if the above remaining capacity is greater than the above minimum spare capacity, writing the first write data to the first memory area of the memory device by sequential writing in response to the first write command, and writing the second write data to the second memory area of the memory device by random writing in response to the second write command.
  11. In Paragraph 10, A method of operating a storage device, further comprising the step of writing the first write data and the second write data, respectively, to a buffer area different from the first memory area and the second memory area when the number of receptions of the command sequence is less than the reference number.
  12. In Paragraph 10, A method of operating a storage device, further comprising the step of prohibiting the migration of the second write data written by random writing to the second memory area.
  13. In Paragraph 10, The first memory region above includes at least one of MLC (Multi Level Cell), TLC (Triple Level Cell), and QLC (Quad Level Cell), and A method of operation of a storage device in which the above-mentioned second memory region includes an SLC (Single Level Cell).
  14. In Paragraph 10, A method of operating a storage device, further comprising the step of determining whether the first logical address of the first write command is included in the first memory area and whether the second logical address of the second write command is included in the second memory area, if the number of receptions of the command sequence is greater than or equal to the reference number and the remaining capacity is greater than the minimum spare capacity.
  15. In Paragraph 14, A method of operation of a storage device, wherein if the first logical address is included in the first memory area and the second logical address is included in the second memory area, the first write data is written to the first memory area by sequential writing and the second write data is written to the second memory area by random writing.
  16. In Paragraph 14, A method of operation of a storage device, wherein if the first logical address is not included in the first memory area or the second logical address is not included in the second memory area, the first write data and the second write data are written to a buffer area different from the first memory area and the second memory area.
  17. In Paragraph 14, The method further includes the step of determining whether the first logical addresses of the first write commands included in the command sequence received more than the above reference number of times overlap with each other. A method of operation of a storage device, wherein if the first logical addresses overlap each other, the first write data is written to the first memory area by sequential writing, and the second write data is written to the second memory area by random writing.
  18. In Paragraph 17, A method of operation of a storage device, wherein if the first logical addresses do not overlap with each other, the first write data and the second write data are written to a buffer area different from the first memory area and the second memory area.
  19. A storage device comprising a memory device, a storage interface, and a storage controller; and A host device comprising a host interface connected to the storage interface, and a processor that loads an operating system installed on a system partition of the memory device and executes a boot process; The processor enables a recall function that generates snapshot data and metadata that capture a screen displayed by an application running on the host device, and transmits a command sequence to the storage device comprising a first write command that instructs the recording of the snapshot data and a second write command that instructs the recording of the metadata. A computer system in which the storage controller writes the snapshot data sequentially to a first memory area of the system partition, writes the metadata randomly to a second memory area of the system partition, and prohibits migration of the metadata written to the second memory area.
  20. In Paragraph 19, The processor activates the recall function under the condition that the remaining capacity of the system partition is greater than or equal to the minimum free capacity, and A computer system in which the above minimum free capacity is determined by the total capacity of the above system partition.

Description

Storage device, method of operation thereof, and computer system including the storage device The present invention relates to a storage device, a method of operation thereof, and a computer system including the storage device. A storage device is connected to a host device to store data transmitted by the host device and to transmit the stored data to the host device. The storage device includes a memory device and a storage controller, and the storage controller may be connected to the host device through a predetermined interface. To enhance user convenience, the host device connected to the storage device may provide a recall function that generates snapshot data by capturing the running screen and stores the generated data in the storage device. By storing the snapshot data generated by the host device in the storage device, a history of operations can be provided to the user. However, the Write Amplification Factor (WAF) of the storage device may increase during the process of storing snapshot data in the storage device, which may shorten the lifespan of the storage device or degrade its reliability. FIG. 1 is a simplified diagram showing a storage device according to one embodiment of the present invention. FIGS. 2 and FIGS. 3 are block diagrams simply illustrating a computer system including a storage device according to an embodiment of the present invention. FIG. 4 is a drawing provided to explain the operation of a computer system according to one embodiment of the present invention. FIGS. 5 to 7 are drawings provided to explain the operation of a storage device according to an embodiment of the present invention. FIG. 8 is a drawing provided to explain the operation of a computer system according to one embodiment of the present invention. FIG. 9 is a drawing provided to explain the operation of a computer system according to one embodiment of the present invention. FIG. 10 is a drawing provided to explain the operation of a storage device according to one embodiment of the present invention. FIGS. 11a, FIGS. 11b, and FIGS. 12 are drawings provided to explain the operation of a storage device according to an embodiment of the present invention. FIG. 13 is a drawing provided to explain the operation method of a storage device according to one embodiment of the present invention. FIGS. 14 and FIGS. 15 are drawings that simply illustrate a memory device included in a storage device according to an embodiment of the present invention. Hereinafter, preferred embodiments of the present invention are described as follows with reference to the attached drawings. FIG. 1 is a simplified diagram showing a storage device according to one embodiment of the present invention. In the embodiments described with reference to FIG. 1, each of the storage devices (10, 20) may be a solid state drive device. Referring to FIG. 1, each of the storage devices (10, 20) may have a form factor according to the M.2 standard and may communicate with an external host device, such as a central processing unit, system-on-chip, application processor, etc., according to the PCI-Express protocol. The storage device (10) may include a storage controller (11), memory devices (12), RAM devices (13), a power circuit (14), a system board (15), etc. The storage controller (11), memory devices (12), RAM devices (13), and power circuit (14), etc. may be electrically connected to each other by wiring patterns formed on the system board (15). The system board (15) may include a connector (16) comprising a plurality of pins for connection with a host device. The number and arrangement of the plurality of pins included in the connector (16) may vary depending on an interface that defines the connection method between the storage device (10) and the host device. In exemplary embodiments, the storage device (10) may communicate with an external host according to any one of interfaces such as USB (Universal Serial Bus), PCI-Express (Peripheral Component Interconnect Express), SATA (Serial Advanced Technology Attachment), and M-Phy for UFS (Universal Flash Storage). For example, the storage device (10) according to an embodiment illustrated in FIG. 1 may communicate with a host device according to the PCI-Express protocol. The storage device (10) can be operated by power supplied from a host device through a connector (16). The power circuit (14) of the storage device (10) may be a Power Management Integrated Circuit (PMIC) that generates internal voltages necessary for the operation of a storage controller (11), memory devices (12), and RAM device (13), etc., using an external voltage supplied by the host device through the connector (16). The storage controller (11) can write data to memory devices (12) or read data from memory devices (12) in response to a command received from a host device. For example, the storage device (10) may include a plurality of memory devices (12) mounted on a system board (15), and each of the plurality of memory d