KR-20260065962-A - IMAGING ELEMENT AND IMAGING DEVICE

KR20260065962AKR 20260065962 AKR20260065962 AKR 20260065962AKR-20260065962-A

Abstract

An imaging element is provided, comprising a pixel chip having a plurality of pixel blocks including one or more pixels, a first control block including a first converter that converts a signal from a pixel included in at least one first pixel block among the plurality of pixel blocks into a digital signal and a first memory unit that stores a digital signal converted by the first converter, and a second control block disposed next to the first control block in a column direction and including a second converter that converts a signal from a pixel included in at least one second pixel block among the plurality of pixel blocks into a digital signal and a second memory unit that stores a digital signal converted by the second converter, wherein the second converter and the second memory unit in the second control block are disposed at a position that is vertically inverted with respect to the placement position of the first converter and the first memory unit in the first control block.

Inventors

나카니시 소타
마츠모토 시게루
히라타 도모키

Assignees

가부시키가이샤 니콘

Dates

Publication Date: 20260511
Application Date: 20210217
Priority Date: 20200217

Claims (13)

A pixel chip having a plurality of pixel blocks including one or more pixels, and A signal processing chip comprising: a first control block including a first converter that converts a signal from a pixel included in at least a first pixel block among a plurality of pixel blocks into a digital signal and a first memory unit that stores a digital signal converted by the first converter; and a second control block disposed next to the first control block in a column direction and including a second converter that converts a signal from a pixel included in at least a second pixel block among a plurality of pixel blocks into a digital signal and a second memory unit that stores a digital signal converted by the second converter. An imaging element, wherein the second converter and the second memory unit in the second control block are positioned at a vertically inverted position relative to the placement position of the first converter and the first memory unit in the first control block.
In Article 1, The first control block has a first exposure control unit for controlling the exposure time of a pixel included in the first pixel block, and The second control block has a second exposure control unit for controlling the exposure time of a pixel included in the second pixel block, and An imaging element, wherein the second converter, the second memory unit, and the second exposure control unit in the second control block are positioned in a vertically inverted position relative to the position of the first converter, the first memory unit, and the first exposure control unit in the first control block.
In Article 2, The first control block has a first pixel driving unit for driving a pixel included in the first pixel block, and The second control block has a second pixel driving unit for driving a pixel included in the second pixel block, and An imaging element, wherein the second converter, the second memory unit, the second exposure control unit, and the second pixel driving unit in the second control block are positioned in a vertically inverted position relative to the position of the first converter, the first memory unit, the first exposure control unit, and the first pixel driving unit in the first control block.
In Paragraph 3, The first control block above has a first level shift unit that converts a voltage level, and The second control block above has a second level shift unit that converts the voltage level, and An imaging element, wherein the second converter, the second memory unit, the second exposure control unit, the second pixel driving unit, and the second level shift unit in the second control block are positioned at a vertically inverted position relative to the position of the first converter, the first memory unit, the first exposure control unit, the first pixel driving unit, and the first level shift unit in the first control block.
In Article 1, The signal processing chip comprises a third control block that is disposed next to the first control block in the row direction and includes a third conversion unit that converts a signal from a pixel included in at least a third pixel block among a plurality of pixels into a digital signal, and a third memory unit that stores the digital signal converted by the third conversion unit. An imaging element, wherein the third converter and the third memory in the third control block are positioned at a location that is horizontally inverted with respect to the placement position of the first converter and the first memory in the first control block.
In Article 5, The first control block has a first exposure control unit for controlling the exposure time of a pixel included in the first pixel block, and The second control block has a second exposure control unit for controlling the exposure time of a pixel included in the second pixel block, and The third control block has a third exposure control unit for controlling the exposure time of a pixel included in the third pixel block, and The second converter, the second memory unit, and the second exposure control unit in the second control block are positioned in a vertically inverted position relative to the placement positions of the first converter, the first memory unit, and the first exposure control unit in the first control block, and An imaging element, wherein the third converter, the third memory unit, and the third exposure control unit in the third control block are positioned at a location that is horizontally inverted with respect to the position of the first converter, the first memory unit, and the first exposure control unit in the first control block.
In Article 6, The first control block has a first pixel driving unit for driving a pixel included in the first pixel block, and The second control block has a second pixel driving unit for driving a pixel included in the second pixel block, and The third control block has a third pixel driving unit for driving a pixel included in the third pixel block, and The second converter, the second memory unit, the second exposure control unit, and the second pixel driver in the second control block are positioned in a vertically inverted manner relative to the position of the first converter, the first memory unit, the first exposure control unit, and the first pixel driver in the first control block, and An imaging element, wherein the third converter, the third memory unit, the third exposure control unit, and the third pixel driving unit in the third control block are positioned at a location that is horizontally inverted with respect to the position of the first converter, the first memory unit, the first exposure control unit, and the first pixel driving unit in the first control block.
In Article 7, The first control block above has a first level shift unit that converts a voltage level, and The second control block above has a second level shift unit that converts the voltage level, and The above third control block has a third level shift unit that converts the voltage level, and The second converter, the second memory unit, the second exposure control unit, the second pixel driving unit, and the second level shift unit in the second control block are positioned in a vertically inverted manner relative to the position of the first converter, the first memory unit, the first exposure control unit, the first pixel driving unit, and the first level shift unit in the first control block, and An imaging element in which the third conversion unit, the third memory unit, the third exposure control unit, the third pixel driving unit, and the third level shift unit in the third control block are positioned at a location that is horizontally inverted with respect to the position of the first conversion unit, the first memory unit, the first exposure control unit, the first pixel driving unit, and the first level shift unit in the first control block.
A pixel chip having a plurality of pixel blocks including one or more pixels, and A signal processing chip comprising: a first control block including a first converter for converting a signal from a pixel included in at least a first pixel block among a plurality of pixel blocks into a digital signal, a first memory for storing a digital signal converted by the first converter, and a first exposure control for controlling the exposure time of a pixel included in the first pixel block; and a second control block disposed next to the first control block in a row direction, comprising a second converter for converting a signal from a pixel included in at least a second pixel block among a plurality of pixel blocks into a digital signal, a second memory for storing a digital signal converted by the second converter, and a second exposure control for controlling the exposure time of a pixel included in the second pixel block. An imaging element, wherein the second converter and the second memory unit in the second control block are positioned at a location that is horizontally inverted with respect to the placement position of the first converter and the first memory unit in the first control block.
In Article 9, The first control block has a first pixel driving unit for driving a pixel included in the first pixel block, and The second control block has a second pixel driving unit for driving a pixel included in the second pixel block, and An imaging element, wherein the second converter, the second memory unit, the second exposure control unit, and the second pixel driving unit in the second control block are positioned at a location that is horizontally inverted with respect to the position of the first converter, the first memory unit, the first exposure control unit, and the first pixel driving unit in the first control block.
In Article 10, The first control block above has a first level shift unit that converts a voltage level, and The second control block above has a second level shift unit that converts the voltage level, and An imaging element, wherein the second converter, the second memory unit, the second exposure control unit, the second pixel driving unit, and the second level shift unit in the second control block are positioned at a location that is horizontally inverted with respect to the position of the first converter, the first memory unit, the first exposure control unit, the first pixel driving unit, and the first level shift unit in the first control block.
In any one of paragraphs 1 to 11, The above pixel is, A photoelectric converter that converts light into electric charge, and A transmission unit that transmits the charge of the above-mentioned photoelectric conversion unit, and An accumulation unit that accumulates the charge transmitted by the above-mentioned transmission unit, and An imaging element having a reset unit that discharges the charge of the above-mentioned accumulation unit.
An imaging device having an imaging element described in any one of claims 1 to 12.

Description

Imaging Element and Imaging Device The present invention relates to an imaging element and an imaging device. An imaging device is known that performs shooting at different exposure times for each pixel block composed of multiple pixels (e.g., Patent Document 1). FIG. 1a is a diagram showing an overview of an imaging element (400) related to an embodiment of the present invention. FIG. 1b shows an example of a specific configuration of a pixel portion (110). FIG. 1c shows an example of the circuit configuration of a pixel (112). FIG. 1d shows an example of a more specific configuration of the main circuit section (210). FIG. 2a shows an example of a specific configuration of a control block (220). FIG. 2b shows an example of a plurality of control blocks (220) related to an embodiment. FIG. 3 shows an example of a method for arranging control blocks (720) related to a comparative example. FIG. 4 shows an example of the configuration of an imaging element (400). FIG. 5 shows an example of the configuration of an imaging element (800) related to a comparative example. FIG. 6a is a drawing for explaining an example of a wiring method for an imaging element (400). FIG. 6b is a drawing for explaining an example of a wiring method for an imaging element (400). FIG. 7a shows an example of a bonding surface (150) between a pixel chip (100) and a signal processing chip (200). FIG. 7b shows an example of an enlarged view of the joint surface (150). FIG. 8a shows an example of the configuration of a pixel portion (110) related to an embodiment. FIG. 8b shows an example of the configuration of the main circuit section (210) related to the embodiment. FIG. 8c shows an example of a main circuit section (210) corresponding to the pixel section (110) of FIG. 8a. FIG. 9a shows an example of the configuration of a pixel portion (610) related to a comparative example. FIG. 9b shows an example of the configuration of the main circuit section (710) related to the comparative example. FIG. 9c shows an example of the configuration of the main circuit section (710) related to the comparative example. FIG. 10a shows an example of a timing chart indicating the imaging operation of an imaging element (400). FIG. 10b shows an example of exposure timing for each pixel group (115). FIG. 11a shows an example of the configuration of a signal processing chip (200). FIG. 11b shows an example of a cross-sectional view of a signal processing chip (200). FIG. 12a shows an example of the configuration of a signal processing chip (700) related to a comparative example. FIG. 12b shows another example of a signal processing chip (700) related to a comparative example. FIG. 12c shows an example of a cross-sectional view of a signal processing chip (700) related to a comparative example. FIG. 13 is a block diagram showing an example of the configuration of an imaging device (500) related to an embodiment. The present invention will be explained below through embodiments, but the following embodiments do not limit the invention related to the claims. Furthermore, not all combinations of features described in the embodiments are essential to the means of solving the invention. In this specification, the X-axis and the Y-axis are orthogonal to each other, and the Z-axis is orthogonal to the XY plane. The XYZ axes form a right-handed system. A direction parallel to the Z-axis may be referred to as the stacking direction of the imaging element (400). In this specification, the terms "up" and "down" are not limited to the up and down directions in the direction of gravity. These terms merely refer to relative directions in the Z-axis direction. Furthermore, in this specification, the arrangement in the X-axis direction is described as a "row" and the arrangement in the Y-axis direction as a "column," but the matrix direction is not limited to this. FIG. 1a is a diagram showing an overview of an imaging element (400) related to the present embodiment. The imaging element (400) captures a subject. The imaging element (400) generates image data of the captured subject. The imaging element (400) includes a pixel chip (100) and a signal processing chip (200). As shown in FIG. 1a, the pixel chip (100) is stacked on the signal processing chip (200). The pixel chip (100) has a pixel section (110). The pixel section (110) outputs a pixel signal based on incident light. The signal processing chip (200) has a main circuit section (210) and a peripheral circuit section (230). The main circuit unit (210) receives a pixel signal output from the pixel chip (100). The main circuit unit (210) processes the received pixel signal. In this example, the main circuit unit (210) is positioned opposite the pixel unit (110) in the signal processing chip (200). The main circuit unit (210) may output a control signal to the pixel unit (110) to control the operation of the pixel unit (110). The peripheral circuit section (230) controls the operation of the main circuit section (210)