KR-20260066064-A - A transmitter including a clock source selectively enabled based on digital transmission data

Abstract

As a device, it includes a clock source configured to generate a local oscillator (LO) clock signal; a radio frequency digital-to-analog converter (RF DAC) configured to generate a radio frequency (RF) signal based on a data signal and the LO clock signal; and an idle data detector configured to detect a stream of idle data in the data signal and, in response to detecting the stream of idle data, to disable providing the LO clock signal to at least a portion of the RF DAC.

Inventors

• 루 무
• 정 이
• 왕 청-한
• 친 밍-퉈
• 박 찬홍
• 로펠리 엠마누엘

Assignees

• 퀄컴 인코포레이티드

Dates

Publication Date

20260512

Application Date

20240821

Priority Date

20230919

Claims (20)

1. As a device, A clock source configured to generate a local oscillator (LO) clock signal; A radio frequency digital-to-analog converter (RF DAC) configured to generate a radio frequency (RF) signal based on a data signal and the LO clock signal; and It includes an idle data detector, wherein the idle data detector, Detect a stream of idle data from the above data signal; and A device configured to disable providing the LO clock signal to at least a portion of the RF DAC in response to detecting the stream of the idle data.
2. A device according to claim 1, wherein the data signal includes a transmission physical layer data signal.
3. A device according to claim 1, wherein the stream of idle data follows the stream of data within the data signal, and the idle data detector is configured to disable providing the LO clock signal in a time interval after the end of the stream of data.
4. In paragraph 3, the time interval is a programmable device.
5. A device according to paragraph 3, wherein the time interval is set to one or more unit intervals (UIs) of the data signal.
6. A device according to claim 1, wherein the stream of data within the data signal follows the stream of idle data, and the idle data detector is configured to enable providing the LO clock signal to the at least part of the RF DAC in a time interval prior to the start of the stream of data.
7. In paragraph 6, the time interval is a programmable device.
8. In paragraph 6, the device wherein the time interval is set to one or more unit intervals (UIs) of the data signal.
9. The device according to claim 1, wherein the data signal includes a transmitting physical layer data signal, and further includes an ultra-wideband (UWB) pulse generator configured to generate a transmitting UWB signal based on the transmitting physical layer data signal and an oversampling clock signal.
10. A device according to claim 9, wherein the idle data detector is further configured to disable providing the oversampling clock signal to the UWB pulse generator in response to detecting the stream of the idle data.
11. A device according to claim 1, wherein the data signal includes a transmitted ultrawideband (UWB) signal.
12. A device according to claim 1, wherein the data signal comprises a set of significant bit groups, and each of the significant bit groups comprises one or more significant bits.
13. In Clause 12, the above RF DAC is, Each, a set of RF DACs configured to generate a set of RF signal portions based on the set of the aforementioned significant bit groups; and A device comprising a signal combiner configured to combine a set of RF signal portions to generate the above RF signal.
14. In paragraph 13, the above idle data detector is, Detecting a stream of idle data in one or more first subsets of the sets of the above-mentioned significant bit groups; and A device configured to disable providing the LO clock signal to one or more first subsets of the sets of RF DACs corresponding to one or more first subsets of the sets of the aforementioned significant bit groups.
15. In paragraph 14, the above idle data detector is, Detecting a stream of data in one or more second subsets of the sets of the above-mentioned significant bit groups, wherein the stream of data is simultaneous with the stream of idle data; and A device configured to enable providing the LO clock signal to one or more second subsets of the sets of RF DACs corresponding to one or more second subsets of the sets of the aforementioned significant bit groups.
16. As a method, Step of generating a local oscillator (LO) clock signal; A step of generating a radio frequency (RF) signal based on a data signal and the LO clock signal; A step of detecting a stream of idle data from the above data signal; and A method comprising the step of gating the LO clock signal to stop generating at least a portion of the RF signal in response to detecting the stream of the idle data.
17. In claim 16, the stream of idle data follows the stream of data within the data signal, and the step of gating the LO clock signal starts at a time interval after the end of the stream of data.
18. A method according to claim 16, further comprising the step of ungating the LO clock signal to generate the at least portion of the RF signal in a time interval prior to the start of the data stream, wherein the stream of data in the data signal follows the stream of idle data.
19. In Paragraph 16, The above data signal comprises a set of significant bit groups, each of the significant bit groups comprises one or more significant bits; and The step of generating the above RF signal is, Each, a step of generating a set of RF signal parts based on the set of the aforementioned significant bit groups; and A method comprising the step of combining a set of RF signal portions to generate the RF signal.
20. In paragraph 19, the step of gating the LO clock signal to stop generating the at least part of the RF signal is A step of detecting a stream of idle data in one or more of the sets of the above significant bit groups; and A method comprising the step of gating the LO clock signal to stop generating one or more sets of RF signal portions based on one or more of the sets of significant bit groups detected by the stream of idle data.

Description

A transmitter including a clock source selectively enabled based on digital transmission data Cross-reference regarding related applications This patent application claims priority to pending U.S. Regular Application No. 18/470,195, filed on September 19, 2023 and assigned to the assignee of this application, which is expressly incorporated herein by reference as fully set forth below for all applicable purposes. Technology field The embodiments of the present disclosure generally relate to signal transmitters, and in particular to a transmitter comprising a clock source that is selectively enabled based on digital transmission data. Some transmitters are implemented as digital transmitters, where a radio frequency digital-to-analog converter (RF DAC) is employed to directly generate or synthesize a transmission RF signal based on an input data signal at a sampling rate based on a local oscillator (LO) clock signal. The power consumption of these digital transmitters, including the power consumed by the LO clock signal, is a matter of achieving improved power efficiency for these transmitters. The following presents a simplified summary of one or more implementations to provide a basic understanding of such implementations. This summary is not a comprehensive overview of all implementations considered, nor is it intended to identify the core or important elements of any of them, or to describe the scope of any or all of them. The sole purpose of this summary is to present some concepts of one or more implementations in a simplified form as an introduction to the more detailed descriptions that follow. One aspect of the disclosure relates to an apparatus. The apparatus comprises: a clock source configured to generate a local oscillator (LO) clock signal; a radio frequency digital-to-analog converter (RF DAC) configured to generate a radio frequency (RF) signal based on a data signal and the LO clock signal; and an idle data detector configured to detect a stream of idle data in the data signal and, in response to detecting the stream of idle data, disable providing the LO clock signal to at least a portion of the RF DAC. Another aspect of the disclosure relates to a method. The method comprises: generating a local oscillator (LO) clock signal; generating a radio frequency (RF) signal based on a data signal and the LO clock signal; detecting a stream of idle data in the data signal; and gating the LO clock signal to stop generating at least a portion of the RF signal in response to detecting the stream of idle data. Another aspect of the disclosure relates to an apparatus. The apparatus comprises: a modem configured to generate a physical layer ("phy") data signal; an ultra-wideband (UWB) pulse generator configured to generate a UWB signal based on the phy data signal and a first clock signal; a radio frequency digital-to-analog converter (RF DAC) configured to generate a radio frequency (RF) signal based on the UWB signal and a second clock signal; and a gating circuit configured to gate the application of the second clock signal to the RF DAC in response to a pattern in the phy data signal. Another aspect of the disclosure relates to an apparatus. The apparatus comprises: a modem configured to generate a physical layer ("phy") data signal; an ultra-wideband (UWB) pulse generator configured to generate a UWB signal based on the phy data signal and a first clock signal, wherein the UWB signal comprises a set of significant bit groups; a set of radio frequency digital-to-analog converters (RF DACs), each configured to generate a set of radio frequency (RF) signals based on the set of significant bit groups of the UWB signal and a second clock signal; an idle data detector, each configured to generate a set of control signals based on detecting a set of idle data streams in the set of significant bit groups; and a gating circuit, each configured to transmit a second clock signal to a set of RF DACs or to gate a second clock signal from a set of RF DACs based on the set of control signals. To achieve the aforementioned and related objectives, one or more embodiments include features that are fully described below and, in particular, referred to in the claims. The following description and the accompanying drawings provide details of specific exemplary aspects of one or more embodiments. However, these aspects represent only some of the various ways in which the principles of the various embodiments may be utilized, and the described embodiments are intended to include all such aspects and their equivalents. FIG. 1a illustrates a block diagram of an exemplary transmitter according to an embodiment of the present disclosure. FIG. 1b illustrates a timing diagram of exemplary signals associated with the operation of the transmitter of FIG. 1a according to another aspect of the present disclosure. FIG. 2 illustrates a block/schematic diagram of another exemplary transmitter according to another aspect of the present