KR-20260066092-A - SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

KR20260066092AKR 20260066092 AKR20260066092 AKR 20260066092AKR-20260066092-A

Abstract

A semiconductor device having good reliability is provided. The semiconductor device has a transistor, and the transistor has a first insulator, a second insulator, a first oxide, a second oxide, a third oxide, a first conductor and a second conductor, a third insulator, a third conductor, a fourth insulator, and a fifth insulator. The fourth insulator and the fifth insulator are provided with an opening reaching the second oxide, and the third oxide, the third insulator, and the third conductor are arranged sequentially from the inner wall side of the opening to fill the opening. In the channel length direction of the transistor, at least a portion of the fourth insulator in the region where the fourth insulator and the second oxide do not overlap is in contact with the first insulator, and in the channel width direction of the transistor, at least a portion of the third oxide in the region where the third oxide and the second oxide do not overlap is in contact with the first insulator.

Inventors

야마자끼, 페이
도찌바야시, 가쯔아끼
호도, 료따
스가야, 겐따로
야마데, 나오또

Assignees

가부시키가이샤 한도오따이 에네루기 켄큐쇼

Dates

Publication Date: 20260512
Application Date: 20190221
Priority Date: 20180307

Claims (7)

As a semiconductor device including a transistor, The above transistor The first insulator and, A second insulator on the first insulator above, and The first oxide on the second insulator and, The second oxide on the first oxide above, and The third oxide on the second oxide above, and The third insulator on the above third oxide, and The first conductor on the third insulator and, A fourth insulator in contact with at least a portion of the third oxide, at least a portion of the upper surface of the second oxide, at least a portion of the side surface of the second oxide, at least a portion of the side surface of the first oxide, at least a portion of the side surface of the second insulator, and at least a portion of the first insulator, and The fifth insulator above the fourth insulator, and A sixth insulator in contact with at least a portion of the upper surface of the third oxide, at least a portion of the upper surface of the third insulator, at least a portion of the upper surface of the first conductor, and at least a portion of the upper surface of the fifth insulator, and It includes a second conductor on the second oxide, and The second oxide comprises a first region, a second region, and a third region located between the first region and the second region, and As a semiconductor device of the first region and the second region, First insulator; A second insulator in contact with a first region of the first insulator; A first oxide on the second insulator; A second oxide on the first oxide above; At least a third insulator covering the second oxide; A fourth insulator on the third insulator above; A first opening provided in the third insulator and the fourth insulator, reaching a first region of the second oxide; A third oxide comprising a first region disposed to cover the inner wall of the first opening and in contact with the first region of the second oxide; A fifth insulator on the third oxide above; A first conductor disposed to fill the first opening by interposing the third oxide and the fifth insulator; and It includes a second conductor comprising a portion in contact with a second region of the second oxide, and When viewed from a cross-section in the first direction, the third oxide includes a second region in contact with a second region of the first insulator, and When viewed from a cross-section in the first direction, the third insulator includes a region in contact with a third region of the first insulator adjacent to the second region of the first insulator, and A semiconductor device in which, in the first insulator, the thickness of the third region is greater than the thickness of the second region, and the thickness of the first region is greater than the thickness of the third region.
As a semiconductor device, First insulator; A second insulator in contact with a first region of the first insulator; A first oxide on the second insulator; A second oxide on the first oxide above; At least a third insulator covering the second oxide; A fourth insulator on the third insulator above; A first opening provided in the third insulator and the fourth insulator, reaching a first region of the second oxide; A third oxide comprising a first region disposed to cover the inner wall of the first opening and in contact with the first region of the second oxide; A fifth insulator on the third oxide above; A first conductor arranged to fill the first opening by interposing the third oxide and the fifth insulator; A second opening provided in at least the third insulator and the fourth insulator and reaching a second region of the second oxide; and It includes a second conductor disposed in the second opening and in contact with a first portion of the second region of the second oxide, When viewed from a cross-section in the first direction, the third oxide includes a second region in contact with a second region of the first insulator, and When viewed from a cross-section in the first direction, the third insulator includes a region in contact with a third region of the first insulator adjacent to the second region of the first insulator, and A semiconductor device in which, in the first insulator, the thickness of the third region is greater than the thickness of the second region, and the thickness of the first region is greater than the thickness of the third region.
In Article 2, A semiconductor device in which, when viewed in a cross-section of a second direction perpendicular to the first direction, the third insulator is in contact with a second part of the second region of the second oxide.
In Article 1 or Article 2, The first insulator comprises an oxide of at least one of aluminum and hafnium, and A semiconductor device in which the second insulator comprises either silicon oxide or silicon nitride.
In Article 1 or Article 2, A semiconductor device in which the second region of the second oxide comprises one of phosphorus and boron.
In Article 1 or Article 2, A semiconductor device wherein the first oxide, the second oxide, and the third oxide each comprise at least indium.
In Article 1 or Article 2, A semiconductor device in which, when viewed from a cross-section in the first direction, the height of the bottom surface of the first conductor in the region where the first conductor and the second oxide do not overlap is lower than the height of the bottom surface of the second oxide.

Description

Semiconductor Device and Method for Manufacturing Semiconductor Device One embodiment of the present invention relates to a semiconductor device and a method for manufacturing a semiconductor device. Alternatively, one embodiment of the present invention relates to a semiconductor wafer, a module, and an electronic device. In addition, the term "semiconductor device" in this specification and others refers to any device capable of functioning by utilizing semiconductor characteristics. Semiconductor elements such as transistors, as well as semiconductor circuits, computing devices, and memory devices, are forms of semiconductor devices. Display devices (liquid crystal display devices, light-emitting display devices, etc.), projection devices, lighting devices, electro-optical devices, capacitor devices, memory devices, semiconductor circuits, imaging devices, electronic devices, etc., may be said to have semiconductor devices. Furthermore, one embodiment of the present invention is not limited to the technical field described above. One embodiment of the invention disclosed in this specification, etc. relates to an article, a method, or a method of manufacturing. Alternatively, one embodiment of the present invention relates to a process, a machine, a product, or a composition of matter. While silicon-based semiconductor materials are widely known as semiconductor thin films applicable to transistors, oxide semiconductors are attracting attention as other materials. As oxide semiconductors, not only oxides of single-component metals, such as indium oxide and zinc oxide, but also oxides of multi-component metals are known. Among multi-component metal oxides, research on In-Ga-Zn oxide (hereinafter also referred to as IGZO) is particularly active. Through research on IGZO, CAAC (c-axis aligned crystalline) and nc (nanocrystalline) structures, which are neither single crystal nor amorphous, have been discovered in oxide semiconductors (see Non-patent Literatures 1 to 3). Non-patent Literatures 1 and 2 also disclose a technique for fabricating transistors using oxide semiconductors having a CAAC structure. Furthermore, Non-patent Literatures 4 and 5 describe that even oxide semiconductors with lower crystallinity than CAAC and nc structures can have microcrystalline structures. In addition, transistors using IGZO as an active layer have very low off-current (see Non-patent Literature 6), and LSIs and displays utilizing these characteristics have been reported (see Non-patent Literature 7 and Non-patent Literature 8). FIG. 1 is a top view and a cross-sectional view of a semiconductor device according to one embodiment of the present invention. FIG. 2 is a perspective view of a semiconductor device according to one embodiment of the present invention. FIG. 3 is a cross-sectional view of a semiconductor device according to one embodiment of the present invention. FIG. 4 is a top view and a cross-sectional view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. FIG. 5 is a top view and a cross-sectional view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. FIG. 6 is a top view and a cross-sectional view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. FIG. 7 is a top view and a cross-sectional view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. FIG. 8 is a top view and a cross-sectional view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. FIG. 9 is a top view and a cross-sectional view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. FIG. 10 is a top view and a cross-sectional view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. FIG. 11 is a top view and a cross-sectional view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. FIG. 12 is a top view and a cross-sectional view of a semiconductor device according to one embodiment of the present invention. FIG. 13 is a top view and a cross-sectional view of a semiconductor device according to one embodiment of the present invention. FIG. 14 is a cross-sectional view of a semiconductor device according to one embodiment of the present invention. FIG. 15 is a top view and a cross-sectional view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. FIG. 16 is a top view and a cross-sectional view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. FIG. 17 is a top view and a cross-sectional view illustrating a m