KR-20260066309-A - ELECTRONIC DEVICE AND OPERATION METHOD THEREOF

Abstract

A method of operating an electronic device is disclosed. The method of operating an electronic device may include: a step of determining the expected yield of a plurality of first wafers based on first data regarding a plurality of factors relating to a semiconductor manufacturing process of a plurality of first wafers in progress, using a first model; a step of determining the yield contribution of the plurality of factors based on the first data, data regarding the expected yield of the plurality of first wafers, second data regarding the plurality of factors of a plurality of second wafers in which the process is completed, and data regarding the yield of the plurality of second wafers, using a second model generated based on the first model; and a step of determining one or more factors among the plurality of factors that contribute to yield reduction based on the yield contribution of the plurality of factors.

Inventors

• 이재원
• 권남영

Assignees

• 삼성전자주식회사

Dates

Publication Date

20260512

Application Date

20241104

Claims (20)

1. As a method of operation of an electronic device, A step of determining the expected yield of a plurality of first wafers based on first data regarding a plurality of factors concerning a semiconductor manufacturing process of a plurality of first wafers in progress, using a first model; A step of confirming the yield contribution of the plurality of factors based on the first data, data on the expected yield of the plurality of first wafers, second data on the plurality of factors of the plurality of second wafers for which the process has been completed, and data on the yield of the plurality of second wafers, using a second model generated based on the first model; and A method of operation comprising the step of determining one or more factors among the plurality of factors that contribute to yield reduction based on the yield contribution of the plurality of factors.
2. In Article 1, The above plurality of factors include factors relating to a plurality of equipment used in the semiconductor manufacturing process and factors relating to a plurality of measurement items measured in the semiconductor manufacturing process, and The data regarding the plurality of factors of the first wafer among the first data includes category data for one or more first equipment used in the process of the first wafer among the plurality of equipment, category data for one or more second equipment to be used in the process of the first wafer among the plurality of equipment, measurement data for one or more first measurement items measured for the first wafer among the plurality of measurement items, and measurement data for one or more second measurement items to be measured for the first wafer among the plurality of measurement items. A method of operation in which the data for the plurality of factors of the second wafer among the second data comprises category data for the plurality of equipment of the second wafer and measurement data for the plurality of measurement items of the second wafer.
3. In Article 2, Category data for the one or more second equipment mentioned above includes data obtained based on process history regarding the one or more second equipment mentioned above, and A method of operation in which measurement data for one or more second measurement items comprises data obtained based on process history regarding one or more second measurement items.
4. In claim 1, the step of confirming the expected yield of the plurality of first wafers is, A method of operation comprising the step of learning the first model based on the second data and the data regarding the yield of the plurality of second wafers.
5. In claim 1, the step of confirming the yield contribution of the plurality of factors is, The method includes the step of generating the second model based on the weights of a plurality of layers included in the first model, and The above second model is a method of operation that includes an explainable artificial intelligence (XAI) model.
6. In claim 1, the step of determining one or more factors is, A step of confirming the change in the ranking of the contribution to yield reduction of the plurality of factors according to the date, based on the yield contribution of the plurality of factors; and A method of operation comprising the step of identifying one or more factors whose contribution to yield reduction increases, based on a change over time in the contribution ranking of the plurality of factors over time.
7. In claim 6, the step of confirming the change over time in the ranking of the contribution to yield reduction of the plurality of factors is, A step of generating a plurality of wafer sets by grouping together wafers among the plurality of first wafers and the plurality of second wafers that underwent the same process on the same date; A step of determining the yield contribution of the plurality of factors for each of the plurality of wafer sets; and A method of operation comprising the step of determining the ranking of the contribution to yield reduction of the plurality of factors for each of the plurality of wafer sets based on the yield contribution of the plurality of factors for each of the plurality of wafer sets.
8. In claim 7, among the ranking of the contribution to yield reduction of the plurality of factors regarding each of the plurality of wafer sets, the ranking of the contribution to yield reduction of the first factor regarding the first wafer set is, Yield reduction contribution ranking corresponding to the date on which the process corresponding to the first factor was performed on the first wafer set; Yield reduction contribution ranking corresponding to the date on which the process corresponding to the first factor is to be performed for the first wafer set; Yield reduction contribution ranking corresponding to the process completion date of the first wafer set; and A method of operation comprising one of the yield reduction contribution rankings corresponding to the expected process completion date of the first wafer set.
9. In claim 7, among the ranking of the contribution to yield reduction of the plurality of factors regarding each of the plurality of wafer sets, the ranking of the contribution to yield reduction of the plurality of factors regarding the first wafer set is, A method of operation in which the yield contribution of the plurality of factors regarding the first wafer set is determined to be higher the lower the yield contribution.
10. In claim 7, among the yield contributions of the plurality of factors for each of the plurality of wafer sets, the yield contribution of the first factor for the first wafer set is, A method of operation determined by the average value of the yield contributions of a first factor corresponding to the wafers included in the first wafer set.
11. In Article 1, The plurality of first wafers include wafers for which the semiconductor manufacturing process is to be completed within a first period based on a set date, and A method of operation in which the plurality of second wafers include wafers in which the semiconductor manufacturing process is completed within a second period based on the set date.
12. In claim 1, the above operation method is, The method further includes the step of providing information regarding one or more of the above factors to a user terminal, A method of operation comprising at least one of the following: information regarding one or more factors, information indicating a change over time in the ranking of the contribution to yield reduction of one or more factors; information regarding equipment corresponding to one or more factors; and information corresponding to a measurement item corresponding to one or more factors.
13. As an electronic device, Transceiver; Memory; and Includes a processor, The above processor is, Using a first model, the expected yield of a plurality of first wafers is determined based on first data regarding a plurality of factors concerning the semiconductor manufacturing process of a plurality of first wafers in progress, and Using a second model generated based on the first model, the yield contribution of the plurality of factors is determined based on the first data, data on the expected yield of the plurality of first wafers, second data on the plurality of factors of the plurality of second wafers for which the process has been completed, and data on the yield of the plurality of second wafers. An electronic device that determines one or more factors among the plurality of factors that contribute to yield reduction based on the yield contribution of the plurality of factors.
14. In Article 13, The above plurality of factors include factors relating to a plurality of equipment used in the semiconductor manufacturing process and factors relating to a plurality of measurement items measured in the semiconductor manufacturing process, and The data regarding the plurality of factors of the first wafer among the first data includes category data for one or more first equipment used in the process of the first wafer among the plurality of equipment, category data for one or more second equipment to be used in the process of the first wafer among the plurality of equipment, measurement data for one or more first measurement items measured for the first wafer among the plurality of measurement items, and measurement data for one or more second measurement items to be measured for the first wafer among the plurality of measurement items. An electronic device wherein the data for the plurality of factors of the second wafer among the second data comprises category data for the plurality of equipment of the second wafer and measurement data for the plurality of measurement items of the second wafer.
15. In Article 14, Category data for the one or more second equipment mentioned above includes data obtained based on process history regarding the one or more second equipment mentioned above, and An electronic device wherein measurement data for one or more second measurement items comprises data obtained based on process history regarding one or more second measurement items.
16. In claim 13, when the processor checks the expected yield of the plurality of first wafers, An electronic device that learns the first model based on the second data and data regarding the yield of the plurality of second wafers.
17. In claim 13, when the processor determines the yield contribution of a plurality of factors, Based on the weights of a plurality of layers included in the first model, the second model is generated, and The above second model is a method of operation that includes an explainable artificial intelligence model.
18. In claim 13, when the processor determines the one or more factors, Based on the yield contribution of the aforementioned multiple factors, the change in the ranking of the contribution to yield reduction of the aforementioned multiple factors according to the date is confirmed, and An electronic device for identifying one or more factors whose contribution to yield reduction increases, based on a change over time in the contribution ranking of the plurality of factors over time.
19. In claim 18, when the processor checks the date-based change in the yield reduction contribution ranking of the plurality of factors, By grouping together wafers among the plurality of first wafers and the plurality of second wafers that underwent the same process on the same date, a plurality of wafer sets are created, and Confirm the yield contribution of the plurality of factors for each of the plurality of wafer sets, and An electronic device that determines the ranking of the contribution to yield reduction of the plurality of factors for each of the plurality of wafer sets based on the yield contribution of the plurality of factors for each of the plurality of wafer sets.
20. A computer-readable, non-transient recording medium having a program for executing the method of operation of claim 1 on a computer.

Description

Electronic device and method of operation thereof The present disclosure relates to an electronic device and a method of operating the same. The semiconductor industry is experiencing rapid market growth as demand has diversified and become more sophisticated, extending from personal computers in the past to mobile devices, home appliances, and automobiles alongside industrial advancements. Furthermore, the increasing utilization of high-tech devices necessitates the high integration of semiconductor components. This high integration requires ultra-fine linewidths, leading to the advancement of technologies to control them. As linewidths become finer, the impact on yield increases, making yield improvement a critical factor in semiconductor manufacturing processes. While yield is generally defined as output relative to input, in the semiconductor industry, it is defined as the number of chips that can be produced per wafer. Semiconductor manufacturing companies are devising various methods to improve yield and are introducing monitoring systems to manage complex processes, control processes, and generate data. Yield management in the semiconductor manufacturing process is a highly complex issue involving 200 to 300 processes, each intricately intertwined with equipment and process conditions. Furthermore, since it takes a significant amount of time to complete the semiconductor process for a single wafer, multifaceted efforts are being made to resolve this; however, existing statistical analysis methods or engineers' empirical analysis methods have limitations in addressing this issue. FIG. 1 illustrates a process for identifying factors contributing to yield reduction in an electronic device according to one embodiment. FIG. 2 illustrates a process for identifying factors contributing to yield reduction in an electronic device according to one embodiment. FIG. 3 illustrates a process of providing information regarding factors contributing to yield reduction in an electronic device according to one embodiment. FIG. 4 illustrates a process of providing information regarding factors contributing to yield reduction in an electronic device according to one embodiment. FIG. 5 illustrates an example of data regarding a plurality of factors related to a semiconductor manufacturing process according to one embodiment. FIG. 6 illustrates a process in which an electronic device determines the ranking of the contribution of a plurality of factors to yield reduction for each of a plurality of wafer sets according to one embodiment. FIG. 7 illustrates the process of determining factors contributing to yield reduction in an electronic device according to one embodiment. FIG. 8 illustrates the process of determining factors contributing to yield reduction in an electronic device according to one embodiment. FIG. 9 illustrates a process of providing information regarding factors contributing to yield reduction in an electronic device according to one embodiment. FIG. 10 shows a flowchart of an operation method of an electronic device according to one embodiment. FIG. 11 shows a block diagram of an electronic device according to one embodiment. The terms used in the embodiments have been selected to be as widely used as possible, taking into account their functions in the present disclosure; however, these terms may vary depending on the intent of those skilled in the art, case law, the emergence of new technologies, etc. Additionally, in specific cases, terms have been arbitrarily selected by the applicant, and in such cases, their meanings will be described in detail in the relevant explanatory section. Therefore, terms used in the present disclosure should be defined not merely by their names, but based on their meanings and the overall content of the present disclosure. When a part of a specification is described as "including" a certain component, this means that, unless specifically stated otherwise, it does not exclude other components but may include additional components. Furthermore, terms such as "...part" or "...module" as used in the specification refer to a unit that processes at least one function or operation, and this may be implemented in hardware or software, or as a combination of hardware and software. Embodiments of the present disclosure are described below with reference to the attached drawings so that those skilled in the art can easily implement them. However, the present disclosure may be embodied in various different forms and is not limited to the embodiments described herein. Embodiments of the present disclosure will be described in detail below with reference to the drawings. FIG. 1 illustrates the process of identifying factors contributing to yield reduction in an electronic device (100) according to one embodiment. According to one embodiment, the electronic device (100) can verify data regarding a plurality of factors concerning the semiconductor manufacturing process of a wafer that has