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KR-20260066589-A - METHOD AND SYSTEM FOR SIDE CHANNEL COUNTERMEASURE FOR ACTIVATION FUNCTION OF BINARIZED NEURAL NETWORK

KR20260066589AKR 20260066589 AKR20260066589 AKR 20260066589AKR-20260066589-A

Abstract

A method and system for side-channel analysis of the activation function of a binary neural network are disclosed. A side-channel analysis response method according to one embodiment comprises: a step of obtaining a first input value and a second input value for an input value to an activation function after a summation process of a deep learning network; a step of calculating a masked first value of the carry bit of the result of an addition operation of the least two bits using the least two bits of each of the first input value and the second input value, and a first lookup table; a step of calculating a masked second value of the result of an addition operation of the remaining two bits excluding the most significant two bits and the least two bits of each of the first input value and the second input value, the masked first value, and a second lookup table, and a step of calculating the sign of the result of an addition operation of the most significant two bits and the second value using the most significant two bits of each of the first input value and the second input value, the masked second value, and a third lookup table. It may include a step of calculating a masked third value of the bit.

Inventors

  • 김희석
  • 신원근
  • 정상윤

Assignees

  • 고려대학교 세종산학협력단

Dates

Publication Date
20260512
Application Date
20241231
Priority Date
20241104

Claims (17)

  1. In a side-channel analysis response method of a side-channel analysis response system implemented by at least one computer device, The above at least one computer device includes at least one processor, and A step of obtaining a first input value and a second input value for an activation function after a summation process of a deep learning network by the above-mentioned at least one processor; A step of calculating, by the at least one processor, a masked first value of the carry bit of the result of an addition operation of the lowest two bits using the lowest two bits of each of the first input value and the second input value, and a first lookup table; A step of calculating, by the at least one processor, a masked second value of the carry bit of the result of an addition operation between the remaining 2 bits excluding the most significant 2 bits and the least significant 2 bits of each of the first input value and the second input value, the masked first value, and a second lookup table; and A step of calculating, by the at least one processor, a masked third value of the sign bit of the result of an addition operation between the first two bits and the second value using the first two bits of each of the first input value and the second input value, the masked second value, and a third lookup table. A side-channel analysis response method characterized by including
  2. In paragraph 1, The step of obtaining the first input value and the second input value is, A side-channel analysis response method characterized by calculating the first input value by subtracting the first random number from the input value of the above activation function, and obtaining the first random number as the second input value.
  3. In paragraph 1, The first lookup table is implemented to receive the first input value and the second input value as inputs and output the masked first value, and The above masked first value includes a value obtained by masking the carry bit of the result of the addition operation between the first-1 input value and the second-1 input value with a second random number, and The above 1-1 input value includes the lowest 2 bits of the above 1 input value masked by a third random number, and The above 2-1 input value includes the lowest 2 bits of the above 2 input value. A side-channel analysis response method characterized by
  4. In paragraph 3, The value obtained by masking the carry bit with a second random number includes the result of an exclusive OR (XOR) between the carry bit and the least significant bit of the second random number, and The first input value masked by the third random number includes the result of the exclusive OR between the first input value and the third random number. A side-channel analysis response method characterized by
  5. In paragraph 1, The second lookup table is implemented to receive the first input value, the second input value, and the output value of the previous lookup table as inputs and output the masked second value, and The masked second value includes a value obtained by masking the carry bit of the result of the addition operation between the first-2 input value, the second-2 input value, and the output value of the previous lookup table with a second random number, and The above 1-2 input value includes the m-th 2 bits among the remaining 2 bits excluding the most significant 2 bits and least significant 2 bits of the above 1 input value masked by the third random number, and The above 2-2 input value includes the m-th 2 bits among the remaining 2 bits excluding the most significant 2 bits and the least significant 2 bits of the above 2 input value, and A side-channel analysis corresponding method characterized in that the above m is a natural number less than or equal to the number of the remaining 2 bits.
  6. In paragraph 5, The step of calculating the masked second value above is, A side-channel analysis response method characterized by calculating the masked second value using the second lookup table for each of the above m.
  7. In paragraph 6, A side-channel analysis response method characterized in that the output value of the above-mentioned previous lookup table includes the above-mentioned masked first value or the above-mentioned masked second value output for the previous m value in the above-mentioned second lookup table.
  8. In paragraph 1, The above third lookup table is implemented to receive the above first input value, the above second input value, and the above masked second value as inputs and output the above masked third value, and The masked third value includes a value in which the sign bit of the result of an addition operation between the first-third input value, the second-third input value, and the masked second value is masked with a second random number, and The above 1-3 input values include the most significant 2 bits of the above 1 input value masked by a 3rd random number, and The above 2-3 input value includes the most significant 2 bits of the above 2 input value. A side-channel analysis response method characterized by
  9. In paragraph 1, The above-mentioned side-channel analysis response method is, A step of converting the masking form of the masked third value from a Boolean form to an arithmetic form using the B2A (Boolean to Arithmetic) algorithm by the at least one processor. A side-channel analysis response method characterized by further including
  10. In paragraph 1, The above-mentioned side-channel analysis response method is, A step of deriving the range of the masked third value to -1 or 1 using a preset function for transfer to the next summing process by the above at least one processor. A side-channel analysis response method characterized by further including
  11. A computer program stored on a computer-readable recording medium to be combined with a computer device to execute the method of any one of claims 1 to 10 on the computer device.
  12. A computer-readable recording medium having a computer program recorded thereon for executing the method of any one of paragraphs 1 through 10 on a computer device.
  13. In a side-channel analysis response system implemented by at least one computer device, The above at least one computer device includes at least one processor, and By the above at least one processor, Obtaining a first input value and a second input value for the input to the activation function after the summation process of the deep learning network, and Calculate a masked first value of the carry bit of the result of the addition operation of the lowest two bits using the lowest two bits of each of the first input value and the second input value, and a first lookup table, and Calculate the masked second value of the carry bit of the addition operation result of the remaining 2 bits excluding the most significant 2 bits and the least significant 2 bits of each of the first input value and the second input value, the masked first value, and the second lookup table, and Calculating a masked third value of the sign bit of the addition result of the first input value and the second input value using the most significant two bits of each of the first input value and the second input value, the masked second value, and a third lookup table. A side-channel analysis response system characterized by
  14. In Paragraph 13, In order to obtain the above first input value and second input value, by the above at least one processor, Calculating the first input value by subtracting the first random number from the input value to the activation function, and obtaining the first random number as the second input value. A side-channel analysis response system characterized by
  15. In Paragraph 13, The first lookup table is implemented to receive the first input value and the second input value as inputs and output the masked first value, and The above masked first value includes a value obtained by masking the carry bit of the result of the addition operation between the first-1 input value and the second-1 input value with a second random number, and The above 1-1 input value includes the lowest 2 bits of the above 1 input value masked by a third random number, and The above 2-1 input value includes the lowest 2 bits of the above 2 input value. A side-channel analysis response system characterized by
  16. In Paragraph 13, The second lookup table is implemented to receive the first input value, the second input value, and the output value of the previous lookup table as inputs and output the masked second value, and The masked second value includes a value obtained by masking the carry bit of the result of the addition operation between the first-2 input value, the second-2 input value, and the output value of the previous lookup table with a second random number, and The above 1-2 input value includes the m-th 2 bits among the remaining 2 bits excluding the most significant 2 bits and least significant 2 bits of the above 1 input value masked by the third random number, and The above 2-2 input value includes the m-th 2 bits among the remaining 2 bits excluding the most significant 2 bits and the least significant 2 bits of the above 2 input value, and The above m is a natural number less than or equal to the number of the remaining 2 bits. A side-channel analysis response system characterized by
  17. In Paragraph 13, The above third lookup table is implemented to receive the above first input value, the above second input value, and the above masked second value as inputs and output the above masked third value, and The masked third value includes a value in which the sign bit of the result of an addition operation between the first-third input value, the second-third input value, and the masked second value is masked with a second random number, and The above 1-3 input values include the most significant 2 bits of the above 1 input value masked by a 3rd random number, and The above 2-3 input value includes the most significant 2 bits of the above 2 input value. A side-channel analysis response system characterized by

Description

Method and System for Side Channel Countermeasure for Activation Function of Binary Neural Networks The following description relates to a side-channel analysis corresponding method and system for the activation function of a binary neural network. Side-Channel Analysis is a technique that steals confidential information by utilizing side-channel data, such as power, electromagnetic waves, sound, and time, generated when hardware equipment is in operation. While conventional side-channel analysis extracted secret keys from cryptographic algorithms, the scope of attacks has expanded to include deep learning networks. This allows for the extraction of secret information—such as weights and biases—within deep learning networks, potentially leading to secondary damages like network replication and user authentication bypass. To protect the secret information of deep learning networks, masking is a representative side-channel countermeasure technique. Depending on the type of operation, Boolean masking and arithmetic masking are common. However, software-based masking techniques that protect the activation functions of deep learning networks are computationally expensive. In binary neural networks, the activation function outputs the sign bit of the input value; that is, it is a function that determines whether the input is positive or negative. Since deep learning networks use the same activation function, utilizing computationally expensive masking techniques drastically increases the execution time of the entire network. To prevent this, optimized software masking technology for activation functions is required. [Prior Art No.] Korean Registered Patent No. 10-0940445 FIG. 1 is a diagram illustrating an example of the basic structure of a deep learning network in one embodiment of the present invention. FIG. 2 is a diagram illustrating an example of the application process of three lookup tables and two functions according to an embodiment of the present invention. FIG. 3 is a diagram illustrating an example of the operation of iLuT in an embodiment of the present invention. FIG. 4 is a diagram illustrating an example of the operation of cLuT in an embodiment of the present invention. FIG. 5 is a diagram illustrating an example of the operation of sLuT in an embodiment of the present invention. FIGS. 6 to 8 are drawings illustrating examples of the process of generating a lookup table in an embodiment of the present invention. FIG. 9 is a flowchart illustrating an example of a side-channel analysis response method in one embodiment of the present invention. FIG. 10 is a block diagram illustrating an example of a computer device according to an embodiment of the present invention. FIG. 11 is a diagram illustrating an example of a TVLA result in which the random number is fixed to 0 in one experimental example of the present invention. FIG. 12 is a diagram illustrating an example of a TVLA result when random numbers are used randomly in an experimental example of the present invention. Hereinafter, embodiments will be described in detail with reference to the attached drawings. Embodiments of the present invention can provide a method and system for side-channel analysis of an activation function utilized in a binary neural network. FIG. 1 is a diagram illustrating an example of the basic structure of a deep learning network in one embodiment of the present invention. In this embodiment, the activation function after the summation process in the basic structure of the deep learning network can be masked. The activation function of a binary neural network can determine the sign of the input value x as shown in Equation 1 below and output a number equal to the sign bit as an output value. It is assumed that the summing part of the binary neural network is already arithmetic masked, and the input values of the activation function are in a 2-sharing form such as x - r and r . Here, r is a random number whose value changes with each execution. To determine the sign of x before masking, x - r and r must be added, but adding x - r and r makes it vulnerable to side-channel analysis. To take advantage of this, three lookup tables named iLuT, sLuT, and cLuT, and two functions based on the B2A (Boolean to Arithmetic) algorithm, the B2A function and the VC function, can be utilized. FIG. 2 is a diagram illustrating an example of the application process of three lookup tables and two functions according to an embodiment of the present invention. In the first process (210), the side-channel analysis response system can extract the lowest two bits of the activation function input values x - r and r , namely ( x - r ) [0:1] and r [0:1] , use them as input values for iLuT, and output the carry bit of the addition result as the output value of iLuT. FIG. 3 is a diagram illustrating an example of the operation of iLuT in an embodiment of the present invention. The result of the addition is result [0:2] , which is 3 bits, and the m