KR-20260066770-A - Current decay reduction using aluminum nitride back barrier and in-situ 2-stage passivation

Abstract

A device structure and method for reducing current decay of a high electron mobility transistor (HEMT) using an aluminum nitride back barrier and in situ two-stage passivation are disclosed. In one embodiment, the HEMT comprises a back barrier layer comprising Al and N on a substrate, a channel layer comprising Ga and N on the back barrier layer, an Al x Ga 1-x N layer on the channel layer, a first passivation layer on the Al x Ga 1-x N layer, source and drain ohmic contacts, a T-shaped gate electrode located at one position on a surface between the drain ohmic contact and the source ohmic contact, and a second passivation layer on the first passivation layer covering the surface and the T-shaped gate electrode.

Inventors

• 히크만, 오스틴
• 제나, 데브딥

Assignees

• 속테라, 인크.

Dates

Publication Date

20260512

Application Date

20240911

Priority Date

20230913

Claims (20)

1. As a high electron mobility transistor (HEMT), A back barrier layer containing Al and N on a substrate; A channel layer comprising Ga and N above the back barrier layer; An Al x Ga 1-x N layer above the channel layer - where x is in the range of 0.2 to 1, and the Al x Ga 1-x N layer and the channel layer are arranged to form a two-dimensional electron gas (2DEG) channel at the interface between the Al x Ga 1-x N layer and the channel layer -; A first passivation layer having an Al y Si 1-y N composition (where y is within the range of 0 to 1) on the above Al x Ga 1-x N layer; A drain ohmic contact connected to the channel layer at the first end of the above 2DEG channel; A source ohmic contact connected to the channel layer at the second end of the 2DEG channel, opposite the first end of the channel; A T-shaped gate electrode located at a position on the surface between the drain ohmic contact and the source ohmic contact - the T-shaped gate electrode includes a neck portion extending a first distance over the surface to a head portion of the T-shaped gate electrode -; Gate electrode recess on the uppermost surface of the head portion of the above T-shaped gate electrode; A second passivation layer on the first passivation layer, which extends continuously from the upper surface of the drain ohmic contact to the upper surface of the source ohmic contact, covers the surface, and covers the T-shaped gate electrode including the gate electrode recess; and A passivation layer recess on the upper surface of the second passivation layer above the gate electrode recess - the passivation layer recess has a passivation layer recess shape corresponding to the shape of the gate electrode recess - A high electron mobility transistor including
2. A high electron mobility transistor according to claim 1, further comprising a recessed region penetrating the first passivation layer, wherein the recessed region is used to form a gate contact for an Al x Ga 1-x N layer.
3. A high electron mobility transistor according to claim 1, wherein the thickness of the channel layer is less than 500 nm.
4. A method for manufacturing a high electron mobility transistor (HEMT), wherein the method comprises: Step of providing a substrate; In an epitaxial growth system, a step of epitaxially growing a back barrier layer comprising Al and N on the substrate; In the above epitaxial growth system, a step of epitaxially growing a channel layer comprising Ga and N on the back barrier layer; In the above epitaxial growth system, the step of epitaxially growing an Al x Ga 1-x N layer on the channel layer—wherein x is within the range of 0.2 to 1, and the Al x Ga 1-x N layer and the channel layer are arranged to form a two-dimensional electron gas (2DEG) channel at the interface between the Al x Ga 1-x N layer and the channel layer—; A step of depositing a first passivation layer on the above Al x Ga 1-x N layer - the first passivation layer is deposited in-situ within the epitaxial growth system immediately after the epitaxial growth of the Al x Ga 1-x N layer and before exposure to air, wherein the first passivation layer has an Al y Si 1-y N composition, and y is within the range of 0 to 1 -; Step of forming a device separation region; A step of forming a drain ohmic contact connected to the channel layer at the first end of the above 2DEG channel; A step of forming a source ohmic contact connected to the channel layer at the second end of the 2DEG channel, which is opposite to the first end of the channel; A step of forming a T-shaped gate electrode at a position on a surface between the drain ohmic contact and the source ohmic contact—the T-shaped gate electrode contacts the Al x Ga 1-x N layer, and the T-shaped gate electrode includes a neck portion extending by a first distance to a head portion of the T-shaped gate electrode over the surface—; and Step of stacking a second passivation layer on the first passivation layer A method for manufacturing a high electron mobility transistor including
5. A method for manufacturing a high electron mobility transistor according to claim 4, wherein the step of stacking the second passivation layer is performed using a low-pressure chemical vapor deposition (LPCVD) process.
6. A method for manufacturing a high electron mobility transistor according to claim 4, wherein the step of stacking the second passivation layer is performed using a plasma-enhanced chemical vapor deposition (PECVD) stacking process.
7. A method for manufacturing a high electron mobility transistor according to claim 4, wherein the second passivation layer comprises silicon nitride (SiN).
8. A method for manufacturing a high electron mobility transistor according to claim 4, wherein the second passivation layer extends continuously from the upper surface of the drain ohmic contact to the upper surface of the source ohmic contact to cover the surface and covers a T-shaped gate electrode including a gate electrode recess.
9. A method for manufacturing a high electron mobility transistor according to claim 4, wherein the second passivation layer comprises a passivation layer recess having a passivation layer recess shape corresponding to the shape of the gate electrode recess.
10. In paragraph 4, the step of forming drain and source ohmic contacts is: Step of depositing drain and source metals on the surface of the above Al x Ga 1-x N layer; and A method for manufacturing a high electron mobility transistor, comprising the step of fusing the drain and source metals by annealing to form a contact for the 2DEG channel.
11. In paragraph 4, the step of forming drain and source ohmic contacts is: A step of forming drain and source recessed regions by dry etching; and A method for manufacturing a high electron mobility transistor, comprising the step of growing n-type doped GaN to form a contact for the 2DEG channel.
12. A method for manufacturing a gallium nitride (GaN)-based high electron mobility transistor (HEMT), wherein the method comprises: Step of providing a substrate; In an epitaxial growth system, a step of epitaxially growing a back barrier layer comprising Al and N on the substrate; In the above epitaxial growth system, a step of epitaxially growing a channel layer comprising Ga and N on the back barrier layer; In the above epitaxial growth system, the step of epitaxially growing an Al x Ga 1-x N layer on the channel layer—wherein x is within the range of 0.2 to 1, and the Al x Ga 1-x N layer and the channel layer are arranged to form a two-dimensional electron gas (2DEG) channel at the interface between the Al x Ga 1-x N layer and the channel layer—; A step of depositing a first passivation layer on the above Al x Ga 1-x N layer - the first passivation layer is deposited in situ within the epitaxial growth system immediately after the epitaxial growth of the Al x Ga 1-x N layer and before exposure to air, wherein the first passivation layer has an Al y Si 1-y N composition, and y is within the range of 0 to 1 -; A step of stacking a second passivation layer on the first passivation layer; Step of forming a device separation region; A step of forming a drain ohmic contact recessed into the channel layer at the first end of the above 2DEG channel; A step of forming a source ohmic contact recessed into the channel layer at the second end of the 2DEG channel, opposite the first end of the channel; and A step of forming a T-shaped gate electrode at a position on a surface between the drain ohmic contact and the source ohmic contact - the T-shaped gate electrode contacts the Al x Ga 1-x N layer, and the T-shaped gate electrode includes a neck portion extending by a first distance to a head portion of the T-shaped gate electrode over the surface - A method for manufacturing a high electron mobility transistor including
13. As a high electron mobility transistor (HEMT), A back barrier layer containing Al and N on a substrate; A channel layer comprising Ga and N above the back barrier layer; An Al x Ga 1-x N layer above the channel layer - where x is in the range of 0.2 to 1, and the Al x Ga 1-x N layer and the channel layer are arranged to form a two-dimensional electron gas (2DEG) channel at the interface between the Al x Ga 1-x N layer and the channel layer -; A first passivation layer on the above Al x Ga 1-x N layer - the first passivation layer has an Al z Ga 1-z N composition, where z is in the range of 0 to 1, and the thickness of the first passivation layer is between about 1 nm and about 5 nm -; A drain ohmic contact connected to the channel layer at the first end of the above 2DEG channel; A source ohmic contact connected to the channel layer at the second end of the 2DEG channel, which is opposite to the first end of the channel; A T-shaped gate electrode located at a position on the surface between the drain ohmic contact and the source ohmic contact - the T-shaped gate electrode includes a neck portion extending a first distance over the surface to a head portion of the T-shaped gate electrode -; Gate electrode recess on the uppermost surface of the head portion of the above T-shaped gate electrode; A second passivation layer on the first passivation layer, which extends continuously from the upper surface of the drain ohmic contact to the upper surface of the source ohmic contact, covers the surface, and covers the T-shaped gate electrode including the gate electrode recess; and A passivation layer recess on the upper surface of the second passivation layer above the gate electrode recess - the passivation layer recess has a passivation layer recess shape corresponding to the shape of the gate electrode recess - A high electron mobility transistor including
14. A method for manufacturing a high electron mobility transistor (HEMT), wherein the method comprises: Step of providing a substrate; In an epitaxial growth system, a step of epitaxially growing a back barrier layer comprising Al and N on the substrate; In the above epitaxial growth system, a step of epitaxially growing a channel layer comprising Ga and N on the back barrier layer; In the above epitaxial growth system, the step of epitaxially growing an Al x Ga 1-x N layer on the channel layer—wherein x is within the range of 0.2 to 1, and the Al x Ga 1-x N layer and the channel layer are arranged to form a two-dimensional electron gas (2DEG) channel at the interface between the Al x Ga 1-x N layer and the channel layer—; A step of depositing a first passivation layer on the above Al x Ga 1-x N layer - the first passivation layer is deposited in situ within the epitaxial growth system immediately after epitaxial growth of the Al x Ga 1-x N layer and before exposure to air, the first passivation layer has an Al z Ga 1-z N composition, and the thickness of the first passivation layer is between about 1 nm and about 5 nm -; Step of depositing a temporary passivation layer on the first passivation layer - the temporary passivation layer is deposited in situ within the epitaxial growth system immediately after the epitaxial growth of the first passivation layer and before exposure to air, and the temporary passivation layer has an Al y Si 1-y N composition, where y is within the range of 0 to 1 -; A step of removing the temporary passivation layer immediately before manufacturing the above HEMT; Step of forming a device separation region; A step of forming a drain ohmic contact connected to the channel layer at the first end of the above 2DEG channel; A step of forming a source ohmic contact connected to the channel layer at the second end of the 2DEG channel, which is opposite to the first end of the channel; A step of forming a T-shaped gate electrode at a position on a surface between the drain ohmic contact and the source ohmic contact—the T-shaped gate electrode contacts the Al x Ga 1-x N layer, and the T-shaped gate electrode includes a neck portion extending by a first distance to a head portion of the T-shaped gate electrode over the surface—; and Step of stacking a second passivation layer on the first passivation layer A method for manufacturing a high electron mobility transistor including
15. As a high electron mobility transistor (HEMT), A back barrier layer containing Al and N on a substrate; A channel layer comprising Ga and N above the back barrier layer; An intermediate layer above the channel layer - said intermediate layer has an Al w Ga 1-w N composition, where w is in the range of 0.2 to 1, and said intermediate layer and said channel layer are arranged to form a two-dimensional electron gas (2DEG) channel at the interface between said intermediate layer and said channel layer -; Al x Ga 1-x N barrier layer above the above intermediate layer - where x is in the range of 0.2 to 1 -; A first passivation layer on the above Al x Ga 1-x N barrier layer - the first passivation layer has an Al z Ga 1-z N composition, where z is in the range of 0 to 1, and the thickness of the first passivation layer is between about 0.5 nm and about 5 nm -; An in-situ passivation layer on the first passivation layer above - the in-situ passivation layer has an Al y Si 1-y N composition, where y is in the range of 0 to 1, and the thickness of the in-situ passivation layer is between about 0 nm and about 20 nm -; A drain ohmic contact connected to the channel layer at the first end of the above 2DEG channel; A source ohmic contact connected to the channel layer at the second end of the 2DEG channel, which is opposite to the first end of the channel; A T-shaped gate electrode located at a position on a surface between the drain ohmic contact and the source ohmic contact - the T-shaped gate electrode includes a neck portion extending a first distance over the surface to a head portion of the T-shaped gate electrode -; and A second passivation layer on the in situ passivation layer, which extends continuously from the upper surface of the drain ohmic contact to the upper surface of the source ohmic contact, covers the surface, and covers the bottom surface of the head portion and the neck portion of the T-shaped gate electrode. A high electron mobility transistor including
16. A high electron mobility transistor according to claim 15, further comprising a recessed region penetrating the in situ passivation layer, wherein the recessed region is used to form a gate contact for the first passivation layer.
17. A high electron mobility transistor according to claim 15, further comprising a third passivation layer that extends continuously from the upper surface of the drain ohmic contact to the upper surface of the source ohmic contact, covers the surface, and covers the T-shaped gate electrode.
18. In Paragraph 17, A gate electrode recess on the uppermost surface of the head portion of the T-shaped gate electrode; and A high electron mobility transistor further comprising a passivation layer recess on the upper surface of the third passivation layer above the gate electrode recess, wherein the passivation layer recess has a passivation layer recess shape corresponding to the shape of the gate electrode recess.
19. A high electron mobility transistor according to claim 17, further comprising a source-connecting metal field plate stacked on the upper surface of the third passivation layer and positioned between the source edge of the T-shaped gate electrode and the edge of the drain ohmic contact.
20. As a high electron mobility transistor (HEMT), A back barrier layer containing Al and N on a substrate; A channel layer comprising Ga and N above the back barrier layer; An intermediate layer above the channel layer - the intermediate layer has an Al w Ga 1-w N composition, where w is in the range of 0.2 to 1, and the intermediate layer and the channel layer are arranged to form a two-dimensional electron gas (2DEG) channel at the interface between the intermediate layer and the channel layer -; Al x Ga 1-x N barrier layer above the above intermediate layer - where x is in the range of 0.2 to 1 -; A first passivation layer on the above Al x Ga 1-x N barrier layer - the first passivation layer has an Al z Ga 1-z N composition, where z is in the range of 0 to 1, and the thickness of the first passivation layer is between about 0.5 nm and about 5 nm -; An in-situ passivation layer on the first passivation layer above - the in-situ passivation layer has an Al y Si 1-y N composition, where y is in the range of 0 to 1, and the thickness of the in-situ passivation layer is between about 0 nm and about 20 nm -; A drain ohmic contact connected to the channel layer at the first end of the above 2DEG channel; A source ohmic contact connected to the channel layer at the second end of the 2DEG channel, which is opposite to the first end of the channel; A T-shaped gate electrode located at a position on a surface between the drain ohmic contact and the source ohmic contact - the T-shaped gate electrode includes a neck portion extending a first distance over the surface to a head portion of the T-shaped gate electrode -; and A second passivation layer on the in situ passivation layer, which extends continuously from the upper surface of the drain ohmic contact to the upper surface of the source ohmic contact, covers the surface, and covers the T-shaped gate electrode. A high electron mobility transistor including

Description

Current decay reduction using aluminum nitride back barrier and in-situ 2-stage passivation Cross-reference regarding related applications This application claims priority to U.S. Provisional Patent Application No. 63/538,233, filed September 13, 2023; U.S. Provisional Patent Application No. 63/553,521, filed February 14, 2024; and U.S. Provisional Patent Application No. 63/678,916, filed August 2, 2024, the disclosures of these applications are incorporated by reference in their entirety for all purposes. The present disclosure generally relates to compound semiconductor devices, and more specifically to high-power gallium nitride (GaN)-based compound semiconductor devices used in radio frequency (RF) amplifiers. GaN high electron mobility transistors (HEMTs) can provide relatively high operating frequencies and high operating efficiencies when used in RF amplifiers. GaN amplifiers can operate at relatively high power densities (e.g., power density greater than 1 W/mm) at gigahertz frequencies. Aspects of the present disclosure will now be described in greater detail below with reference to the accompanying drawings and are intended to be read together with this summary, detailed description, and the preferred and/or specific embodiments specifically discussed or disclosed. However, these various aspects may be implemented in various other forms and should not be interpreted as being limited to the embodiments presented herein; rather, these embodiments are provided merely for illustrative purposes to ensure that the present disclosure is written thoroughly and completely to fully convey the full scope to those skilled in the art. FIG. 1 shows a cross-sectional view of a heterostructure device having an aluminum nitride (AlN) back barrier manufactured using a two-step in situ passivation manufacturing process according to an embodiment of the present disclosure. FIGS. 2a-2f show cross-sectional views illustrating a method for manufacturing a heterostructure device shown in FIG. 1 according to some embodiments of the present disclosure. FIG. 3 shows a simplified flowchart illustrating a method for manufacturing a heterostructure device illustrated in FIG. 1 according to an embodiment of the present disclosure. FIGS. 4a-4f are cross-sectional views illustrating an alternative method for manufacturing a heterostructure device according to a specific embodiment of the present disclosure. FIG. 5 shows a simplified flowchart illustrating a method for manufacturing a heterostructure device illustrated in FIG. 4f according to an embodiment of the present disclosure. FIG. 6 shows a cross-sectional view of a heterostructure device manufactured using a multi-stage passivation manufacturing process according to an embodiment of the present disclosure. FIGS. 7a-7g show cross-sectional views illustrating a method for manufacturing a heterostructure device shown in FIG. 6 according to some embodiments of the present disclosure. FIG. 8 shows a simplified flowchart illustrating a method for manufacturing a heterostructure device illustrated in FIG. 6 according to an embodiment of the present disclosure. FIG. 9 shows a cross-sectional view of a heterostructure device manufactured using a multi-stage passivation manufacturing process according to an embodiment of the present disclosure. FIG. 10 shows an exemplary variation of the heterostructure device of FIG. 9 according to an embodiment of the present disclosure. FIG. 11 shows another exemplary variation of the heterostructure device of FIG. 9 according to an embodiment of the present disclosure. FIG. 12 shows another exemplary variation of the heterostructure device of FIG. 9 according to an embodiment of the present disclosure. FIG. 13 shows a simplified flowchart illustrating a method for manufacturing a heterostructure device illustrated in FIG. 9 according to an embodiment of the present disclosure. FIG. 14 shows a simplified flowchart illustrating another method for manufacturing a heterostructure device according to an embodiment of the present disclosure. The described embodiments generally relate to GaN-based high electron mobility transistor (HEMT) devices. More specifically, embodiments of the present invention provide enhanced current decay performance in GaN-based HEMTs using an aluminum nitride (AlN) back barrier and an in-situ two-step passivation manufacturing method. GaN HEMTs used in RF amplifiers may have trap states that can degrade the performance of the GaN HEMT. Two types of trap states can exist in GaN HEMT devices: surface traps and bulk traps. Surface traps can be located on the upper surface of the GaN HEMT device, typically the upper side of the barrier layer exposed to air. These trap states can be broken bonds on the semiconductor surface or can be formed due to chemical modifications of the surface, such as Ga-O bonds formed as the surface oxidizes. Exposure to air can generate additional trap states or induce an overall reduction in surface