KR-20260067707-A - STORAGE DEVICE AND METHOD FOR PROGRAM

Abstract

In one embodiment of the present application, the storage device comprises a plurality of non-volatile memories and a plurality of channels and a storage controller connected to the plurality of non-volatile memories through a plurality of ways connected to each of the plurality of channels, wherein the storage controller pre-programs write data to the plurality of non-volatile memories through the plurality of ways and, after the pre-programming is completed, re-programs the write data to the plurality of non-volatile memories through different way groups included in the plurality of ways during non-overlapping time intervals.

Inventors

• 김장률
• 박진용
• 조정재
• 김인수

Assignees

• 삼성전자주식회사

Dates

Publication Date

20260513

Application Date

20241106

Claims (10)

1. Multiple non-volatile memories; and A storage controller connected to a plurality of non-volatile memories through a plurality of channels and a plurality of ways connected to each of the plurality of channels, and The above storage controller is, Pre-program data to the plurality of non-volatile memories through the plurality of ways, and A storage device configured to re-program the written data into the plurality of non-volatile memories through different way groups included in the plurality of ways during non-overlapping time intervals after the above pre-program is completed.
2. In paragraph 1, A storage device further comprising a buffer memory for buffering the above-mentioned data.
3. In paragraph 1, The above storage controller is, A storage device configured to re-program the written data through one or more way groups among the way groups in any of the above time intervals.
4. In paragraph 3, The above storage controller is, A storage device configured to back up the write data for one or more way groups based on the detection of a sudden power off (SPO) in the above arbitrary time interval.
5. In paragraph 1, The above storage controller is, A storage device configured to set the number of ways included in each of the above way groups.
6. In paragraph 1, The number of the above way groups is 2, which is a storage device.
7. In paragraph 1, The above storage controller is, A storage device that pre-programs additional write data into the plurality of non-volatile memories through the one way group after the re-programming of one of the way groups is completed.
8. In Paragraph 7, The above storage controller is, A storage device configured to start the pre-program for the additional write data and the re-program for the write data together in any of the above time intervals.
9. In paragraph 1, The above storage controller is, A storage device configured to dequeue a command from a queue for controlling a plurality of non-volatile memories, perform the pre-program if the command indicates the pre-program, and check the number of ways among the plurality of ways that are in progress of the re-program if the command does not indicate the pre-program.
10. In Paragraph 9, The above storage controller is, A storage device configured to enqueue the command into a pending queue when the number of the above ways is greater than or equal to a set threshold, and to perform the re-program when the number of the above ways is less than the threshold.

Description

Storage Device and Method for Program The present application relates to a storage device and a method for a program. Storage devices store data under the control of host devices such as computers, smartphones, and smart pads. Most storage devices are powered by an external power source. Storage devices can suffer damage, such as data loss, due to external power failures or power off (e.g., sudden power off). To address the aforementioned power-related issues, an auxiliary power supply for data backup (or dump) may be provided within the storage device. However, the power supply for data backup depends on the capacity of the auxiliary power supply. Therefore, it may be necessary to reduce the dependency on the auxiliary power supply's capacity and improve data reliability by reducing the size of the data backed up during a power-off situation. FIG. 1 is a block diagram of a storage device according to some exemplary embodiments. FIG. 2 is an exemplary block diagram of the storage controller of FIG. 1 according to some exemplary embodiments. FIG. 3 is an exemplary block diagram of the non-volatile memory of FIG. 1 according to some exemplary embodiments. FIG. 4 is a circuit diagram exemplarily showing a memory block within the memory cell array of FIG. 1 according to some exemplary embodiments. FIG. 5 illustrates the data state according to pre-program and re-program according to some exemplary embodiments. FIGS. 6 and 7 are timing diagrams for illustrating backup operations at SPO according to some exemplary embodiments. FIGS. 8 and 9 are timing diagrams for illustrating reprogramming scheduling according to some exemplary embodiments. FIG. 10 is a flowchart of a method of a storage device according to some exemplary embodiments. FIG. 11 is a flowchart of the backup operation of a storage device according to some exemplary embodiments. FIG. 12 is a flowchart of a program scheduling method for a storage device according to some exemplary embodiments. FIG. 13 is a block diagram of a storage device according to some exemplary embodiments. In the following, embodiments of the present application will be described clearly and in detail so that a person skilled in the art can easily practice the present application. FIG. 1 is a block diagram of a storage device according to some exemplary embodiments. Referring to FIG. 1, a storage device (100) according to some exemplary embodiments may include a storage controller (110), a plurality of non-volatile memories (120) and buffer memories (130). The storage controller (110) may be configured to control a plurality of non-volatile memories (120) and buffer memories (130) according to commands or control from a host. For example, the storage controller (110) may write data to the plurality of non-volatile memories (120) or read data stored in the plurality of non-volatile memories (120) according to a request from the host. A storage controller (110) is connected to a plurality of non-volatile memories (120) through a plurality of channels (CH1~CHi) and a plurality of ways, and can access the plurality of non-volatile memories (120). For example, i can be configured for the plurality of channels (CH1~CHi). A plurality of ways can be connected to each of the plurality of channels (CH1~CHi), and j can be configured for each channel (where i and j are the same or different natural numbers). For example, a plurality of ways (W11~W1j) are connected to the first channel (CH1), and a plurality of ways (Wi1~Wij) are connected to the i-th channel (CHi). A single non-volatile memory can be connected to each of the multiple ways. For example, a non-volatile memory (NVM11) is connected to way (W11), and a non-volatile memory (NVMij) is connected to way (Wij). The storage controller (110) can transmit and receive signals to and from multiple non-volatile memories (120) through multiple channels (CH1~CHi). For example, the storage controller (110) can transmit commands, addresses, and data to multiple non-volatile memories (120) through multiple channels (CH1~CHi), or receive data read from multiple non-volatile memories (120) through multiple channels (CH1~CHi). The storage controller (110) can transmit and receive signals to and from multiple non-volatile memories (120) in parallel through different channels. Additionally, the storage controller (110) can control each of the multiple non-volatile memories (120) connected to multiple channels (CH1~CHi). For example, the storage controller (110) can transmit commands and addresses through one channel and select and control one non-volatile memory. Each of the plurality of non-volatile memories (120) may be connected to one of the plurality of channels (CH1 to CHi) through a corresponding way. For example, non-volatile memories (NVM11 to NVM1j) may be connected to the first channel (CH1) through ways (W11 to W1j), and non-volatile memories (NVMi1 to NVMij) may be connected to the i-th channel (CHi) through ways (Wi1 to WIJ). For exam